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A novel transition between rectangular waveguide and layered ridge dielectric waveguide (LRDW) is reported. The transition is also suitable for use with image guide, insulated image guide, dielectric ridge waveguide and other open dielectric waveguides. Both experimental and theoretical data are presented which compare the new transition to three transitions reported in the literature.
Properties of thin dielectric layer adjusted precisely. Deposition technique found to improve fabrication of infrared imaging devices. Applied to dielectric layer of SiO and SiO2, critical to operation of device. For imager to work properly, thickness of dielectric layer adjusted precisely in coordination with absorption coefficient and wavelength of light imaged. New deposition process enables adjustment of thickness and index of refraction of critical dielectric layer to within plus or minus 1 percent.
The evaluation of multilayer ceramic capacitors (MLCCs) with Ni electrode and BaTiO3 dielectric material for potential space project applications requires an in-depth understanding of their reliability. A general reliability model for Ni-BaTiO3 MLCC is developed and discussed. The model consists of three parts: a statistical distribution; an acceleration function that describes how a capacitor's reliability life responds to the external stresses, and an empirical function that defines contribution of the structural and constructional characteristics of a multilayer capacitor device, such as the number of dielectric layers N, dielectric thickness d, average grain size, and capacitor chip size A. Application examples are also discussed based on the proposed reliability model for Ni-BaTiO3 MLCCs.
The evaluation for potential space project applications of multilayer ceramic capacitors (MLCCs) with Ni electrode and BaTiO3 dielectric material requires an in-depth understanding of the MLCCs reliability. A general reliability model for Ni-BaTiO3 MLCCs is developed and discussed in this paper. The model consists of three parts: a statistical distribution; an acceleration function that describes how a capacitors reliability life responds to external stresses; and an empirical function that defines the contribution of the structural and constructional characteristics of a multilayer capacitor device, such as the number of dielectric layers N, dielectric thickness d, average grain size r, and capacitor chip size A. Application examples are also discussed based on the proposed reliability model for Ni-BaTiO3 MLCCs.
Design rules for Layered Ridge Dielectric Waveguide (LRDW) are presented for the first time through simple figures and closed form equations. The Effective Dielectric Constant (EDC) method is used to develop the design rules that account for typical circuit specifications such as higher order mode suppression, dispersion, attenuation, and coupling between adjacent transmission lines. Comparisons between the design of LRDW, image guide, and millimeter-wave dielectric ridge guide are made.
The millimeter wave, especially above 100 GHz, and the submillimeter wave frequency spectrum offers the possibility for narrow-beam, high-resolution antennas which are critical for high definition radars required for space debris tracking, airport ground avoidance radars, and missile tracking. In addition, the frequency which most atmospheric constituents may be detected lie in this part of the frequency spectrum. Therefore, the development of electronic components for millimeter/submillimeter wave passive sensors is required for environmental monitoring of the Earth's atmosphere. Typical microwave transmission lines such as microstrip and coplanar waveguide rely on two or more electrical conductors to concentrate and guide the electromagnetic energy. Unfortunately, the surface resistance of the conductors increases as the square root of frequency. In addition, the circuit dimensions must be decreased with increasing frequency to maintain a single mode transmission line which further increases the conductor loss. An alternative family of transmission lines are formed from two or more insulating materials and rely on the differences in the permittivities between the two materials to guide the wave. No metal conductors are required although some dielectric waveguides do utilize a metallic ground plane to facilitate the interconnections of active electrical elements or to reduce the transmission line size. Examples of such transmission lines are image guides, insulated image guides, trapped image guides, ridge guide, and layered ridge dielectric waveguide (LRDW). Although most dielectric waveguides have dimensions on the order of lambda to provide sufficient field confinement, the LRDW has been shown to provide good field confinement for electrically small lines. This offers an advantage in circuit integration. It has been shown that a periodic array of metallic strips placed either along or on top of a dielectric waveguide forms an effective radiator. This antenna is easy to fabricate and there is good background of microstrip type antenna design information in the literature. This paper reports the development of the first frequency scanning antenna fed by a LRDW.
A device for tuning a circuit includes a substrate, a transmission line on the substrate that includes first and second conductors coupled to a circuit to be tuned, and a movable short-circuit for varying the impedance the transmission line presents to the circuit to be tuned. The movable short-circuit includes a dielectric layer disposed atop the transmission line and a distributed shorting element in the form of a conductive member that is configured to be slid along at least a portion of the transmission line atop the dielectric layer. The conductive member is configured to span the first and second conductors of the transmission line and to define at least a first opening that spans the two conductors so that the conductive member includes first and second sections separated by the first opening. The first and second sections of the conductive member combine with the first and second conductors of the transmission line to form first and second low impedance sections of transmission line, and the opening combines with the first and second conductors of the transmission line and the dielectric layer to form a first high impedance section of transmission line intermediate the first and second low impedance sections. Each of the first low impedance section and the first high impedance section have a length along the transmission line of approximately one-quarter wavelength, thus providing a periodic variation of transmission line impedance. That enhances reflection of rf power.
Testing high voltage (HV) electronic parts (greater than 300 V) for sudden event effects (SEE) caused by cosmic rays in the space environment, consisting of energetic heavy-ions, and neutron radiation in the upper atmosphere is a crucial step towards using these parts in spacecraft and aircraft. Due to the nature of cosmic radiation and neutrons, electronic parts are tested for SEE without any packaging and/or shielding over the top of the device. In the case of commercial HV parts, the top of the packaging is etched off and then a thin dielectric coating is placed over the part in order to avoid electrical arcing between the device surface and wire bonds and other components. Even though the effects of the thin dielectric layer on SEE testing can be accounted for, the dielectric layer significantly hinders post testing failure analysis. Replicating the test capability of state-of-the-art packaging while eliminating the need for post radiation test processing of the die surface (that obscures failure analysis) is the goal. To that end, a new packaging concept for HV parts has been developed that requires no dielectric coating over the part. Testing of prototype packages used with Schottky diodes (rated at 1200V) has shown no electrical arcing during testing and leakage currents during reverse bias testing are within the manufactures specifications.
A method of compensation for the polarization- dependent phase anisotropy of a metal reflector has been proposed. The essence of the method is to coat the reflector with multiple thin alternating layers of two dielectrics that have different indices of refraction, so as to introduce an opposing polarization-dependent phase anisotropy. The anisotropy in question is a phenomenon that occurs in reflection of light at other than normal incidence: For a given plane wave having components polarized parallel (p) and perpendicular (s) to the plane of incidence, the phase of s-polarized reflected light differs from the phase p-polarized light by an amount that depends on the angle of incidence and the complex index of refraction of the metal. The magnitude of the phase difference is zero at zero angle of incidence (normal incidence) and increases with the angle of incidence. This anisotropy is analogous to a phase anisotropy that occurs in propagation of light through a uniaxial dielectric crystal. In such a case, another uniaxial crystal that has the same orientation but opposite birefringence can be used to cancel the phase anisotropy. Although it would be difficult to prepare a birefringent material in a form suitable for application to the curved surface of a typical metal reflector in an optical instrument, it should be possible to effect the desired cancellation of phase anisotropy by exploiting the form birefringence of multiple thin dielectric layers. (The term "form birefringence" can be defined loosely as birefringence arising, in part, from a regular array of alternating subwavelength regions having different indices of refraction.)
We built and measured radio-frequency (RF) loss tangent, tan d, evaluation structures using float-zone quality silicon-on-insulator (SOI) wafers with 5 µ m thick device layers. Superconducting Nb components were fabricated on both sides of the SOI Si device layer. Our main goals were to develop a robust fabrication for using crystalline Si (c-Si) dielectric layers with superconducting Nb components in a wafer bonding process and to confirm that tan d with c-Si dielectric layers was reduced at RF frequencies compared to devices fabricated with amorphous dielectrics, such as SiO2 and SixNy, where tan d ~ 10-3. Our primary test structure used a Nb coplanar waveguide (CPW) readout structure capacitively coupled to LC resonators, where the capacitors were defined as parallel-plate capacitors on both sides of a c-Si device layer using a wafer bonding process with benzocyclobutene (BCB) wafer bonding adhesive. Our control experiment, to determine the intrinsic tan d in the SOI device layer without wafer bonding, also used Nb CPW readout coupled to LC resonators; however, the parallel-plate capacitors were fabricated on both sides of the Si device layer using a deep reactive ion etch (DRIE) to access the c-Si underside through the buried oxide and handle Si layers in the SOI wafers. We found that our wafer bonded devices demonstrated F· d = (8 ± 2) × 10-5, where F is the filling fraction of two-level states (TLS). For the control experiment, F· d = (2.0 ± 0.6) × 10-5, and we discuss what may be degrading the performance in the wafer bonded devices as compared to the control devices.
We built and measured radio-frequency (RF) loss tangent, tan δ, evaluation structures using float-zone quality silicon-on-insulator (SOI) wafers with 5 μm thick device layers. Superconducting Nb components were fabricated on both sides of the SOI Si device layer. Our main goals were to develop a robust fabrication for using crystalline Si (c-Si) dielectric layers with superconducting Nb components in a wafer bonding process and to confirm that tan δ with c-Si dielectric layers was reduced at RF frequencies compared to devices fabricated with amorphous dielectrics, such as SiO2 and SixNy, where tan δ ~ 10(exp -3). Our primary test structure used a Nb coplanar waveguide (CPW) readout structure capacitively coupled to LC resonators, where the capacitors were defined as parallel-plate capacitors on both sides of a c-Si device layer using a wafer bonding process with benzocyclobutene (BCB) wafer bonding adhesive. Our control experiment, to determine the intrinsic tan δ in the SOI device layer without wafer bonding, also used Nb CPW readout coupled to LC resonators; however, the parallel-plate capacitors were fabricated on both sides of the Si device layer using a deep reactive ion etch (DRIE) to access the c-Si underside through the buried oxide and handle Si layers in the SOI wafers. We found that our wafer bonded devices demonstrated F· δ = (8 +/- 2) × 10(exp -5), where F is the filling fraction of two-level states (TLS). For the control experiment, F· δ = (2.0 +/- 0.6) × 10(exp -5), and we discuss what may be degrading the performance in the wafer bonded devices as compared to the control devices.
Report describes comparative tests of conductor-backed coplanar-waveguide resonators with design resonant frequency of 10.8 GHz. Dielectric layers in resonators made of LaAIO3 and conductive ground planes on back surfaces of dielectric layers made of gold. TI/Ba/Ca/Cu/O and Y/Ba/Cu/O units performed better than all-gold-conductor unit did, at all but highest temperatures. Results suggest TI/Ba/Ca/Cu/O may be material of choice for cryogenic microwave applications.
An investigation is conducted of electric field patterns of a TE axial slot antenna which radiates through a dielectric window in a circular cylinder. The cylinder is partially coated with a dielectric layer. The investigation is to provide information regarding the effects of a high-temperature dielectric layer on the performance of antennas mounted on a space shuttle. Numerical results are presented for the far-field patterns. It is pointed out that the calculations show excellent agreement with experimental measurements.
Modeling of interconnects and associated discontinuities with the recent advances high-speed digital circuits has gained a considerable interest over the last decade although the theoretical bases for analyzing these structures were well-established as early as the 1960s. Ongoing research at the present time is focused on devising methods which can be applied to more general geometries than the ones considered in earlier days and, at the same time, improving the computational efficiency and accuracy of these methods. In this thesis, numerically efficient methods to compute the transmission line parameters of a multiconductor system and the equivalent capacitances of various strip discontinuities are presented based on the quasi-static approximation. The presented techniques are applicable to conductors embedded in an arbitrary number of dielectric layers with two possible locations of ground planes at the top and bottom of the dielectric layers. The cross-sections of conductors can be arbitrary as long as they can be described with polygons. An integral equation approach in conjunction with the collocation method is used in the presented methods. A closed-form Green's function is derived based on weighted real images thus avoiding nested infinite summations in the exact Green's function; therefore, this closed-form Green's function is numerically more efficient than the exact Green's function. All elements associated with the moment matrix are computed using the closed-form formulas. Various numerical examples are considered to verify the presented methods, and a comparison of the computed results with other published results showed good agreement.
The theory, computer program, and numerical results of an investigation of an axial slot antenna on a circular cylinder are discussed. The cylinder is partially coated with a dielectric layer and the antenna radiates through a flush mounted window. The study was conducted to determine the effects of a high temperature dielectric layer on the performance of antennas mounted on a space shuttle. Mathematical models are developed to show the relationships of the parameters. Curves are developed to compare the theoretical and actual far field radiation patterns.
Steady step surge testing (SSST) is widely applied to screen out potential power-on failures in solid tantalum capacitors. The test simulates the power supply's on and off characteristics. Power-on failure has been the prevalent failure mechanism for solid tantalum capacitors for decoupling applications. On the other hand, the SSST can also be reviewed as an electrically destructive test under a time-varying stress. It consists of rapidly charging the capacitor with incremental voltage increases, through a low resistance in series, until the capacitor under test is electrically shorted. Highly accelerated life testing (HALT) is usually a time-efficient method for determining the failure mechanism in capacitors; however, a destructive test under a time-varying stress like SSST is even more effective. It normally takes days to complete a HALT test, but it only takes minutes for a time-varying stress test to produce failures. The advantage of incorporating specific time-varying stress into a statistical model is significant in providing an alternative life test method for quickly revealing the failure modes in capacitors. In this paper, a time-varying stress has been incorporated into the Weibull model to characterize the failure modes. The SSST circuit and transient conditions to correctly test the capacitors is discussed. Finally, the SSST was applied for testing polymer aluminum capacitors (PA capacitors), Ta capacitors, and multi-layer ceramic capacitors with both precious metal electrode (PME) and base-metal-electrodes (BME). It appears that testing results are directly associated to the dielectric layer breakdown in PA and Ta capacitors and are independent on the capacitor values, the way the capacitors being built, and the manufactures. The testing results also reveal that ceramic capacitors exhibit breakdown voltages more than 20 times the rated voltage, and the breakdown voltages are inverse proportional to the dielectric layer thickness. The possibility of ceramic capacitors in front-end decoupling applications to block the surge noise from a power supply is also discussed.
Power-on failure has been the prevalent failure mechanism for solid tantalum capacitors in decoupling applications. A surge step stress test (SSST) has been previously applied to identify the critical stress level of a capacitor batch to give some predictability to the power-on failure mechanism [1]. But SSST can also be viewed as an electrically destructive test under a time-varying stress (voltage). It consists of rapidly charging the capacitor with incremental voltage increases, through a low resistance in series, until the capacitor under test is electrically shorted. When the reliability of capacitors is evaluated, a highly accelerated life test (HALT) is usually adopted since it is a time-efficient method of determining the failure mechanism; however, a destructive test under a time-varying stress such as SSST is even more time efficient. It usually takes days or weeks to complete a HALT test, but it only takes minutes for a time-varying stress test to produce failures. The advantage of incorporating a specific time-varying stress profile into a statistical model is significant in providing an alternative life test method for quickly revealing the failure mechanism in capacitors. In this paper, a time-varying stress that mimics a typical SSST has been incorporated into the Weibull model to characterize the failure mechanism in different types of capacitors. The SSST circuit and transient conditions for correctly surge testing capacitors are discussed. Finally, the SSST was applied for testing Ta capacitors, polymer aluminum capacitors (PA capacitors), and multi-layer ceramic (MLC) capacitors with both precious metal electrodes (PME) and base metal electrodes (BME). The test results are found to be directly associated with the dielectric layer breakdown in Ta and PA capacitors and are independent of the capacitor values, the way the capacitors were built, and the capacitors manufacturers. The test results also show that MLC capacitors exhibit surge breakdown voltages much higher than the rated voltage and that the breakdown field is inversely proportional to the dielectric layer thickness. The SSST data can also be used to comparatively evaluate the voltage robustness of capacitors for decoupling applications.
Construction of a capacitor sensor consisting of a dielectric layer between two conductive surface layers and connected across a potential source through a sensing resistor permits measurement of energy of impinging particles without degradation of sensitivity. A measurable response is produced without penetration of the dielectric layer.