Inference in Directed Acyclic Graphs with Applications to Hidden Markov Model Structures
Graphical techniques for modeling the dependencies of random variables have been explored in a.
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Graphical techniques for modeling the dependencies of random variables have been explored in a.
Graph theoretic methods are applied to compute the reliability for several types of networks of moderate size. The graph theory methods used are minimal spanning trees for networks with bi-directional links and the related concept of strongly connected directed graphs for networks with uni-directional links. A comparison is conducted of ring networks and braided networks. The case is covered where just the links fail and the case where both links and nodes fail. Two different failure modes for the links are considered. For one failure mode, the link no longer carries messages. For the other failure mode, the link delivers incorrect messages. There is a description and comparison of link-redundancy versus path-redundancy as methods to achieve reliability. All the computations are carried out by means of a fault tree program.
The goal of Delay Tolerant Networking (DTN) is to take a collection of heterogeneous, disparate connections between satellites, space assets, ground stations, and ground infrastructure and bring it together into a cohesive, functioning overlay network. Depending on the systems being considered, one can find links with a one-way light time exceeding minutes (and hours),periodic links which can sometimes be predicted by orbital mechanics, and restrictions based on the variety of capabilities built into these systems. These characteristics preclude traditional network models and routing techniques and have classically led to either rigid routing tables or purely probabilistic models. As the deeper underlying structures remain unknown, development of more DTN-optimized algorithms has lacked the necessary foundation. In a continuation of previous work, the goal of this paper is to identify and study these fundamental structures that exist in delay tolerant networks (DTN), with a focus on space networks. The current routing methodology has been to use contact graph routing (CGR) algorithms. CGR models a series of known contacts as a static graph. For CGR to work, this graph must be globally consistent and must have an accurate picture of the network. Because this is a globally controlled structure, there is little room for flexibility in the event of changes to the network which would naturally occur as the network grows. As a response to the desire for flexibility as the network changes, we introduced the mathematical structure known as sheaves to DTNs last year. The tag-line for sheaves is that they are a mathematically precise way of gluing local data together into unique global data. Thus, sheaves lend extra power to traditional models(and routing algorithms) by taking additional information and merging it, in as consistent a manner as possible, with the representation itself. The clearest example of how Earth-bound networks exhibit behavior that is “sheafy” is link state routers, which build a local-to-global picture of their network by gluing local information together into a global network, exactly as a sheaf would do. For routing within delay tolerant networks to truly exploit this structure, a deeper structure than a graph is required. In this paper, we develop sheaves that can work over directed graphs such as temporal flow networks, we construct a sheaf representation for Dijkstra’s algorithm, and we outline a construction for routing sheaves capable of modeling multicast scenarios. Finally, there is a section of future work suggesting follow-on research.
The nth order deBruijn graph Bn is the state diagram for an n-stage binary shift register. It is a directed graph with 2 to the n vertices, each labeled with an n-bit binary string, and 2 to the n+1 edges, each labeled with an (n+1)-bit binary string. It is shown that Bn can be built by appropriately connecting together with extra edges many isomorphic copies of a fixed graph, which is called a building block for Bn. The efficiency of such a building block is refined as the fraction of the edges of Bn which are present in the copies of the building block. It is then shown that for any alpha less than 1, there exists a graph which is a building block for Bn of efficiency greater than alpha for all sufficiently large n. The results are illustrated by showing how a special hierarchical family of building blocks has been used to construct a very large Viterbi decoder which will be used on the Galileo mission.
FIRM is software tool for identification of failure and management of risk based on directed-graph ("digraph") approach. Three core algorithms optimized for processing singletons and doubletons and also handle tripletons. FIRM identifies loops in digraphs and displays direct failure paths between any two nodes. Solves for reachability for given node without computing reachability for entire digraph. Represents hybrid between schematic-diagram and fault-tree approaches. Written in C.
In this paper, we consider the problem of constructing optimal and near-optimal test sequencing algorithms for multiple fault diagnosis. The computational complexity of solving the optimal multiple-fault isolation problem is super-exponential, that is, it is much more difficult than the single-fault isolation problem, which, by itself, is NP-hard. By employing concepts from information theory and AND/OR graph search, we present several test sequencing algorithms for the multiple fault isolation problem. These algorithms provide a trade-off between the degree of suboptimality and computational complexity. Furthermore, we present novel diagnostic strategies that generate a diagnostic directed graph (digraph), instead of a diagnostic tree, for multiple fault diagnosis. Using this approach, the storage complexity of the overall diagnostic strategy reduces substantially. The algorithms developed herein have been successfully applied to several real-world systems. Computational results indicate that the size of a multiple fault strategy is strictly related to the structure of the system.
A prototype decoder for a serially concatenated pulse position modulation (SCPPM) code has been implemented in a field-programmable gate array (FPGA). At the time of this reporting, this is the first known hardware SCPPM decoder. The SCPPM coding scheme, conceived for free-space optical communications with both deep-space and terrestrial applications in mind, is an improvement of several dB over the conventional Reed-Solomon PPM scheme. The design of the FPGA SCPPM decoder is based on a turbo decoding algorithm that requires relatively low computational complexity while delivering error-rate performance within approximately 1 dB of channel capacity. The SCPPM encoder consists of an outer convolutional encoder, an interleaver, an accumulator, and an inner modulation encoder (more precisely, a mapping of bits to PPM symbols). Each code is describable by a trellis (a finite directed graph). The SCPPM decoder consists of an inner soft-in-soft-out (SISO) module, a de-interleaver, an outer SISO module, and an interleaver connected in a loop (see figure). Each SISO module applies the Bahl-Cocke-Jelinek-Raviv (BCJR) algorithm to compute a-posteriori bit log-likelihood ratios (LLRs) from apriori LLRs by traversing the code trellis in forward and backward directions. The SISO modules iteratively refine the LLRs by passing the estimates between one another much like the working of a turbine engine. Extrinsic information (the difference between the a-posteriori and a-priori LLRs) is exchanged rather than the a-posteriori LLRs to minimize undesired feedback. All computations are performed in the logarithmic domain, wherein multiplications are translated into additions, thereby reducing complexity and sensitivity to fixed-point implementation roundoff errors. To lower the required memory for storing channel likelihood data and the amounts of data transfer between the decoder and the receiver, one can discard the majority of channel likelihoods, using only the remainder in operation of the decoder. This is accomplished in the receiver by transmitting only a subset consisting of the likelihoods that correspond to time slots containing the largest numbers of observed photons during each PPM symbol period. The assumed number of observed photons in the remaining time slots is set to the mean of a noise slot. In low background noise, the selection of a small subset in this manner results in only negligible loss. Other features of the decoder design to reduce complexity and increase speed include (1) quantization of metrics in an efficient procedure chosen to incur no more than a small performance loss and (2) the use of the max-star function that allows sum of exponentials to be computed by simple operations that involve only an addition, a subtraction, and a table lookup. Another prominent feature of the design is a provision for access to interleaver and de-interleaver memory in a single clock cycle, eliminating the multiple clock-cycle latency characteristic of prior interleaver and de-interleaver designs.
Planning of assembly sequences is essential to the manufacturing system design process. Several methodologies have been proposed to represent all the feasible assembly sequences. In this thesis, three algorithms are presented to generate three sets of precedence relations based on all the infeasible assembly tasks, all the infeasible assembly states, and all the feasible assembly sequences, respectively. The equivalence of the resulting sets of precedence relations to the AND/OR graph is established. A new property, the real time property, of a representation of assembly sequences is defined and discussed. A representation of assembly sequences is said to have the real time property, if it is possible to generate the next assembly task by testing locally in the representation, and it will guarantee that the generated assembly task will not lead the assembly sequence to a dead end situation, in which no feasible assembly task can be performed any more. It is shown that the correctness and completeness of one representation can not guarantee the real time property of the representation. It is proven that the directed graph representation and the set of precedence relations based on all the infeasible assembly states have the real time property, while the AND/OR graph representation and the set of precedence relations based on all the infeasible assembly tasks do not have the real time property. Finally in the thesis, the PLEIDEAS system, a PLanning Environment for Integrated DEsign of Assembly Systems, is described and illustrated by an example.
A directed graph is used to model the search space of a state space representation with single input operators, an AND/OR is used for problem reduction representations, and a theorem proving graph is used for state space representations with multiple input operators. These three graph models and heuristic strategies for searching them are surveyed. The completeness, admissibility, and optimality properties of search strategies which use the evaluation function f = (1 - omega)g = omega(h) are presented and interpreted using a representation of the search process in the plane. The use of multiple output operators to imply dependent successors, and thus obtain a formalism which includes all three types of representations, is discussed.
Directed graphs are associated with dynamic systems in order to determine in any given system if each state can be reached by at least one input (input reachability), or can each state reach at least one output (output reachability). Then, the structural perturbations of a dynamic system are identified as lines or points removals from the corresponding digraph, and a system is considered vulnerable at those lines or points of the digraph whose removal destroys its input or output reachability. A suitable framework is formulated for resolving the problems of reachability and vulnerability which applies to both linear and nonlinear systems alike.
A common approach to the design of user interfaces for computer systems is the menu selection technique. Each menu frame can be considered a node in an information/action network. The set of nodes and the permissible transitions between them (menu selections) form a directed graph which, in a system of substantial size, can be large and enormously complex. The solution to this problem of unmanageable complexity is the same for menu networks as for programs: the disciplined use of a set of well-defined one-in-one-out structures. This paper defines a set of such structures and offers some guidelines for their use.
Sound propagation in infinite, semiinfinite, and finite circular ducts with circumferentially varying wall admittances is investigated analytically. The infinite case is considered, and an example demonstrates the effects of wall-admittance distribution on dispersion characteristics and mode shapes. An exact solution is obtained for the semiinfinite case, a circular duct with a flanged opening: sidelobe suppression and circumferential-mode energy scattering leading to radiated-field asymmetry are found. A finite duct system with specified hard-walled pressure sources is examined in detail, evaluating reflection coefficients, transmission losses, and radiated-field directivity. Graphs and diagrams are provided, and the implications of the results obtained for the design of aircraft-turbofan inlet liners are discussed.
This paper is concerned with the integer quadratic program where the variables are constrained to belong to a given set of discrete values. This quadratic integer program is shown to be equivalent to a problem of finding the shortest path in a particular directed graph called a trellis when the matrix is a positive-definite symmetric banded matrix. An efficient procedure for solving this shortest path problem is presented which allows the solution of the integer quadratic program. This method is particularly effective when the half-bandwidth of the matrix is significantly smaller than its dimension.
An odd-even permutation and a nested dissection technique were used to circumvent the strong seriality of a system of closely coupled equations. The effect of transforming the n x n Hermitian definite positive matrix coefficient on the topology of Cholesky factors is discussed. A series of directed graphs is constructed in order to show the computational steps required for the odd-even permutation. Numerical expressions for the speed-up and efficiency of parallel N-processing techniques and sequential processing by a single computer are derived. Similar expressions are derived for the case of insufficient processing capacity. The application of the odd-even permutation to the ensemble class of computer architectures is demonstrated.
The data-processing problems associated with imaging spectrometer data are reviewed; new algorithms and optical processing solutions are advanced for this computationally intensive application. Optical decision net, directed graph, and neural net solutions are considered. Decision nets and mineral element determination of nonmixture data are emphasized here. A new Fisher/minimum-variance clustering algorithm is advanced, initialization using minimum-variance clustering is found to be preferred and fast. Tests on a 500-class problem show the excellent performance of this algorithm.
The inherent strong seriality of closely coupled systems is circumvented by defining a family of permutations for reordering equation sets whose matrix of coefficients is Hermitian block tridiagonal. The authors show how these permutations can be used to achieve relatively high concurrency in the Cholesky factorization of banded systems at the expense of introducing limited extra computations due to fill-in terms in the factors. Directed graphs are developed for the concurrent factorization of the transformed matrix of coefficients by the Cholesky algorithm. Expressions for speedup and efficiency are derived in terms of parameters of the permutation, set of equations, and machine architecture.
The SAIC has the responsibility for independent test and validation of the SSE. They have been using a mathematical functions library package implemented in Ada to test the SSE IV and V process. The library package consists of elementary mathematical functions and is both machine and accuracy independent. The SSE Ada components evaluation includes code complexity metrics based on Halstead's software science metrics and McCabe's measure of cyclomatic complexity. Halstead's metrics are based on the number of operators and operands on a logical unit of code and are compiled from the number of distinct operators, distinct operands, and total number of occurrences of operators and operands. These metrics give an indication of the physical size of a program in terms of operators and operands and are used diagnostically to point to potential problems. McCabe's Cyclomatic Complexity Metrics (CCM) are compiled from flow charts transformed to equivalent directed graphs. The CCM is a measure of the total number of linearly independent paths through the code's control structure. These metrics were computed for the Ada mathematical functions library using Software Automated Verification and Validation (SAVVAS), the SSE IV and V tool. A table with selected results was shown, indicating that most of these routines are of good quality. Thresholds for the Halstead measures indicate poor quality if the length metric exceeds 260 or difficulty is greater than 190. The McCabe CCM indicated a high quality of software products.
A graphical technique for creating distributed computer programs is investigated and a prototype implementation is described which serves as a testbed for the concepts. The type of programs under examination is restricted to those comprising relatively heavyweight parts that intercommunicate by passing messages of typed objects. Such programs are often presented visually as a directed graph with computer program parts as the nodes and communication channels as the edges. This class of programs, called parts-based programs, is not well supported by existing computer systems; much manual work is required to describe the program to the system, establish the communication paths, accommodate the heterogeneity of data types, and to locate the parts of the program on the various systems involved. The work described solves most of these problems by providing an interface for describing parts-based programs in this class in a way that closely models the way programmers think about them: using sketches of diagraphs. Program parts, the computational modes of the larger program system are categorized in libraries and are accessed with browsers. The process of programming has the programmer draw the program graph interactively. Heterogeneity is automatically accommodated by the insertion of type translators where necessary between the parts. Many decisions are necessary in the creation of a comprehensive tool for interactive creation of programs in this class. Possibilities are explored and the issues behind such decisions are presented. An approach to program composition is described, not a carefully implemented programming environment. However, a prototype implementation is described that can demonstrate the ideas presented.