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DOE OSTI2024

Development of CMOS Sensors for HEP with a US-based foundry

We will present a program to establish the first development and manufacturing of HEP-specific sensors monolithically integrated into a standard CMOS process using a US-based foundry. In collaboration with several US universities the project aims to develop Monolithic Active Pixel Sensors (MAPS) designs implemented in the 90 nm technology node, including simple test structures and multi-pixel arrays, and monolithic CMOS sensors with readout integrated circuits, perform detailed characterization of the detector prototypes and quantify their performance for HEP applications.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

DOE OSTI2025

Automating Testing of DUNE Electronics via a Finite State Machine

The Deep Underground Neutrino Experiment (DUNE) is a flagship international collaboration designed to study neutrinos tiny, nearly massless particles that may hold answers to fundamental questions about the Universe. Fermilab s Robotic Test Stand (RTS) plays a critical role in ensuring the quality of approximately 50,000 Application-Specific Integrated Circuit (ASIC) chips that will be used in DUNE s massive liquid argon detectors. These electronics will be inside the cryostat; therefore, they will need to have a high yield of working chips and low noise. To improve the automation and reliability of the RTS, this project focused on designing and implementing a Python-based finite state machine (FSM) to manage chip handling workflows. The FSM was developed as a modular software framework to coordinate robotic arm movements, manage chip tray positions, and monitor system states during testing. Key features include robust error handling routines, a pause/resume system for safe mid-cycle interruptions, and a simulation mode for iterative testing without hardware dependencies. The system was designed to prepare for seamless integration with RTS hardware components such as the robotic arm and vision system. This integration will streamline collaboration and enable efficient deployment of updates across the six total institutions performing testing. The outcomes of this internship contribute to Fermilab s mission to advance high-energy physics and support the DOE s national goals by directly improving the testing of equipment to be used in DUNE. The project also provided valuable experience in software design and contributing to the success of DUNE.

Kang, Caleb [William Rainey Harper Coll.]↗

DOE OSTI2025

Automating Testing of DUNE Electronics via a Finite State Machine

The Deep Underground Neutrino Experiment (DUNE) is a flagship international collaboration designed to study neutrinos—tiny, nearly massless particles that may hold answers to fundamental questions about the Universe. Fermilab’s Robotic Test Stand (RTS) plays a critical role in ensuring the quality of approximately 50,000 Application-Specific Integrated Circuit (ASIC) chips that will be used in DUNE’s massive liquid argon detectors. These electronics will be inside the cryostat; therefore, they will need to have a high yield of working chips and low noise. To improve the automation and reliability of the RTS, this project focused on designing and implementing a Python-based finite state machine (FSM) to manage chip handling workflows. The FSM was developed as a modular software framework to coordinate robotic arm movements, manage chip tray positions, and monitor system states during testing. Key features include robust error handling routines, a pause/resume system for safe mid-cycle interruptions, and a simulation mode for iterative testing without hardware dependencies. The system was designed to prepare for seamless integration with RTS hardware components such as the robotic arm and vision system. This integration will streamline collaboration and enable efficient deployment of updates across the six institutions performing testing. The outcomes of this internship contribute to Fermilab’s mission to advance high-energy physics and support the DOE’s national goals by directly improving the testing of equipment to be used in DUNE. The project also provided valuable experience in software design and contributing to the success of DUNE.

Kang, Caleb [Fermilab]↗

DOE OSTI2021

Integrated circuit authentication from a die material measurement

The various technologies presented herein relate to measuring a signal generated by a die-based test circuit incorporated into an IC and utilizing the measured signal to authenticate the IC. The signal can be based upon a sensor response generated by the test circuit fabricated into the die, wherein the sensor response is based upon a property of the die material. The signal can be compared with a reference value obtained from one or more test circuit(s) respectively located on one or more reference dies, wherein the reference dies are respectively cut from different wafers, and the location at which the reference dies were cut is known. If the measured signal matches the reference value, the die is deemed to be from the same cut location as the dies from which the reference value was obtained. If the measured signal does not match the reference value, the die is not authenticated.

Zortman, William A.↗

DOE OSTI2025

An Open-Source Framework for Rapid Validation of Scientific ASICs

Spacely is an open-source framework for the post-silicon validation of analog, digital, and mixed-signal ASICs (Application-Specific Integrated Circuits) which maximizes the reuse of hardware and software, reducing the time taken to achieve meaningful test results. Spacely specifically addresses the needs of small, flexible ASIC design teams commonly found in academia or research institutions which benefit most from sharing the overhead of test stand creation between many unique ASIC designs. Spacely is a set of software, firmware, and design practices. It targets two primary hardware platforms (NI-PXI and Caribou) as well as offering extensible support for bench instruments. Spacely provides a high-level Python interface to all test hardware for accessibility, while also giving more sophisticated teams the opportunity to integrate custom test firmware. The design principles of Spacely are presented in brief. Current documentation is available at https://github.com/SpacelyProject/spacely-docs.

Quinn, Adam [Fermilab]↗

DOE OSTI2024

An Open-Source Framework for Rapid Validation of Scientific ASICs

Spacely is an open-source framework for the post-silicon validation of analog, digital, and mixed-signal ASICs (Application-Specific Integrated Circuits) which maximizes the reuse of hardware and software, reducing the time taken to achieve meaningful test results. Spacely specifically addresses the needs of small, flexible ASIC design teams commonly found in academia or research institutions which benefit most from sharing the overhead of test stand creation between many unique ASIC designs. Spacely is a set of software, firmware, and design practices. It targets two primary hardware platforms (NI-PXI and Caribou) as well as offering extensible support for bench instruments. Spacely provides a high-level Python interface to all test hardware for accessibility, while also giving more sophisticated teams the opportunity to integrate custom test firmware. The design principles of Spacely are presented, along with a demonstrative example of using Spacely to test a pixel detector readout ASIC.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

DOE OSTI2021

Case Study: Field Evaluation of a Low-Cost Circuit-Level Electrical Submetering System

Circuit-level metering technologies provide the ability to monitor individual circuits within an electrical panel in a building, providing detailed power and energy consumption data at a much more granular level than was previously achievable in a cost-effective manner. While the fundamental hardware components of circuit-level—split-core current transformers (CTs) and power monitoring meters—have existed for some time, the new offerings in the market have tightly integrated these components, lower costs, and have streamlined data organization, transport, and access via software solutions accessible through web and application programming interfaces (API). NREL evaluated Meazon’s single-circuit metering system. The evaluation of the equipment under test (EUT) focused on three aspects: (1) accuracy of the data provided by the system, (2) ease of installation of this technology and ease of data integration into existing U.S. General Services Administration (GSA) analytics platforms, and (3) total cost of ownership and cost-effectiveness of the technology. The metering technology was tested in a field deployment where it was installed in low and high-voltage commercial electrical panels in the César E. Chávez Memorial Building in Denver, Colorado. The goals were to assess the metering accuracy, the ease of installation and data retrieval, and the total cost of ownership and cost-effectiveness. This technology proved easy to install by a certified electrician who completed the install of 6 meters in 2 separate panels (120/208 V and 277/480 V) and 2 circuit disconnects (along with associated commissioning) at the César E. Chávez Memorial Building in less than one day. The technology was installed in high- and low-voltage panels and with limited space in the electrical room, demonstrating the applicability of this technology to almost all commercial buildings in the GSA portfolio. Primary considerations for this technology include appropriate sizing of CTs for each circuit, selection of loads/circuits/panels that are of high value for detailed submetering (e.g., tailored for high-load devices), and how GSA would like to integrate these data with its existing energy management infrastructure. Through the field evaluation, we demonstrated data integration from the vendor system into the primary software component on the GSA enterprise-level energy management and information system, GSA Link. Data from the circuit-level metering were integrated into this platform and used to perform FDD. This demonstrated the ability of the EUT to augment existing energy management and information systems in buildings where GSA Link is deployed and provides a pathway for delivering FDD at other buildings throughout the portfolio.

29 ENERGY PLANNING, POLICY, AND ECONOMY↗

DOE OSTI2021

Tamper-Indicating Enclosures with Visually Obvious Tamper Response (Final Project Report)

Sandia National Laboratories is developing a new method for detecting penetration of tamper - indicating enclosures (TIEs). This method incorporates the use of "bleeding" materials (analogous to visually obvious, colorful bruised skin that doesn't heal) into the design of TIEs. As designed, it will allow inspectors to use simple visual observation to detect attempts to penetrate the external surfaces of a TIE, without providing adversaries the ability to repair damage. A material of this type can enhance tamper indication of current TIEs used to support treaty verification regimes. Current TIE inspections are time - consuming and rely on subjective visual assessment by an inspector, equipment such as eddy current or camera devices, or involve approaches that may be limited due to application environment. The complexities and requirements that volumetric sealing methods (or TIEs) must address are: (1) enclosures that are non - standard in size/shape; (2) enclosures that may be inspectorate - or facility - owned; (3) finding tamper attempts that are difficult and time consuming for an inspector to locate; (4) enclosures that are reliable and durable enough to survive the conditions that exist in the operating environment (including facility handling); and (5) methods that prevent adversaries from repairing penetrations. Early project R&D [1] focused on encapsulated transition metals. Due to the challenges associated with the transition metal - based approach, a mitigation approach was investigated resulting in two separate research paths — one that involves fabricating custom TIE molds that meet the specific (size and shape) needs of safeguards equipment a nd one that can be deployed as a sprayed on or painted coating to an existing TIE or surface. The "custom mold" approach is based on creating thin layers of materials that , when penetrated, expose an inner material to O 2 which causes an irreversible color change. The "in-situ coating" approach is based on applying a sensor solution containing color changing microcapsules that bleed when the microcapsule is ruptured. The anticipated benefits of this work are passive, flexible, scalable, robust , cost-effective TIEs with visually obvious responses to tamper attempts. This provides more efficient and effective monitoring , as inspectors will require little or no additional equipment and will be able to detect tamper without extensive time - consuming visual examination. Applications include custom TIEs (cabinets , equipment enclosures or seal bodies ), or spray-coating/painting onto facility-owned items, walls or structures, or circuit boards. The paper describes research and testing completed to-date on the method and integration of select system components.

36 MATERIALS SCIENCE↗

DOE OSTI2025

SpacelyProject/spacely-docs

Quinn, Adam [Fermi National Accelerator Laboratory↗

DOE OSTI2026

TTDAQ: A Continuous Flow, Timing and Trigger DAQ System

Final Scientific/Technical Report for DOE Award DE-SC0019581, “TTDAQ: A Continuous Flow, Timing and Trigger DAQ System.” The report summarizes Telluric Labs’ Phase II STTR work developing silicon-photonic building blocks for a software-defined, continuous-flow, trigger-less data acquisition system for next-generation high-energy and nuclear-physics detectors. The project focused on radiation-hard photonic integrated circuits, remote optical illumination, dense wavelength-division multiplexing, and a differential microring-resonator transceiver architecture designed to improve high-speed optical link stability and bandwidth. The report describes project objectives, technical accomplishments, AIM Photonics tape-outs, bench characterization, radiation-hardness testing, deferred integration work, and potential applications beyond physics readout.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

DOE OSTI2023

In-Pixel Readout IC with compact in-pixel ADC for Pixel detectors at HL LHC

The prototype Smart Pixel concept test chip (SP28), designed in a CMOS 28 nm bulk process, is a proof of concept readout integrated circuit (ROIC) designed for a future Phase III High Luminosity upgrade of the Large Hadron Collider. It employs a synchronous analog to digital converter (ADC) for the front-end design, with signal processing and data conversion within a single bunch crossing of 25 ns. It is therefore capable of accurately detecting hits occurring in consecutive bunch crossings, without off-time registration of events and pileup insensitivity, making it particularly suitable for the inner most layers of the vertex detector. The ROIC consists of a matrix of 32 × 16 pixels, each 25 × 25 µm 2 in size. Each pixel contains a charge sensitive preamplifer with leakage current compensation, three auto-zero comparators for a 2-bit fash-type ADC. The total power consumption is approximately 5 µW per pixel. The measured noise at the output of all the hit comparators across the ROIC is < 90 e- with threshold dispersion < 45 e-RMS, which allows an in-time threshold setting of ≈ 475 e-.

Parpillon, Benjamin↗

DOE OSTI2025

Medium Voltage Testbed for Comparing Advanced Power Line Sensors vs. Transformers with Electrical Grid Events

Electrical utilities have relied upon potential transformers (PTs) and current transformers (CTs) for very accurate metering and to provide reliable signals for protective relays. These devices measure phase voltages and currents and are commissioned by electrical engineers. PTs/CTs can detect and react to various electrical anomalies that could adversely affect electrical grid operations. Less expensive alternative sensing technologies offer the possibility of wider deployment, particularly in grids that employ distributed energy resources. In this work, the performance of an advanced medium-voltage sensor is compared with that of a reference PT and a CT and experimentally evaluated for different power grid scenarios on an advanced outdoor power line sensor testbed at the U.S. Department of Energy’s Oak Ridge National Laboratory. The sensor is based on a capacitive divider for voltage monitoring and a Rogowski coil with an integrator for current monitoring. This study simulated a power grid model based on a utility circuit at the Riverside EPB of Chattanooga. The simulation circuit was created with MATLAB/Simulink software and was integrated into an RT-LAB project to run with the OP4510 real-time simulator at the OPLST. During the tests, the real-time simulations were run for 40 s, and the signal to record the test event with the power meter was set at 30 s for the event-trigger circuit. The advanced outdoor power line sensor testbed has a real-time simulator that is used to generate transient scenarios (e.g., electrical faults, capacitor bank operation, and service restoration), while the analog signals are recorded by the same high-resolution power meter. The behaviors of analog signals, harmonic components, total harmonic distortion, and crest factors are assessed for this power line sensor and compared with those of the reference PT/CT because of the absence of testing standards for advanced outdoor power line sensors. The results showed that this OPLS technology responded identically to the PT and CT under all conditions.

Piesciorovsky, Emilio [ORNL]↗

DOE OSTI2023

Contact-Less Integrity Verification of Microelectronics Using Near-Field EM Analysis

Modern microelectronics life-cycle and supply chain ecosystem bring multiple untrusted entities, which can compromise their integrity. A major integrity issue of microelectronics stems from piracy of intellectual properties (IP) and counterfeiting, which causes significant revenue loss to the semiconductor manufacturers. Further, these components often lead to compromised functionality, reliability, security, and safety of an electronic system. This paper presents secure information transmission and probing methods for verifying the integrity of digital integrated circuit (ICs) based on their electromagnetic (EM) near-field emissions and thereby protecting systems against counterfeit components. The proposed method has been tested on both high-level instructions executed by microprocessors or Systems-on-Chip (serving as examples of software), and also logic circuits within FPGA fabrics and ASICs (serving as examples of hardware). The authentication information required by each digital system is generated using a pseudo-random number generator circuit and securely transmitted via near-field magnetic emissions. The authorized party can probe these emissions using a near-field probe, process the acquired signals to improve the signal-to-noise ratio (SNR), and then recover the secure information through matched filtering. Experimental results from commercial SoCs are used to demonstrate the proposed technique. Methods for reducing EM interference during integrity verification of both FPGAs and ASICs are also described.

47 OTHER INSTRUMENTATION↗

DOE OSTI2022

Damage of prismatic lithium‐ion cells subject to bending: Test, model, and detection

Abstract The mechanically induced internal short circuit (ISC) is one of the major safety concerns of lithium‐ion batteries. Mechanical abuse tests are often performed to evaluate the integrity and safety of lithium‐ion batteries under mechanical loadings. Except for the widely explored compression‐dominated indentation tests, bending is another typical real‐world loading condition that is tension‐dominated. To investigate the mechanical damage and ISC behavior of batteries under bending, we carried out controlled three‐point bending tests in four progressive steps on prismatic battery cells with maximum deflections ranging from 38% to 76% of the cell thickness. None of the tested cells experienced an ISC. We then conducted 3D X‐ray computed tomography (CT) scanning on the bent cells after unloading. X‐ray CT images showed three out of the four tested cells have extensive cracking in the electrode layers at the bottom side (opposite to the loading head). This indicates that cracking does not necessarily lead to an ISC under bending. Electrochemical impedance spectroscopy was also measured on the bent cells and substantial changes were observed. Both the bulk resistance and charge‐transfer resistance increased significantly after bending, which could influence the battery performance and lifespan. We then developed a detailed finite (FE) element model to further investigate the mechanical deformation and failure mechanisms. The FE model successfully predicts the load–displacement response and reproduces the deformation patterns. The findings and the FE model developed in the present study provide useful insights and tools for the battery structure and crash safety design. image

25 ENERGY STORAGE↗

DOE OSTI2024

Eliminating Signal Bias Caused by Vacuum System Backstreaming in the Diagnostic Residual Gas Analyzer of ITER

In fusion neutral gas analysis, such as with the Diagnostic Residual Gas Analyzer (DRGA) for ITER, the primary measurement range of interest comprises the low-amu species (1 to 6), especially deuterium and helium. The challenge in successfully obtaining accurate measurements is two-fold. First, the sensitivity of the method must be sufficient to resolve trace amounts accurately; typically, one percent or less. Second, the gas signal from the fusion processes must be free of bias caused by the latent presence (from system outgassing and/or vacuum backstreaming) of these gases to enable accurate interpretation of the measured signal. This latter criterion can be problematic for the lightest gases since there is a propensity for some fraction of the pumped gas load to undergo a phenomenon known as backstreaming. This behavior is manifested in pumping systems for gas properties related to relative atomic weight (lightest) and size (smallest). Backstreaming results in a significant amount of the pumped gas undertaking a reverse flow and re-entering the measurement region; thus, contaminating the forward, real-time measurement. To fully eliminate this adverse effect, a conductance-limiting device – or orifice – has been installed in the high-vacuum pumping system of the present ITER DRGA prototype. The system was already equipped with a secondary turbomolecular pump (TMP), but with limited effectiveness against backstreaming in the inter-pump volume (IPV). This orifice is placed within the suction inlet coupling of the secondary TMP, which is downstream of the IPV. Its objective is to eliminate the backstreaming phenomenon by increasing the back pressure in the IPV. However, the orifice sizing must take into consideration other factors, such as the diagnostic measurement objectives. For example, in the ITER DRGA, one of the measurement requirements is a dynamic response time of ~1s. Fortunately, an added benefit of the pumping restriction created by the orifice is that the upstream pressure increase is beneficial for the DRGA’s optical gas analysis (OGA) sensors. These sensors are attached to the IPV in the present design. The glow discharges, when used as an OGA light source, will typically have a brighter light emission with increasing plasma cell pressure. In addition to the fusion machine research sector, there are other potential applications of this pumping technique where the monitoring of lighter gas concentrations is essential, such as the photolithography process for the semiconductor fabrication of integrated circuits. This presentation will describe the vacuum system used to demonstrate a process to eliminate backstreaming as well as show test results to verify the accomplishment of this critical objective.

Marcus, Chris↗

DOE OSTI2023

In-pixel AI for lossy data compression at source for X-ray detectors

Integrating neural networks for data compression directly in the Read-Out Integrated Circuits (ROICs), i.e. the pixelated front-end, would result in a significant reduction in off-chip data transfer, overcoming the I/O bottleneck. Our ROIC test chip (AI-In-Pixel-65) is designed in a 65 nm Low Power CMOS process for the readout of pixelated X-ray detectors. Each pixel consists of an analog front-end for signal processing and a 10b analog-to-digital converter operating at 100KSPS. Here, we compare two non-reconfigurable techniques, Principal Component Analysis (PCA) and an AutoEncoder (AE) as lossy data compression engines implemented within the pixelated area. The PCA algorithm achieves 50$×$ compression, adds one clock cycle latency, and results in a 21% increase in the pixel area. The AE achieves 70$×$ compression, adds 30 clock cycle latency, and results in a similar area increase.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

DOE OSTI2023

High-fidelity trapped-ion qubit operations with scalable photonic modulators

Abstract Experiments with trapped ions and neutral atoms typically employ optical modulators in order to control the phase, frequency, and amplitude of light directed to individual atoms. These elements are expensive, bulky, consume substantial power, and often rely on free-space I/O channels, all of which pose scaling challenges. To support many-ion systems like trapped-ion quantum computers or miniaturized deployable devices like clocks and sensors, these elements must ultimately be microfabricated, ideally monolithically with the trap to avoid losses associated with optical coupling between physically separate components. In this work we design, fabricate, and test an optical modulator capable of monolithic integration with a surface-electrode ion trap. These devices consist of piezo-optomechanical photonic integrated circuits configured as multi-stage Mach-Zehnder modulators that are used to control the intensity of light delivered to a single trapped ion on a separate chip. We use quantum tomography employing hundreds of multi-gate sequences to enhance the sensitivity of the fidelity to the types and magnitudes of gate errors relevant to quantum computing and better characterize the performance of the modulators, ultimately measuring single qubit gate fidelities that exceed 99.7%.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

DOE OSTI2020

Logical gates embedding in artificial spin ice

The realization and study of arrays of interacting magnetic nanoislands, such as artificial spin ices, have reached mature levels of control that allow design and demonstration of exotic, collective behaviors not seen in natural materials. Advances in the direct manipulation of their local, binary moments also suggest a use as nanopatterned, interacting memory media, for computation within a magnetic memory. Recent experimental work has demonstrated the possibility of building logic gates from clusters of interacting magnetic domains, and yet the possibility of large scale integration of such gates can prove problematic even at the theoretical level. Here we introduce theoretically complete sets of logical gates, in principle realizable in an experiment, and we study the feasibility of their integration into tree-like circuits. By evaluating the fidelity control parameter between their collective behavior and their expected logic functionality we determine conditions for integration. Also, we test our numerical results against the presence of disorder in the couplings, showing that the design gate structure is robust to small coupling perturbations, and thus possibly to small imperfections in the fabrication of the islands.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗