Search NASA⌕ Search

SEARCH · Search NASA

Results for “microprocessor design”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 37 records · Page 2

Design description of a microprocessor based Engine Monitoring and Control unit (EMAC) for small turboshaft

Research programs have demonstrated that digital electronic controls are more suitable for advanced aircraft/rotorcraft turbine engine systems than hydromechanical controls. Commercially available microprocessors are believed to have the speed and computational capability required for implementing advanced digital control algorithms. Thus, it is desirable to demonstrate that off-the-shelf microprocessors are indeed capable of performing real time control of advanced gas turbine engines. The engine monitoring and control (EMAC) unit was designed and fabricated specifically to meet the requirements of an advanced gas turbine engine control system. The EMAC unit is fully operational in the Army/NASA small turboshaft engine digital research program.

Baez, A. N.↗

Microprocessor user support at Langley Research Center

The use of microprocessors pose significant problems including: (1) a long learning process for proficient use of microprocessors; (2) the requirement for extensive support in both hardware and software; and (3) the need for coordination and sharing of the creative effort to avoid unnecessary duplication. To address these problems, Langley Research Center has established a microprocessor users committee to provide an advisory interface for management and users, and is training microprocessor users. A newsletter is published to disseminate information among microprocessor users. Both cross software on the central computer complex and microprocessor development systems are used to support the design of microprocessor based systems. Each of these activities is reviewed with special emphasis given to the microprocessor support available from the central computer complex. The effectiveness of the approach being taken at Langley is assessed and specific hardware and software development efforts that are targeted toward enhancing the existing microprocessing support are discussed.

Tucker, J. H.↗

Design of a microprocessor-based Control, Interface and Monitoring (CIM unit for turbine engine controls research

High speed minicomputers were used in the past to implement advanced digital control algorithms for turbine engines. These minicomputers are typically large and expensive. It is desirable for a number of reasons to use microprocessor-based systems for future controls research. They are relatively compact, inexpensive, and are representative of the hardware that would be used for actual engine-mounted controls. The Control, Interface, and Monitoring Unit (CIM) contains a microprocessor-based controls computer, necessary interface hardware and a system to monitor while it is running an engine. It is presently being used to evaluate an advanced turbofan engine control algorithm.

Delaat, J. C.↗

Case Study of the Design of a Viterbi Decoder

This paper describes the design of an ASIC performing the Viterbi decoder function with a constraint length of 15 and a speed of 4.4 Mb/s. The architecture of the chip is described, as well as the design challenges which were overcome. The author also describes the successful application of the design system.

Viterbi decoder ASIC microprocessor design↗

Managing Software Design and Design Changes

Microprocessor-based system for document production work scheduling, and change control and management information aids in design, development, and control of software. Main components Z80 microprocessor, floppydisk and hard-disk drives, and a character printer. System linked to large computer. Major software components are control program monitor (CP/M), text-editing and wordprocessing system, workbreakdown-schedule processor, and data-base management tool.

Loesh, R. E.↗

Suspension cell culture in microgravity and development of a space bioreactor

NASA has methodically developed unique suspension type cell and recovery apparatus culture systems for bioprocess technology experiments and production of biological products in microgravity. The first space bioreactor has been designed for microprocessor control, no gaseous headspace, circulation and resupply of culture medium, and slow mixing in very low shear regimes. Various ground based bioreactors are being used to test reactor vessel design, on-line sensors, effects of shear, nutrient supply, and waste removal from continuous culture of human cells attached to microcarriers. The small (500 ml) bioreactor is being constructed for flight experiments in the Shuttle middeck to verify systems operation under microgravity conditions and to measure the efficiencies of mass transport, gas transfer, oxygen consumption, and control of low shear stress on cells.

Morrison, Dennis R.↗

Human cell culture in a space bioreactor

Microgravity offers new ways of handling fluids, gases, and growing mammalian cells in efficient suspension cultures. In 1976 bioreactor engineers designed a system using a cylindrical reactor vessel in which the cells and medium are slowly mixed. The reaction chamber is interchangeable and can be used for several types of cell cultures. NASA has methodically developed unique suspension type cell and recovery apparatus culture systems for bioprocess technology experiments and production of biological products in microgravity. The first Space Bioreactor was designed for microprocessor control, no gaseous headspace, circulation and resupply of culture medium, and slow mixing in very low shear regimes. Various ground based bioreactors are being used to test reactor vessel design, on-line sensors, effects of shear, nutrient supply, and waste removal from continuous culture of human cells attached to microcarriers. The small Bioreactor is being constructed for flight experiments in the Shuttle Middeck to verify systems operation under microgravity conditions and to measure the efficiencies of mass transport, gas transfer, oxygen consumption and control of low shear stress on cells.

Morrison, Dennis R.↗

Space Bioreactor Science Workshop

The first space bioreactor has been designed for microprocessor control, no gaseous headspace, circulation and resupply of culture medium, and a slow mixing in very low shear regimes. Various ground based bioreactors are being used to test reactor vessel design, on-line sensors, effects of shear, nutrient supply, and waste removal from continuous culture of human cells attached to microcarriers. The small (500 ml) bioreactor is being constructed for flight experiments in the Shuttle middeck to verify systems operation under microgravity conditions and to measure the efficiencies of mass transport, gas transfer, oxygen consumption, and control of low shear stress on cells. Applications of microcarrier cultures, development of the first space bioreactor flight system, shear and mixing effects on cells, process control, and methods to monitor cell metabolism and nutrient requirements are among the topics covered.

Morrison, Dennis R.↗

Report on the formal specification and partial verification of the VIPER microprocessor

The formal specification and partial verification of the VIPER microprocessor is reviewed. The VIPER microprocessor was designed by RSRE, Malvern, England, for safety critical computing applications (e.g., aircraft, reactor control, medical instruments, armaments). The VIPER was carefully specified and partially verified in an attempt to provide a microprocessor with completely predictable operating characteristics. The specification of VIPER is divided into several levels of abstraction, from a gate-level description up to an instruction execution model. Although the consistency between certain levels was demonstrated with mechanically-assisted mathematical proof, the formal verification of VIPER was never completed.

Brock, Bishop↗

The space telescope scientific instruments

The paper describes the space telescope with a 2.4 m aperture to be launched at 500 km altitude in late 1983. Four axial-bay and one radial-bay scientific instrument, a wide-field and planetary camera, a faint-object camera, a faint-object spectrograph, and a high-speed photometer are to be installed to conduct the initial observations. The axial instruments are constrained to envelopes with dimensions 0.9 x 0.9 x 2.2 m and their masses cannot exceed 317 kg. The observatory will also be equipped with fine-guidance sensors and a microprocessor. The design concepts of the instruments are outlined and some of the astronomical capabilities including studies of distant and local galaxies, physical properties of quasars, interrelations between quasars and active galactic nuclei are mentioned.

Leckrone, D. S.↗

Laser Rangefinder and Remote Profilometer

Proposed laser rangefinder and profilometer operates with precision of about 1mm at ranges of up to 100m. With scanning optics, device could track objects or accurately measure shapes of objects in field of view. New microprocessor-controlled design uses variable-length fiber-optic delay line as distance reference. New rangefinding method used in vision systems for industrial robots.

Mclauchlan, J. M.↗

MST radar transmitter control and monitor system

A generalized transmitter control and monitor card was developed using the Intel 8031 (8051 family) microprocessor. The design was generalized so that this card can be utilized for virtually any control application with only firmware changes. The block diagram appears in Figure 2. The card provides for local control using a 16 key keypad (up to 64 keys are supported). The local display is four digits of 7 segment LEDs. The display can indicate the status of all major system parameters and provide voltage readout for the analog signal inputs. The card can be populated with only the chips required for a given application. Fully populated, the card has two RS-232 serial ports for computer communications. It has a total of 48 TTL parallel lines that can define as either inputs or outputs in groups of four. A total of 32 analog inputs with a 0-5 volt range are supported. In addition, a real-time clock/calendar is available if required. A total of 16 k bytes of ROM and 16 k bytes of RAM is available for programming. This card can be the basis of virtually any monitor or control system with appropriate software.

Brosnahan, J. W.↗

Verification of the FtCayuga fault-tolerant microprocessor system. Volume 2: Formal specification and correctness theorems

Presented here is a formal specification and verification of a property of a quadruplicately redundant fault tolerant microprocessor system design. A complete listing of the formal specification of the system and the correctness theorems that are proved are given. The system performs the task of obtaining interactive consistency among the processors using a special instruction on the processors. The design is based on an algorithm proposed by Pease, Shostak, and Lamport. The property verified insures that an execution of the special instruction by the processors correctly accomplishes interactive consistency, providing certain preconditions hold, using a computer aided design verification tool, Spectool, and the theorem prover, Clio. A major contribution of the work is the demonstration of a significant fault tolerant hardware design that is mechanically verified by a theorem prover.

Bickford, Mark↗

Small Microprocessor for ASIC or FPGA Implementation

A small microprocessor, suitable for use in applications in which high reliability is required, was designed to be implemented in either an application-specific integrated circuit (ASIC) or a field-programmable gate array (FPGA). The design is based on commercial microprocessor architecture, making it possible to use available software development tools and thereby to implement the microprocessor at relatively low cost. The design features enhancements, including trapping during execution of illegal instructions. The internal structure of the design yields relatively high performance, with a significant decrease, relative to other microprocessors that perform the same functions, in the number of microcycles needed to execute macroinstructions. The problem meant to be solved in designing this microprocessor was to provide a modest level of computational capability in a general-purpose processor while adding as little as possible to the power demand, size, and weight of a system into which the microprocessor would be incorporated. As designed, this microprocessor consumes very little power and occupies only a small portion of a typical modern ASIC or FPGA. The microprocessor operates at a rate of about 4 million instructions per second with clock frequency of 20 MHz.

Kleyner, Igor↗

Microprocessor-to-system/370 interface

The design and operation of a microprocessor interface unit which allows use of a computer terminal for communication at 110 or 300 baud both with a central host computer and with the microprocessor monitor are documented. Additionally, the interface permits the host computer to load the microprocessor memory directly with object code, avoiding the use of intermediate data storage such as paper tape. The central computer, containing an assembler language processor for the target microcomputer, can be used from the terminal with all the flexibility offered by the virtual machine facility, producing object code for the micro plus program listings and supporting outputs. The object code can then be loaded directly to the micro and the same terminal device used to run the micro program, communicating with the micro's monitor routine.

Lilley, R. W.↗

Processor architectures utilizing magnetic bubble and semi-conductor memories

To aid work being conducted on the feasibility of a low cost Omega navigational receiver, a control panel was designed and constructed according to supplied specifications. Since the proposed Omega receiver is designed around a microprocessor, software engineering necessary for control panel operation is included in the design. The control panel is to be used as an operational model for use in the design of a prototype receiver. A detailed description of the hardware design is presented along with a description of the software needed to operate the panel. A complete description of the operating procedures for the panel are also included.

Parrish, E. A., Jr.↗