Search NASASearch

SEARCH · Search NASA

Results for “packaging”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 37 records · Page 2

Electrical and Dielectric Characterizations of HTCC Electronic Packages for High Temperature Harsh Environment Applications

A prototype high temperature co-fired ceramic (HTCC) alumina packaging system composed of a 32-I/Os package and a compatible circuit board was previously developed and demonstrated for long term operation in 500 °C environments. The electrical / dielectric parasitic parameters of that chip level package were characterized and reported. This co-fired packaging system with platinum (Pt) conductor has successfully facilitated tests of silicon carbide (SiC) analog and digital integrated circuits (ICs) developed at NASA GRC at 500°C for up to 10,000 hours in ambient oven environment and 60 earth days in Venus surface environment with simulated temperature, pressure, and chemical constituents. Based on these previous results, this paper introduces new designs of Pt-HTCC packages with 16, 24, and 44 I/Os for packaging a new generation SiC ICs with 8, 24, 56, 62, and 72 I/Os to be tested in high temperature harsh environments. The package with 44 I/Os is specifically designed for the new SiC ICs with 56, 62, and 72-I/Os and electrical connection needs, the power pads of this package are consolidated, and an array of I/O pads distributed on separated vertical levels (inside the package) is used to control the overall package dimensions and mitigate the parasitic effects at high temperatures. This paper will present the detailed design of these chip-level packages and results of electrical and dielectric characterization of these newly fabricated chip-level Pt-HTCC packages.

High temperature

Reliability of CCGA 1152 and CCGA 1272 Interconnect Packages for Extreme Thermal Environments

Ceramic column grid array (CCGA) packages have been increasing in use based on their advantages of high interconnect density, very good thermal and electrical performance, and compatibility with standard surface-mount packaging assembly processes. CCGA packages are used in space applications such as in logics and microprocessor functions, telecommunications, flight avionics, and payload electronics. As these packages tend to have less solder joint strain relief than leaded packages, the reliability of CCGA packages is very important for short- and long-term space missions. Certain planetary satellites require operations of thermally uncontrolled hardware under extremely cold and hot temperatures with large diurnal temperature change from day to night. The planetary protection requires the hardware to be baked at +125 C for 72 hours to kill microbugs to avoid any biological contamination, especially for sample return missions. Therefore, the present CCGA package reliability research study has encompassed the temperature range of 185 to +125 C to cover various NASA deep space missions. Advanced 1152 and 1272 CCGA packaging interconnects technology test hardware objects have been subjected to ex treme temperature thermal cycles from 185 to +125 C. X-ray inspections of CCGA packages have been made before thermal cycling. No anomalous behavior and process problems were observed in the x-ray images. The change in resistance of the daisy-chained CCGA interconnects was measured as a function of increasing number of thermal cycles. Electrical continuity measurements of daisy chains have shown no anomalies, even until 596 thermal cycles. Optical inspections of hardware have shown a significant fatigue for CCGA 1152 packages over CCGA 1272 packages. No catastrophic failures have been observed yet in the results. Process qualification and assembly are required to optimize the CCGA assembly processes. Optical inspections of CCGA boards have been made after 258 and 596 thermal cycles. Corner columns have started showing significant fatigue per optical inspection results.

Ramesham, Rajeshuni

ORNL Package Testing Program Overview

When transporting radioactive or hazardous materials, safety and security are top priorities. Packaging and transportation regulations require reliable evidence that containers have passed rigorous performance tests to ensure that the public and the environment are protected from the hazardous nature of the cargo. Because of its long history in energy and security research, Oak Ridge National Laboratory (ORNL) has needed to ship hazardous packages for the past 65 years. Since the 1940s, ORNL has made significant contributions to transportation regulations and has been at the forefront of regulatory testing development. Today, ORNL is a leader in standards development and testing of designs of radioactive material packages. ORNL plays a critical role in ensuring the safe transportation of radioactive materials across the United States by executing rigorous testing campaigns of packages that contain radioactive materials. Early testing activities focused on supporting the development of transportation regulations established by both the International Atomic Energy Agency (IAEA) and the United States. Currently, all package testing activities are performed under the Package Testing Program (PTP) at the Package Evaluation Facility (PEF) located at the National Transportation Research Center (NTRC), which is about 10 miles from the main ORNL campus. The PTP develops and evaluates testing solutions, ensuring that they are safe efficient, and in compliance with regulatory requirements. The vision for the PTP is to be a world-class leader in the evaluation and testing of radioactive and hazardous material packages. The key elements necessary to fulfill this mission are an experienced and professional staff; state-of-the-art facilities, equipment, and instrumentation; and completion of challenging programs and projects important to package transportation. Collaborations with other internal and external organizations play a significant role in building stronger teams and achieving this vision. By adhering to and advancing regulatory standards, ORNL’s PTP supports development of safe and compliant packaging, safeguarding the transportation process from potential risks associated with radioactive material logistics.

11 NUCLEAR FUEL CYCLE AND FUEL MATERIALS

High-performance packaging for monolithic microwave and millimeter-wave integrated circuits

Packaging schemes were developed that provide low-loss, hermetic enclosure for advanced monolithic microwave and millimeter-wave integrated circuits (MMICs). The package designs are based on a fused quartz substrate material that offers improved radio frequency (RF) performance through 44 gigahertz (GHz). The small size and weight of the packages make them appropriate for a variety of applications, including phased array antenna systems. Packages were designed in two forms; one for housing a single MMIC chip, the second in the form of a multi-chip phased array module. The single chip array module was developed in three separate sizes, for chips of different geometry and frequency requirements. The phased array module was developed to address packaging directly for antenna applications, and includes transmission line and interconnect structures to support multi-element operation. All packages are fabricated using fused quartz substrate materials. As part of the packaging effort, a test fixture was developed to interface the single chip packages to conventional laboratory instrumentation for characterization of the packaged devices. The package and test fixture designs were both developed in a generic sense, optimizing performance for a wide range of possible applications and devices.

Shalkhauser, K. A.

Technical Challenges in Reliable Microelectronics Packaging of Microelectromechanical Systems (MEMS) for Space Applications

MEMS have shown a significant promise in the last decade for a variety of applications such as air-bag, pressure sensors, accelerometer, microgyro, chemical sensors, artificial nose, etc. Standard semiconductor microelectronics packaging needs the integrated circuits (IC) to be protected from the harsh environment, and provide electrical communication with the other parts of the circuit, facilitate thermal dissipation efficiently, and impart mechanical strength to the silicon die. Microelectronics packaging involves wafer dicing, bonding, lead attachment, encapsulation to protect from the environment, electrical integrity, and package leak tests to assure the reliable IC packaging technology. Active elements or microstructures in MEMS devices often interfaces with the hostile environment where packaging leak tests and testing of such devices using chemical and mechanical parameters will be very difficult and expensive. Packaging of MEMS is significantly complex as they serve to protect from the environment and microstructures interact with the same environment to measure or affect the desired physical or chemical parameters. The most of the silicon circuitry is sensitive to temperature, moisture, magnetic field, light, and electromagnetic interference. The package must then protect the on-board silicon circuitry while simultaneously exposing the microsensor to the effect it measures to assure the packaging technology of MEMS. MEMS technology has a major application in developing a microspacecraft for space systems provided reliability of MEMS packaging technology is sufficiently addressed. This MEMS technology would eventually miniaturize many of the components of the spacecraft to reach the NASA's goal by building faster, cheaper, better, smaller spacecraft to explore the space more effectively. This paper discusses the latest developments in the MEMS technology and challenging technical issues in the packaging of hermetically sealed and non-hermetically sealed MEMS sensor devices for microspacecraft applications.

Ramesham, Rajeshuni

Packaging Technology Developed for High-Temperature Silicon Carbide Microsystems

High-temperature electronics and sensors are necessary for harsh-environment space and aeronautical applications, such as sensors and electronics for space missions to the inner solar system, sensors for in situ combustion and emission monitoring, and electronics for combustion control for aeronautical and automotive engines. However, these devices cannot be used until they can be packaged in appropriate forms for specific applications. Suitable packaging technology for operation temperatures up to 500 C and beyond is not commercially available. Thus, the development of a systematic high-temperature packaging technology for SiC-based microsystems is essential for both in situ testing and commercializing high-temperature SiC sensors and electronics. In response to these needs, researchers at Glenn innovatively designed, fabricated, and assembled a new prototype electronic package for high-temperature electronic microsystems using ceramic substrates (aluminum nitride and aluminum oxide) and gold (Au) thick-film metallization. Packaging components include a ceramic packaging frame, thick-film metallization-based interconnection system, and a low electrical resistance SiC die-attachment scheme. Both the materials and fabrication process of the basic packaging components have been tested with an in-house-fabricated SiC semiconductor test chip in an oxidizing environment at temperatures from room temperature to 500 C for more than 1000 hr. These test results set lifetime records for both high-temperature electronic packaging and high-temperature electronic device testing. As required, the thick-film-based interconnection system demonstrated low (2.5 times of the room-temperature resistance of the Au conductor) and stable (decreased 3 percent in 1500 hr of continuous testing) electrical resistance at 500 C in an oxidizing environment. Also as required, the electrical isolation impedance between printed wires that were not electrically joined by a wire bond remained high (greater than 0.4 GW) at 500 C in air. The attached SiC diode demonstrated low (less than 3.8 W/mm2) and relatively consistent dynamic resistance from room temperature to 500 C. These results indicate that the prototype package and the compatible die-attach scheme meet the initial design standards for high-temperature, low-power, and long-term operation. This technology will be further developed and evaluated, especially with more mechanical tests of each packaging element for operation at higher temperatures and longer lifetimes.

Chen, Liang-Yu

Packaging Concerns and Techniques for Large Devices: Challenges for Complex Electronics

NASA is going to have to accept the use of non-hermetic packages for complex devices. There are a large number of packaging options available. Space application subjects the packages to stresses that they were probably not designed for (vacuum for instance). NASA has to find a way of having assurance in the integrity of the packages. There are manufacturers interested in qualifying non-hermetic packages to MIL-PRF-38535 Class V. Government space users are agreed that Class V should be for hermetic packages only. NASA is working on a new Class for non-hermetic packages for M38535 Appendix B, "Class Y". Testing for package integrity will be required but can be package specific as described by a Package Integrity Test Plan. The plan is developed by the manufacturer and approved by DSCC and government space.

LaBel, Kenneth A.

Thermal cycling testing to failure of a ceramic column grid array package for space applications

Ceramic column grid array (CCGA) packages have been used increasingly in logic and microprocessor functions, telecommunications, flight avionics boards, payload electronics boards, engineering navigational and science cameras, electronic assemblies, and other applications, because of their inherent advantages such as high electrical interconnect density, very good thermal and electrical performance, and compatibility with standard surface-mount technology (SMT) packaging assembly processes. Because these advanced electronic packages tend to have less solder-joint strain-relief than do leaded flat-pack electronic packages, the reliability of CCGA packages in challenging thermal environments is a very important consideration for their short- and long-term use in JPL-NASA space missions. In this study, we assembled daisy chains of polyimide printed wiring boards from CCGA-interconnect packages, inspected the boards nondestructively, and then subjected them to thermal cycling to assess their reliability in thermal environments from +125°C to -40°C±25°C. The test hardware consists of a CCGA 1752 package (CN version). The package was divided into four daisy-chained sections that were electrically monitored for their continuity during thermal cycling. The CCGA 1752 package is roughly 45 mm × 45 mm with a 42-mm × 42-mm array of 80%/20% Pb/Sn columns on a 1.00-mm pitch. The resistance of the daisy-chained CCGA interconnects was continuously monitored during thermal cycling in a gaseous nitrogen environment. Electrical continuity resistance measurements as a function of thermal cycling are reported here; tests to date have shown significant change to an open circuit in daisy-chain resistance as a function of thermal cycling. The change in interconnect resistance becomes increasingly noticeable with increasing number of thermal cycles. This paper describes the experimental thermal-cycling test results of CCGA 1752 package reliability testing under an extremely wide temperature range. The first failure was observed at 1479th thermal cycle. We report the thermal-cycle reliability test data for ~2500 thermal cycles.

Ramesham, Rajeshuni

Pt/HTCC Alumina based Electronic Packaging System and Integration Processes for High Temperature Harsh Environment Applications

Electronic devices capable of operation at 500°C are required for long term Venus surface missions, as well as for in situ monitoring and control of next generation aeronautical engines. High temperature sensors and electronics can also find many applications in military, and energy and automobile industries. Various silicon carbide (SiC) sensors and electronic devices have been developed for operation at 500 °C, and a compatible packaging system is needed for long term test and deployment of these high temperature devices. High temperature co-fired ceramics (HTCC) alumina with platinum (Pt) conductor was proposed for high temperature electronic packaging. A prototype Pt/HTCC alumina packaging system including chip-level package and circuit board has been briefly reported previously for long-term electrical testing of SiC integrated circuits at 500 °C, and brief testing at much higher temperatures. HTCC alumina is an excellent dielectric material with acceptable dielectric constant and low dielectric loss over wide temperature and frequency ranges. Pt is chemically noble and can be co-fired with HTCC alumina in air ambient producing a viable electronic packaging material system for high temperature applications. This paper presents a more detailed description of this packaging system including prototype low power packages and circuit boards based on HTCC alumina and Pt metallization for 500°C and other harsh environment applications. The key technical considerations for chip-level packaging and circuit board assembly, including materials and processes for 500 °C durable wire-bonding and SiC die attach, and integration of multi-chip circuit boards, are presented. Experimental test results of this packaging approach applied to SiC integrated circuits at 500 °C and 700°C are discussed as well.

High temperature

Pt/HTCC Alumina based Electronic Packaging System and Integration Processes for High Temperature Harsh Environment Applications

Electronic devices capable of operation at 500°C are required for long term Venus surface missions, as well as for in situ monitoring and control of next generation aeronautical engines. High temperature sensors and electronics can also find many applications in military, and energy and automobile industries. Various silicon carbide (SiC) sensors and electronic devices have been developed for operation at 500 °C, and a compatible packaging system is needed for long term test and deployment of these high temperature devices. High temperature co-fired ceramics (HTCC) alumina with platinum (Pt) conductor was proposed for high temperature electronic packaging. A prototype Pt/HTCC alumina packaging system including chip-level package and circuit board has been briefly reported previously for long-term electrical testing of SiC integrated circuits at 500 °C, and brief testing at much higher temperatures. HTCC alumina is an excellent dielectric material with acceptable dielectric constant and low dielectric loss over wide temperature and frequency ranges. Pt is chemically noble and can be co-fired with HTCC alumina in air ambient producing a viable electronic packaging material system for high temperature applications. This paper presents a more detailed description of this packaging system including prototype low power packages and circuit boards based on HTCC alumina and Pt metallization for 500°C and other harsh environment applications. The key technical considerations for chip-level packaging and circuit board assembly, including materials and processes for 500 °C durable wire-bonding and SiC die attach, and integration of multi-chip circuit boards, are presented. Experimental test results of this packaging approach applied to SiC integrated circuits at 500 °C and 700°C are discussed as well.

electronic packaging

ARM Data-Oriented Metrics and Diagnostics Package for Climate Model Evaluation

A Python-based metrics and diagnostics package is currently being developed by the U.S. Department of Energy (DOE) Atmospheric Radiation Measurement (ARM) Infrastructure Team at Lawrence Livermore National Laboratory (LLNL) to facilitate the use of long-term, high-frequency measurements from the ARM Facility in evaluating the regional climate simulation of clouds, radiation, and precipitation. This metrics and diagnostics package computes climatological means of targeted climate model simulation and generates tables and plots for comparing the model simulation with ARM observational data. The Coupled Model Intercomparison Project (CMIP) model data sets are also included in the package to enable model intercomparison as demonstrated in Zhang et al. (2017). The mean of the CMIP model can serve as a reference for individual models. Basic performance metrics are computed to measure the accuracy of mean state and variability of climate models. The evaluated physical quantities include cloud fraction, temperature, relative humidity, cloud liquid water path, total column water vapor, precipitation, sensible and latent heat fluxes, and radiative fluxes, with plan to extend to more fields, such as aerosol and microphysics properties. Process-oriented diagnostics focusing on individual cloud- and precipitation-related phenomena are also being developed for the evaluation and development of specific model physical parameterizations. The version 1.0 package is designed based on data collected at ARM’s Southern Great Plains (SGP) Research Facility, with the plan to extend to other ARM sites. The metrics and diagnostics package is currently built upon standard Python libraries and additional Python packages developed by DOE (such as CDMS and CDAT). The ARM metrics and diagnostic package is available publicly with the hope that it can serve as an easy entry point for climate modelers to compare their models with ARM data. In this report, we first present the input data, which constitutes the core content of the metrics and diagnostics package in section 2, and a user's guide documenting the workflow/structure of the version 1.0 codes, and including step-by-step instruction for running the package in section 3.

54 ENVIRONMENTAL SCIENCES

Assessment and Assurance of Microelectronics Packaging Technology of Microelectromechanical Systems (MEMS)

Microelectromechanical systems (MEMS) have shown a significant promise in the last decade for a variety of applications such as air-bag, pressure sensors, accelerometer, microgyro, etc. Standard semiconductor microelectronics packaging needs the integrated circuits to be protected from the harsh environment, and provide electrical communication with the other parts of the circuit, facilitate thermal dissipation efficiently, and impart mechanical strength to the silicon die. Microelectronics packaging involves wafer dicing, bonding, lead attachment, encapsulation to protect from the environment, electrical integrity, and package leak tests to assure the packaging technology. In the case of MEMS the microstructures (active elements) often interfaces with the hostile environment where packaging leak tests and testing of such devices using chemical and mechanical parameters will be very difficult and expensive. Packaging of MEMS is significantly complex as they serve to protect from the environment and microstructures interact with the same environment to measure or affect the desired physical or chemical parameters. The most of the silicon circuitry is sensitive to temperature, moisture, magnetic field, light, and electromagnetic interference. The package must then protect the on-board silicon circuitry while simultaneously exposing the microsensor to the effect it 'measures to assure the MEMS technology by lowering the risk to zero. MEMS technology has a major application in developing a microspacecraft for space systems provided assurance of MEMS technology is sufficiently addressed nondestructively. This technology would eventually miniaturize many of the components of the spacecraft to reach the NASA's safety and mission assurance goal by building faster, cheaper, better, smaller spacecraft to explore the space more effectively by teaming-up with the other NASA centers using the limited resources available. This paper discusses the latest developments in the MEMS technology and challenging issues in the packaging of hermetically sealed and non-hermetically sealed MEMS sensor devices based on silicon, poly-silicon, and other materials for microspacecraft applications considering the space environment and reliability assurance qualification guidelines in perspective. Acknowledgments: The above research work is supported by the NASA Electronics Parts and Packaging Program (NEPP) and performed by the Jet Propulsion Laboratory, California Institute of Technology, Pasadena, CA under a contract with the NASA - Code Q for the Office of Safety and Mission Assurance Program 323-79.

Ramesham, Rajeshuni

Packaging Technologies for 500C SiC Electronics and Sensors

Various SiC electronics and sensors are currently under development for applications in 500C high temperature environments such as hot sections of aerospace engines and the surface of Venus. In order to conduct long-term test and eventually commercialize these SiC devices, compatible packaging technologies for the SiC electronics and sensors are required. This presentation reviews packaging technologies developed for 500C SiC electronics and sensors to address both component and subsystem level packaging needs for high temperature environments. The packaging system for high temperature SiC electronics includes ceramic chip-level packages, ceramic printed circuit boards (PCBs), and edge-connectors. High temperature durable die-attach and precious metal wire-bonding are used in the chip-level packaging process. A high temperature sensor package is specifically designed to address high temperature micro-fabricated capacitive pressure sensors for high differential pressure environments. This presentation describes development of these electronics and sensor packaging technologies, including some testing results of SiC electronics and capacitive pressure sensors using these packaging technologies.

Chen, Liang-Yu

NASA, We Have a Challenge and It's Food Packaging

Current Packaging: Freeze Dried Foods Packaging  The thermoformed base is fabricated from Combitherm PAXX230 [a coextrusion of nylon/medium-density polyethylene (MDPE)/nylon/ethylene-vinyl alcohol (EVOH)/nylon/MDPE/linear low-density polyethylene (LLDPE)].  The lid is fabricated from Combitherm PAXX115 (a coextrusion of nylon/EVOH/nylon/LF adhesive/HV polyethylene/LLDPE)  Natural form (Bite size) foods  The bite-size food package is fabricated from Combitherm PAXX115, a coextrusion of nylon/EVOH/nylon/LF adhesive/HV polyethylene/LLDPE.  Overwrap  Packages are wrapped in a white pouch,.003-mm thick, fabricated from a laminate of polyester/polyethylene/aluminum foil/Surlyn®. This overwrap is removed before the food is prepared and heated. Requirements  High barrier packaging - low oxygen and water vapor transmission rates  No aluminum layer  Mass - <145 grams per m2  Flexible  Puncture resistant  Approved for food use  Amenable to sterilization  Able to be heat sealed  Preferred (not required)  Transparent  Retortable, microwavable, high pressure use. Small Business Innovative Research Program - 7 years  8 Phase I contracts  4 Phase II contracts  Two workshops to bring together food packaging experts  Three internal research tasks  Public Outreach - average of 3 presentations/yr. for 8 years describing NASA's challenges  Department of Defense Collaboration - Combat Feeding Program No significant improvement in food packaging capabilities after these efforts. It was unlikely that a food packaging solution could be found within the food science community  There was a need to go outside to other industries such as pharmaceutical or electrical  Although a positive result was preferred, a negative result would also be useful  Two Innovation Techniques were used as a comparison  InnoCentive - Theoretical Challenge to identify new technologies  Yet2.com - A matchmaker between NASA and commercial packaging manufacturers

Perchonok, Michele

Evaluation methodology guidance for stack packages

This report provides evaluation methodology guidance based on previous National Aeronautics and Space Administration (NASA) reports and literature surveys for 3D stack packages and assemblies. Two aspects of technology are covered: the package itself (guidance for functional packages) and package assembly manufacturing and reliability. This work was funded by the NASA Electronic Parts and Packaging (NEPP) Program. The objectives of this NEPP project are to: Perform a literature survey of 3D stack technology; perform a literature survey on the evaluation methodology for 3D package and assembly; combine the two aspects to provide evaluation methodology for both aspects with consideration of interactions between package and assembly; generate guidance on the evaluation methodology for 3D stack package integrity prior to and after assembly; provide recommendations on future experimental activities. The qualification and evaluation methodology guidelines will facilitate NASA projects in effectively evaluating the reliability of very dense and newly available high-density 3D stack packages, allowing more processing power in a smaller board footprint and lower system weight.

Gerke, David

Qualification and Reliability for MEMS and IC Packages

Advanced IC electronic packages are moving toward miniaturization from two key different approaches, front and back-end processes, each with their own challenges. Successful use of more of the back-end process front-end, e.g. microelectromechanical systems (MEMS) Wafer Level Package (WLP), enable reducing size and cost. Use of direct flip chip die is the most efficient approach if and when the issues of know good die and board/assembly are resolved. Wafer level package solve the issue of known good die by enabling package test, but it has its own limitation, e.g., the I/O limitation, additional cost, and reliability. From the back-end approach, system-in-a-package (SIAP/SIP) development is a response to an increasing demand for package and die integration of different functions into one unit to reduce size and cost and improve functionality. MEMS add another challenging dimension to electronic packaging since they include moving mechanical elements. Conventional qualification and reliability need to be modified and expanded in most cases in order to detect new unknown failures. This paper will review four standards that already released or being developed that specifically address the issues on qualification and reliability of assembled packages. Exposures to thermal cycles, monotonic bend test, mechanical shock and drop are covered in these specifications. Finally, mechanical and thermal cycle qualification data generated for MEMS accelerometer will be presented. The MEMS was an element of an inertial measurement unit (IMU) qualified for NASA Mars Exploration Rovers (MERs), Spirit and Opportunity that successfully is currently roaring the Martian surface

inertial measurement unit

2025 Status Report - Fiberboard Properties and Degradation Rates for Storage of 9975 Shipping Package in KAC

Fiberboard assemblies in the 9975 package were identified as susceptible to aging and degradation under long-term storage conditions. Thermal, mechanical, and physical properties have been measured on fiberboard samples aging for up to 20 years at accelerated conditions. The aging environments include elevated temperature up to 250 ºF (the maximum allowed service temperature for fiberboard in 9975 packages) and elevated humidity. Accelerated aging results have been analyzed and used to build aging models. Correlations relating several properties (thermal conductivity, energy absorption, weight, dimensions, and density) to their rate of change in potential storage environments have been developed. Combined with an estimate of the actual conditions the fiberboard experiences in K-Area Complex (KAC), these models allow development of service life predictions. KAC completed calculations that supported extending the service life of 9975 packages with 3013 containers in storage from 20 years to 40 years. These calculations addressed the potential for degraded fiberboard properties following 40 years in storage using degradation models. The 40 year storage evaluations assumed the degradation rates from initial values for density, dimensional, and thermal properties were 0.5% per year (i.e., after 40 years, the density, dimensional, and thermal properties of fiberboard were 80% of its initial values). The updated degradation models developed in this report were compared to the assumptions in those calculations, and the current results for fiberboard dimensions, density, axial and radial thermal conductivities, and energy absorption remain consistent with those calculations. Additional data will continue to be collected to permit future refinements to the models and assumptions. Some of the predicted degradation rates presented in this report are purposely high to accelerate aging. These rates relate to environments that do not exist within KAC or are postulated to only occur as upset conditions that are unlikely to persist for an extended period. For a typical package stored in KAC with approximately 10-12 watts internal heat load or less, and ambient temperatures below 90 ºF, the fiberboard assemblies experience storage conditions less severe than any of the aging environments (i.e., under 125 °F) used in this study. Fiberboard in conforming packages with lower internal heat loads should experience little or no degradation and is expected to provide a service life beyond the currently approved 40 year storage period. Packages with higher internal heat loads may not continue to perform their required safety functions beyond 40 years. Ultimately, service life will be determined by the cumulative effect of degradation from all the conditions these packages might encounter. The results and model predictions presented in this report are applicable to 9975 packages with cane or softwood fiberboard overpack assemblies. These degradation models do not address the effects of non&#x2;conforming conditions such as the presence of excess moisture and mold or beetle infestations.

12 MANAGEMENT OF RADIOACTIVE AND NON-RADIOACTIVE W

Packaging's Contribution for the Effectiveness of the Space Station's Food Service Operation

Storage limitations will have a major effect on space station food service. For example: foods with low bulk density such as ice cream, bread, cake, standard type potato chips and other low density snacks, flaked cereals, etc., will exacerbate the problem of space limitations; package containers are inherently volume consuming and refuse creating; and the useful observation that the optimum package is no package at all leads to the tentative conclusion that the least amount of packaging per unit of food, consistent with storage, aesthetics, preservation, cleanliness, cost and disposal criteria, is the most practical food package for the space station. A series of trade offs may have to be made to arrive at the most appropriate package design for a particular type of food taking all the criteria into account. Some of these trade offs are: single serve vs. bulk; conventional oven vs. microwave oven; nonmetallic aseptically vs. non-aseptically packaged foods; and comparison of aseptic vs. nonaseptic food packages. The advantages and disadvantages are discussed.

Rausch, B. A.