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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 37 records · Page 2
All sourcesNASA NTRSDOE OSTI
DOE OSTI2020

Tutorial on forming through-silicon vias

Through-silicon vias (TSVs) are a critical technology for three-dimensional integrated circuit technology. These through-substrate interconnects allow electronic devices to be stacked vertically for a broad range of applications and performance improvements such as increased bandwidth, reduced signal delay, improved power management, and smaller form-factors. There are many interdependent processing steps involved in the successful integration of TSVs. This article provides a tutorial style review of the following semiconductor fabrication process steps that are commonly used in forming TSVs: deep etching of silicon to form the via, thin film deposition to provide insulation, barrier, and seed layers, electroplating of copper for the conductive metal, and wafer thinning to reveal the TSVs. Recent work in copper electrochemical deposition is highlighted, analyzing the effect of accelerator and suppressor additives in the electrolyte to enable void-free bottom-up filling from a conformally lined seed metal.

42 ENGINEERING↗
DOE OSTI2023

Scalable photonic integrated circuits for high-fidelity light control

Advances in laser technology have driven discoveries in atomic, molecular, and optical (AMO) physics and emerging applications, from quantum computers with cold atoms or ions, to quantum networks with solid-state color centers. This progress is motivating the development of a new generation of optical control systems that can manipulate the light field with high fidelity at wavelengths relevant for AMO applications. These systems are characterized by criteria: (C1) operation at a design wavelength of choice in the visible (VIS) or near-infrared (IR) spectrum, (C2) a scalable platform that can support large channel counts, (C3) high-intensity modulation extinction and (C4) repeatability compatible with low gate errors, and (C5) fast switching times. Here, we provide a pathway to address these challenges by introducing an atom control architecture based on VIS-IR photonic integrated circuit (PIC) technology. Based on a complementary metal–oxide–semiconductor fabrication process, this atom-control PIC (APIC) technology can meet system requirements (C1)–(C5). As a proof of concept, we demonstrate a 16-channel silicon-nitride-based APIC with (5.8±0.4)ns response times and >30dB extinction ratio at a wavelength of 780 nm.

Menssen, Adrian J.↗
DOE OSTI2024

Eliminating Signal Bias Caused by Vacuum System Backstreaming in the Diagnostic Residual Gas Analyzer of ITER

In fusion neutral gas analysis, such as with the Diagnostic Residual Gas Analyzer (DRGA) for ITER, the primary measurement range of interest comprises the low-amu species (1 to 6), especially deuterium and helium. The challenge in successfully obtaining accurate measurements is two-fold. First, the sensitivity of the method must be sufficient to resolve trace amounts accurately; typically, one percent or less. Second, the gas signal from the fusion processes must be free of bias caused by the latent presence (from system outgassing and/or vacuum backstreaming) of these gases to enable accurate interpretation of the measured signal. This latter criterion can be problematic for the lightest gases since there is a propensity for some fraction of the pumped gas load to undergo a phenomenon known as backstreaming. This behavior is manifested in pumping systems for gas properties related to relative atomic weight (lightest) and size (smallest). Backstreaming results in a significant amount of the pumped gas undertaking a reverse flow and re-entering the measurement region; thus, contaminating the forward, real-time measurement. To fully eliminate this adverse effect, a conductance-limiting device – or orifice – has been installed in the high-vacuum pumping system of the present ITER DRGA prototype. The system was already equipped with a secondary turbomolecular pump (TMP), but with limited effectiveness against backstreaming in the inter-pump volume (IPV). This orifice is placed within the suction inlet coupling of the secondary TMP, which is downstream of the IPV. Its objective is to eliminate the backstreaming phenomenon by increasing the back pressure in the IPV. However, the orifice sizing must take into consideration other factors, such as the diagnostic measurement objectives. For example, in the ITER DRGA, one of the measurement requirements is a dynamic response time of ~1s. Fortunately, an added benefit of the pumping restriction created by the orifice is that the upstream pressure increase is beneficial for the DRGA’s optical gas analysis (OGA) sensors. These sensors are attached to the IPV in the present design. The glow discharges, when used as an OGA light source, will typically have a brighter light emission with increasing plasma cell pressure. In addition to the fusion machine research sector, there are other potential applications of this pumping technique where the monitoring of lighter gas concentrations is essential, such as the photolithography process for the semiconductor fabrication of integrated circuits. This presentation will describe the vacuum system used to demonstrate a process to eliminate backstreaming as well as show test results to verify the accomplishment of this critical objective.

Marcus, Chris↗
DOE OSTI2021

Methods and devices for fabricating and assembling printable semiconductor elements

The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.

Nuzzo, Ralph G.↗
DOE OSTI2021

Influence of quantum-confined device fabrication on semiconductor-laser theory

Among Professor Arthur Gossard’s many contributions to crystal growth are those resulting in important improvements in the quality and performance of quantum-well and quantum-dot semiconductor lasers. In celebration of his 85th birthday, we review the development of a semiconductor laser theory that is motivated and guided, in part, by those advances. This theory combines condensed matter theory and laser physics to provide understanding at a microscopic level, i.e., in terms of electrons and holes, and their interaction with the radiation field while influenced by the lattice.

36 MATERIALS SCIENCE↗
DOE OSTI2020

Surface photovoltage spectroscopy observes junctions and carrier separation in gallium nitride nanowire arrays for overall water-splitting

Gallium nitride (GaN) nanowire arrays on silicon are able to drive the overall water-splitting reaction with up to 3.3% solar-to-hydrogen efficiency. Photochemical charge separation is key to the operation of these devices, but details are difficult to observe experimentally because of the number of components and interfaces. Here, we use surface photovoltage spectroscopy to study charge transfer in i-, n-, and p-GaN nanowire arrays on n+ -Si wafers in the presence and absence of Rh/Cr 2 O 3 co-catalysts. The effect of the space charge layer and sub-bandgap defects on majority and minority carrier transport can be clearly observed, and estimates of the built-in potential of the junctions can be made. Transient illumination of the p-GaN/n + -Si junction generates up to -1.4 V surface photovoltage by carrier separation along the GaN nanowire axis. This process is central to the overall water-splitting function of the n + -Si/p-GaN/Rh/Cr 2 O 3 nanowire array. Overall, these results improve our understanding of photochemical charge transfer and separation in group III–V semiconductor nanostructures for the conversion of solar energy into fuels.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2022

Pit rim decomposition into multiple quantum dots on surfaces of epitaxial thin films grown on pit-patterned substrates

Here, we report results of dynamical simulations according to an experimentally validated surface morphological evolution model on the formation of regular arrays of quantum dot molecules (QDMs) consisting of 1D arrays of smaller interacting quantum dots (QDs). These QD arrays form along the sides of each pit rim on the surface of a coherently strained thin film epitaxially deposited on a semiconductor substrate, the surface of which consists of a periodic pattern of inverted prismatic pits with rectangular pit openings. We find that this complex QDM pattern results from the decomposition of the pit rim from a “quantum fortress” with four elongated QDs into four 1D arrays of multiple smaller QDs arranged along each side of the pit rim. Systematic parametric analysis indicates that varying the pit opening dimensions and the pit wall inclination directly impacts the number of QDs in the resulting QDM pattern, while varying the pit depth only affects the dimensions of the QDs in the nanostructure pattern. Therefore, the number, arrangement, and sizes of QDs in the resulting pattern of QDMs on the film surface can be engineered precisely by proper tuning of the pit design parameters. Our simulation results are supported by predictions of morphological stability analysis, which explains the pit rim decomposition into multiple QDs as the outcome of a tip-splitting instability and provides a fundamental characterization of the post-instability nanostructure pattern. Our theoretical findings can play a vital role in designing optimal semiconductor surface patterns toward enabling future nanofabrication technologies.

36 MATERIALS SCIENCE↗
DOE OSTI2023

Controlled Dielectric Breakdown to Form Pinhole Passivating Contacts

This contribution explores an alternate route to forming pinhole-based poly-Si/dielectric/c-Si passivating contacts. The method utilizes controlled dielectric breakdown or electroforming to produce nanoscale pinholes in a thick (non-tunnelling) dielectric which, when annealed, allows dopant atoms to pass from doped poly-Si through the pinholes and into the c-Si wafer, forming conductive pathways. We show that the pinholes lose passivation after electroforming but can be repassivated with a forming gas anneal. N-type contacts show contact resistivities of ~20 mOhm-cm2, but p-type contacts are ~100 mOhm-cm2. Devices show a distinct kink in the J-V curve indicative of a barrier to transport. The method can be expanded to optimized dielectric passivation stacks (not just thin, single layers) and can be formed in parallel over the faces of the wafer in selected areas (pinholes only under the grid lines).

CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SU↗
DOE OSTI2024

Dislocation half-loop control for optimal V-defect density in GaN-based light emitting diodes

V-defects are morphological defects that typically form on threading dislocations during epitaxial growth of $(0001)$-oriented GaN layers. A V-defect is a hexagonal pyramid-shaped depression with six {$10\bar{1}1$}-oriented sidewalls. These semipolar sidewalls have a lower polarization barrier than the polarization barriers present between the polar c-plane quantum wells and quantum barriers and can laterally inject carriers directly into quantum wells in GaN-based light emitting diodes (LEDs). This is especially important, as the high polarization field in c-plane GaN is a significant factor in the high forward voltage of GaN LEDs. The optimal V-defect density for efficient lateral carrier injection in a GaN LED (∼10 9 cm −2 ) is typically an order of magnitude higher than the threading dislocation density of GaN grown on patterned sapphire substrates (∼10 8 cm −2 ). Pure-edge dislocation loops have been known to exist in GaN, and their formation into large V-defects via low-temperature growth with high Si-doping has recently been studied. Here, in this work, we develop a method for pure-edge threading dislocation half-loop formation and density control via disilane flow, growth temperature, and thickness of the half-loop generation layer. We also develop a method of forming the threading dislocation half-loops into V-defects of comparable size to those originating from substrate threading dislocations.

Crystallographic defects↗
DOE OSTI2020

Using a carbon vacancy reduction material to increase average carrier lifetime in a silicon carbide semiconductor device

A semiconductor die and a process for fabricating the semiconductor die are disclosed. The semiconductor die has a substrate and a silicon carbide (SiC) epitaxial structure on the substrate. The SiC epitaxial structure includes at least a first N-type SiC layer, at least a first P-type SiC layer, and carbon vacancy reduction material, which has been implanted into a surface of the SiC epitaxial structure. Further, the SiC epitaxial structure has been annealed to mobilize the carbon vacancy reduction material to diffuse carbon atoms substantially throughout the SiC epitaxial structure, thereby increasing an average carrier lifetime in the SiC epitaxial structure.

36 MATERIALS SCIENCE↗
DOE OSTI2020

Integrated Circuit Design for Radiation-Hardened Charge-Sensitive Amplifier Survived up to 2 Mrad

According to the continuous development of metal-oxide semiconductor (MOS) fabrication technology, transistors have naturally become more radiation-tolerant through steadily decreasing gate-oxide thickness, increasing the tunneling probability between gate-oxide and channel. Unfortunately, despite this radiation-hardened property of developed transistors, the field of nuclear power plants (NPPs) requires even higher radiation hardness levels. Particularly, total ionizing dose (TID) of approximately 1 Mrad could be required for readout circuitry under severe accident conditions with 100 Mrad around a reactor in-core required. In harsh radiating environments such as NPPs, sensors such as micro-pocket-fission detectors (MPFD) would be a promising technology to be operated for detecting neutrons in reactor cores. For those sensors, readout circuits should be fundamentally placed close to sensing devices for minimizing signal interferences and white noise. Therefore, radiation hardening ability is necessary for the circuits under high radiation environments. This paper presents various integrated circuit designs for a radiation hardened charge-sensitive amplifier (CSA) by using SiGe 130 nm and Si 180 nm fabrication processes with different channel widths and transistor types of complementary metal-oxide-semiconductor (CMOS) and bipolar CMOS (BiCMOS). These circuits were tested under γ–ray environment with Cobalt-60 of high level activity: 490 kCi. The experiment results indicate amplitude degradation of 2.85%–34.3%, fall time increase of 201–1730 ns, as well as a signal-to-noise ratio (SNR) of 0.07–11.6 dB decrease with irradiation dose increase. These results can provide design guidelines for radiation hardening operational amplifiers in terms of transistor sizes and structures.

73 NUCLEAR PHYSICS AND RADIATION PHYSICS↗
DOE OSTI2024

A strategy to eliminate selenium oxide islands formed on the ZnSe/GaAs epilayer

Atomically clean and smooth surfaces are essential for semiconductor device fabrication and epitaxial regrowth. In this regard, spontaneously formed oxide islands or clusters on the surfaces of II-VI semiconductor exposures to air can disrupt interface formation. Using ZnSe/GaAs heterostructures grown by molecular beam epitaxy (MBE), we investigated the effect of surface treatments in eliminating oxide islands. The samples were probed with atomic force microscopy, low-temperature photoluminescence, and scanning electron microscopy. Here, it was found that ultra-high vacuum (UHV) annealing at 200°C, regardless of annealing duration, largely removed the islands while leaving the crystallinity of the ZnSe and GaAs epilayers unaffected. UHV annealing at higher temperatures of 300°C completely removed the islands, but the optical properties of ZnSe and/or GaAs epilayers deteriorated depending on the annealing duration. Our observations provide guidance to set thermal annealing strategies for removing oxide islands from the surfaces of II-VI/III-V semiconductor heterostructures depending on the desired properties.

36 MATERIALS SCIENCE↗
DOE OSTI2022

Solution‐Processed CsPbBr 3 Quantum Dots/Organic Semiconductor Planar Heterojunctions for High‐Performance Photodetectors

Abstract Planar heterojunctions (PHJs) are fundamental building blocks for construction of semiconductor devices. However, fabricating PHJs with solution‐processable semiconductors such as organic semiconductors (OSCs) is a challenge. Herein, utilizing the orthogonal solubility and good wettability between CsPbBr 3 perovskite quantum dots (PQDs) and OSCs, fabrication of solution‐processed PQD/OSC PHJs are reported. The phototransistors based on bilayer PQD/PDVT‐10 PHJs show responsivity up to 1.64 × 10 4 A W −1 , specific detectivity of 3.17 × 10 12 Jones, and photosensitivity of 5.33 × 10 6 when illuminated by 450 nm light. Such high photodetection performance is attributed to efficient charge dissociation and transport, as well as the photogating effect in the PHJs. Furthermore, the tri‐layer PDVT‐10/PQD/Y6 PHJs are used to construct photodiodes working in self‐powered mode, which exhibit broad range photoresponse from ultraviolet to near‐infrared, with responsivity approaching 10 −1 A W −1 and detectivity over 10 6 Jones. These results present a convenient and scalable production processes for solution‐processed PHJs and show their great potential for optoelectronic applications.

36 MATERIALS SCIENCE↗
DOE OSTI2023

High-throughput manufacturing of epitaxial membranes from a single wafer by 2D materials-based layer transfer process

Layer transfer techniques have been extensively explored for semiconductor device fabrication as a path to reduce costs and to form heterogeneously integrated devices. These techniques entail isolating epitaxial layers from an expensive donor wafer to form freestanding membranes. However, current layer transfer processes are still low-throughput and too expensive to be commercially suitable. Here we report a high-throughput layer transfer technique that can produce multiple compound semiconductor membranes from a single wafer. We directly grow two-dimensional (2D) materials on III–N and III–V substrates using epitaxy tools, which enables a scheme comprised of multiple alternating layers of 2D materials and epilayers that can be formed by a single growth run. Each epilayer in the multistack structure is then harvested by layer-by-layer mechanical exfoliation, producing multiple freestanding membranes from a single wafer without involving time-consuming processes such as sacrificial layer etching or wafer polishing. Moreover, atomic-precision exfoliation at the 2D interface allows for the recycling of the wafers for subsequent membrane production, with the potential for greatly reducing the manufacturing cost.

77 NANOSCIENCE AND NANOTECHNOLOGY↗
DOE OSTI2021

Charge Transfer Properties of Heterostructures Formed by Bi 2 O 2 Se and Transition Metal Dichalcogenide Monolayers

Atomically thin bismuth oxyselenide (Bi 2 O 2 Se) exhibits attractive properties for electronic and optoelectronic applications, such as high charge-carrier mobility and good air stability. Recently, the development of Bi 2 O 2 Se-based heterostructures have attracted enormous interests with promising prospects for diverse device applications. Although the electrical properties of Bi 2 O 2 Se-based heterostructures have been widely studied, the interlayer charge transfer in these heterostructures remains elusive, despite its importance in harnessing their emergent functionalities. Here, a comprehensive experimental investigation on the interlayer charge transfer properties of two heterostructures formed by Bi 2 O 2 Se and representative transition metal dichalcogenides (namely, WS 2 /Bi 2 O 2 Se and MoS 2 /Bi 2 O 2 Se) is reported. In this work, Kelvin probe force microscopy is used to measure the work functions of the samples, which are further employed to establish type-II band alignment of both heterostructures. Photoluminescence quenching is observed in each heterostructure, suggesting high charge transfer efficiency. Time-resolved and layer-selective pump–probe measurements further prove the ultrafast interlayer charge transfer processes and formation of long-lived interlayer excitons. These results establish the feasibility of integrating 2D Bi 2 O 2 Se with other 2D semiconductors to fabricate heterostructures with novel charge transfer properties and provide insight for understanding the performance of optoelectronic devices based on such 2D heterostructures.

36 MATERIALS SCIENCE↗
DOE OSTI2022

Induced Superconducting Pairing in Integer Quantum Hall Edge States

Indium arsenide (InAs) near surface quantum wells (QWs) are promising for the fabrication of semiconductor–superconductor heterostructures given that they allow for a strong hybridization between the two-dimensional states in the quantum well and the ones in the superconductor. In this work, we present results for InAs QWs in the quantum Hall regime placed in proximity of superconducting NbTiN. We observe a negative downstream resistance with a corresponding reduction of Hall (upstream) resistance, consistent with a very high Andreev conversion. Further, we analyze the experimental data using the Landauer-Büttiker formalism, generalized to allow for Andreev reflection processes. We attribute the high efficiency of Andreev conversion in our devices to the large transparency of the InAs/NbTiN interface and the consequent strong hybridization of the QH edge modes with the states in the superconductor.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2021

Arrays of Si vacancies in 4 H -SiC produced by focused Li ion beam implantation

Point defects in SiC are an attractive platform for quantum information and sensing applications because they provide relatively long spin coherence times, optical spin initialization, and spin-dependent fluorescence readout in a fabrication-friendly semiconductor. The ability to precisely place these defects at the optimal location in a host material with nano-scale accuracy is desirable for integration of these quantum systems with traditional electronic and photonic structures. Here, we demonstrate the precise spatial patterning of arrays of silicon vacancy (${V}_{Si}$) emitters in an epitaxial 4H -SiC (0001) layer through mask-less focused ion beam implantation of Li + . We characterize these arrays with high-resolution scanning confocal fluorescence microscopy on the Si-face, observing sharp emission lines primarily coming from the ${V1}^{{\prime}}$ zero-phonon line (ZPL). The implantation dose is varied over 3 orders of magnitude, leading to ${V}_{Si}$ densities from a few per implantation spot to thousands per spot, with a linear dependence between ZPL emission and implantation dose. Optically-detected magnetic resonance (ODMR) is also performed, confirming the presence of V2 ${V}_{Si}$. Our investigation reveals scalable and reproducible defect generation.

36 MATERIALS SCIENCE↗