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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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32 records · Page 2
All sourcesNASA NTRSDOE OSTI
NASA NTRSDate not supplied

Early Burn-In Parasitic Conduction in 500 °C Durable SiC JFET ICs

All prior reports of long-term 500 °C operation of SiC JFET-R ICs have noted the existence of an initial “burn-in” period of changes in measured electrical characteristics for the first few hundred hours oven-testing. This work reports measurements of “burn-in parasitic MOSFET conduction” that can substantially impact the performance of some circuits during initial heat-up of JFET ICs, but then subsequently disappears after a few hours of operation at 500 °C. The behavior appears generally consistent with the known MOS phenomenon of bias-temperature driven redistribution of mobile ionic contamination. Approaches for further mitigating this initial burn-in conduction mechanism are discussed.

silicon carbide↗
NASA NTRSDate not supplied

Space Radiation Effects on SiC Power Device Reliability

Heavy-ion radiation can result in silicon carbide power device degradation and/or catastrophic failure. Test procedures and data interpretation must consider the impact that heavy-ion induced off-state leakage current increases will have on subsequent single-event effect susceptibility and testability. On orbit, reliable performance in the presence of increased off-state leakage currents due to cumulative ion-induced non-catastrophic single-event effects must be assured over the mission lifetime. This work presents a large body of heavy-ion test data for different diode, power MOSFET, and JFET devices. Susceptibility to single-event effects is compared between SiC and Si power devices. Initial recommendations on heavy-ion radiation test methods for silicon carbide power devices are made and radiation hardness assurance is discussed with the goal of moving one step closer to reliably getting this technology off the ground into a broad array of spacecraft and instruments that will benefit from its unique capabilities.

diode↗
NASA NTRS2017

Silicon Carbide Power Devices and Integrated Circuits

An overview of the NASA NEPP Program Silicon Carbide Power Device subtask is given, including the current task roadmap, partnerships, and future plans. Included are the Agency-wide efforts to promote development of single-event effect hardened SiC power devices for space applications.

single-event gate rupture (SEGR)↗
NASA NTRS2019

Inclusion of Radiation Environment Variability for Reliability Estimates for SiC Power MOSFETs

Variability of the solar energetic particle environment is investigated for single-event-burnout reliability of silicon-carbide power metal-oxide-semiconductor field effect transistors. A probabilistic assessment of failure evaluates the benefits of de-rating voltage, shielding, and mission length. The Prediction of Solar particle Yields for Characterizing Integrating Circuits code is used to calculate a cumulative density function for the fluence of the environment. The lethal ion method is then used to determine what proportion of the environment will cause single-event-burnout. The operating voltage determines the lowest linear-energy-transfer particle that will cause single-event-burnout and that should be included in the environment distribution. The shielding and mission length also determine the final environment distribution of the mission fluence. Through calculating the reliability for different operating voltages, shielding, and mission length for a specific device, it is shown that shielding thickness and operating voltage have a large effect on reliability and can be traded off during the design.

Heavy ion↗
NASA NTRS2018

Reliability Concerns for Flying SiC Power MOSFETs in Space

SiC power MOSFETs are space-ready in terms of typical reliability measures. However, single event burnout (SEB) often occurs at voltages 50% or lower than specified breakdown. Data illustrating burnout for 1200 V devices is reviewed and the space reliability of SiC MOSFETs is discussed.

silicon carbide↗
NASA NTRS2017

Taking SiC Power Devices to the Final Frontier: Addressing Challenges of the Space Radiation Environment

Silicon carbide power device technology has the potential to enable a new generation of aerospace power systems that demand high efficiency, rapid switching, and reduced mass and volume in order to expand space-based capabilities. For this potential to be realized, SiC devices must be capable of withstanding the harsh space radiation environment. Commercial SiC components exhibit high tolerance to total ionizing dose but to date, have not performed well under exposure to heavy ion radiation representative of the on-orbit galactic cosmic rays. Insertion of SiC power device technology into space applications to achieve breakthrough performance gains will require intentional development of components hardened to the effects of these highly-energetic heavy ions. This work presents heavy-ion test data obtained by the authors over the past several years for discrete SiC power MOSFETs, JFETs, and diodes in order to increase the body of knowledge and understanding that will facilitate hardening of this technology to space radiation effects. Specifically, heavy-ion irradiation data taken under different bias, temperature, and ion beam conditions is presented for devices from different manufacturers, and the emerging patterns discussed.

Power semiconductor devices↗
NASA NTRS2024

X-57 Maxwell High Lift Motor Controller Electromagnetic Interference Test Results

During research and development for NASA’s X-57 Maxwell all-electric aircraft project, the efficiency and power density requirements of its electric propulsion subsystem components were met, but aspects of integrating its powertrain subsystems proved problematic. Electromagnetic interference (EMI) from the cruise motor controller (CMC) was a significant challenge for the project. This problem was exacerbated by the lack of EMI requirements imposed on subsystem powertrain components. This report presents the results of EMI testing of the X-57 high lift motor controller (HLMC) at the NASA Glenn Research Center’s EMI Laboratory. For reference, the conducted emissions are compared to DO–160G and MIL–STD–61G conducted emissions limits. After the EMI test, mitigation of the conducted emissions using lightweight EMI chokes produced at NASA Glenn was evaluated using the Fast Fourier Transform (FFT) capability of an oscilloscope in the hardware development laboratory. This process can contribute to the rapid prototyping of electric powertrain components and EMI filters and improve the likelihood of successful EMI qualification at the component and system levels.

Silicon carbide↗
NASA NTRS2006

Silicon Carbide Technology

Silicon carbide based semiconductor electronic devices and circuits are presently being developed for use in high-temperature, high-power, and high-radiation conditions under which conventional semiconductors cannot adequately perform. Silicon carbide's ability to function under such extreme conditions is expected to enable significant improvements to a far-ranging variety of applications and systems. These range from greatly improved high-voltage switching for energy savings in public electric power distribution and electric motor drives to more powerful microwave electronics for radar and communications to sensors and controls for cleaner-burning more fuel-efficient jet aircraft and automobile engines. In the particular area of power devices, theoretical appraisals have indicated that SiC power MOSFET's and diode rectifiers would operate over higher voltage and temperature ranges, have superior switching characteristics, and yet have die sizes nearly 20 times smaller than correspondingly rated silicon-based devices [8]. However, these tremendous theoretical advantages have yet to be widely realized in commercially available SiC devices, primarily owing to the fact that SiC's relatively immature crystal growth and device fabrication technologies are not yet sufficiently developed to the degree required for reliable incorporation into most electronic systems. This chapter briefly surveys the SiC semiconductor electronics technology. In particular, the differences (both good and bad) between SiC electronics technology and the well-known silicon VLSI technology are highlighted. Projected performance benefits of SiC electronics are highlighted for several large-scale applications. Key crystal growth and device-fabrication issues that presently limit the performance and capability of high-temperature and high-power SiC electronics are identified.

Neudeck, Philip G.↗
NASA NTRS1998

SiC Technology

Silicon carbide (SiC)-based semiconductor electronic devices and circuits are presently being developed for use in high-temperature, high-power, and/or high-radiation conditions under which conventional semiconductors cannot adequately perform. Silicon carbide's ability to function under such extreme conditions is expected to enable significant improvements to a far-ranging variety of applications and systems. These range from greatly improved high-voltage switching [1- 4] for energy savings in public electric power distribution and electric motor drives to more powerful microwave electronics for radar and communications [5-7] to sensors and controls for cleaner-burning more fuel-efficient jet aircraft and automobile engines. In the particular area of power devices, theoretical appraisals have indicated that SiC power MOSFET's and diode rectifiers would operate over higher voltage and temperature ranges, have superior switching characteristics, and yet have die sizes nearly 20 times smaller than correspondingly rated silicon-based devices [8]. However, these tremendous theoretical advantages have yet to be realized in experimental SiC devices, primarily due to the fact that SiC's relatively immature crystal growth and device fabrication technologies are not yet sufficiently developed to the degree required for reliable incorporation into most electronic systems [9]. This chapter briefly surveys the SiC semiconductor electronics technology. In particular, the differences (both good and bad) between SiC electronics technology and well-known silicon VLSI technology are highlighted. Projected performance benefits of SiC electronics are highlighted for several large-scale applications. Key crystal growth and device-fabrication issues that presently limit the performance and capability of high temperature and/or high power SiC electronics are identified.

Neudeck, Philip G.↗
NASA NTRS1991

Silicon carbide, a semiconductor for space power electronics

After many years of promise as a high temperature semiconductor, silicon carbide (SiC) is finally emerging as a useful electronic material. Recent significant progress that has led to this emergence has been in the areas of crystal growth and device fabrication technology. High quality single-crystal SiC wafers, up to 25 mm in diameter, can now be produced routinely from boules grown by a high temperature (2700 K) sublimation process. Device fabrication processes, including chemical vapor deposition (CVD), in situ doping during CVD, reactive ion etching, oxidation, metallization, etc. have been used to fabricate p-n junction diodes and MOSFETs. The diode was operated to 870 K and the MOSFET to 770 K.

Powell, J. Anthony↗
NASA NTRS1991

Silicon carbide, a semiconductor for space power electronics

After many years of promise as a high temperature semiconductor, silicon carbide (SiC) is finally emerging as a useful electronic material. Recent significant progress that has led to this emergence has been in the area of crystal growth and device fabrication technology. High quality of single-crystal SiC wafers, up to 25 mm in diameter, can now be produced routinely from boules grown by a high temperature (2700 K) sublimation process. Device fabrication processes, including chemical vapor deposition (CVD), in situ doping during CVD, reactive ion etching, oxidation, metallization, etc. have been used to fabricate p-n junction diodes and MOSFETs. The diode was operated to 870 K and the MOSFET to 770 K.

Powell, J. A.↗
NASA NTRS2008

SiC JFET Transistor Circuit Model for Extreme Temperature Range

A technique for simulating extreme-temperature operation of integrated circuits that incorporate silicon carbide (SiC) junction field-effect transistors (JFETs) has been developed. The technique involves modification of NGSPICE, which is an open-source version of the popular Simulation Program with Integrated Circuit Emphasis (SPICE) general-purpose analog-integrated-circuit-simulating software. NGSPICE in its unmodified form is used for simulating and designing circuits made from silicon-based transistors that operate at or near room temperature. Two rapid modifications of NGSPICE source code enable SiC JFETs to be simulated to 500 C using the well-known Level 1 model for silicon metal oxide semiconductor field-effect transistors (MOSFETs). First, the default value of the MOSFET surface potential must be changed. In the unmodified source code, this parameter has a value of 0.6, which corresponds to slightly more than half the bandgap of silicon. In NGSPICE modified to simulate SiC JFETs, this parameter is changed to a value of 1.6, corresponding to slightly more than half the bandgap of SiC. The second modification consists of changing the temperature dependence of MOSFET transconductance and saturation parameters. The unmodified NGSPICE source code implements a T(sup -1.5) temperature dependence for these parameters. In order to mimic the temperature behavior of experimental SiC JFETs, a T(sup -1.3) temperature dependence must be implemented in the NGSPICE source code. Following these two simple modifications, the Level 1 MOSFET model of the NGSPICE circuit simulation program reasonably approximates the measured high-temperature behavior of experimental SiC JFETs properly operated with zero or reverse bias applied to the gate terminal. Modification of additional silicon parameters in the NGSPICE source code was not necessary to model experimental SiC JFET current-voltage performance across the entire temperature range from 25 to 500 C.

Neudeck, Philip G.↗