Search NASA⌕ Search

SEARCH · Search NASA

Results for “Memory effect”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 361 records · Page 20

A Spectral Analysis Approach for Acoustic Radiation from Composite Panels

A method is developed to predict the vibration response of a composite panel and the resulting far-field acoustic radiation due to acoustic excitation. The acoustic excitation is assumed to consist of obliquely incident plane waves. The panel is modeled by a finite element analysis and the radiated field is predicted using Rayleigh's integral. The approach can easily include other effects such as shape memory alloy (SMA) ber reinforcement, large detection thermal postbuckling, and non-symmetric SMA distribution or lamination. Transmission loss predictions for the case of an aluminum panel excited by a harmonic acoustic pressure are shown to compare very well with a classical analysis. Results for a composite panel with and without shape memory alloy reinforcement are also presented. The preliminary results demonstrate that the transmission loss can be significantly increased with shape memory alloy reinforcement. The mechanisms for further transmission loss improvement are identified and discussed.

Turner, Travis L.↗

Modeling of a Metal-Ferroelectric-Semiconductor Field-Effect Transistor NAND Gate

Considerable research has been performed by several organizations in the use of the Metal- Ferroelectric-Semiconductor Field-Effect Transistors (MFSFET) in memory circuits. However, research has been limited in expanding the use of the MFSFET to other electronic circuits. This research project investigates the modeling of a NAND gate constructed from MFSFETs. The NAND gate is one of the fundamental building blocks of digital electronic circuits. The first step in forming a NAND gate is to develop an inverter circuit. The inverter circuit was modeled similar to a standard CMOS inverter. A n-channel MFSFET with positive polarization was used for the n-channel transistor, and a n-channel MFSFET with negative polarization was used for the p-channel transistor. The MFSFETs were simulated by using a previously developed current model which utilized a partitioned ferroelectric layer. The inverter voltage transfer curve was obtained over a standard input of zero to five volts. Then a 2-input NAND gate was modeled similar to the inverter circuit. Voltage transfer curves were obtained for the NAND gate for various configurations of input voltages. The resultant data shows that it is feasible to construct a NAND gate with MFSFET transistors.

Phillips, Thomas A.↗

Endurance cycling results in extreme environments

A new test bed for life testing flash memories in extreme environments is introducted. the test bed is based on a state-of-the-art development board. Since space applications often desire state-of-the-art devices, such a basis seems appropriate. Comparison of this tester to other such systems, including those with data presented here in the past is made. Limitations of different testers for varying applications are discussed. Recently developed data, using this test bed is also presented.

microelectronics↗

Ferroelectric Field-Effect Transistor Differential Amplifier Circuit Analysis

There has been considerable research investigating the Ferroelectric Field-Effect Transistor (FeFET) in memory circuits. However, very little research has been performed in applying the FeFET to analog circuits. This paper investigates the use of FeFETs in a common analog circuit, the differential amplifier. The two input Metal-Oxide-Semiconductor (MOS) transistors in a general MOS differential amplifier circuit are replaced with FeFETs. Resistors are used in place of the other three MOS transistors. The FeFET model used in the analysis has been previously reported and was based on experimental device data. Because of the FeFET hysteresis, the FeFET differential amplifier has four different operating modes depending on whether the FeFETs are positively or negatively polarized. The FeFET differential amplifier operation in the different modes was analyzed by calculating the amplifier voltage transfer and gain characteristics shown in figures 2 through 5. Comparisons were made between the FeFET differential amplifier and the standard MOS differential amplifier. Possible applications and benefits of the FeFET differential amplifier are discussed.

Phillips, Thomas A.↗

Electrostatic Switching in Vertically Oriented Nanotubes for Nonvolatile Memory Applications

We have demonstrated electrostatic switching in vertically oriented nanotubes or nanofibers, where a nanoprobe was used as the actuating electrode inside an SEM. When the nanoprobe was manipulated to be in close proximity to a single tube, switching voltages between 10 V - 40 V were observed, depending on the geometrical parameters. The turn-on transitions appeared to be much sharper than the turn-off transitions which were limited by the tube-to-probe contact resistances. In many cases, stiction forces at these dimensions were dominant, since the tube appeared stuck to the probe even after the voltage returned to 0 V, suggesting that such structures are promising for nonvolatile memory applications. The stiction effects, to some extent, can be adjusted by engineering the switch geometry appropriately. Nanoscale mechanical measurements were also conducted on the tubes using a custom-built anoindentor inside an SEM, from which preliminary material parameters, such as the elastic modulus, were extracted. The mechanical measurements also revealed that the tubes appear to be well adhered to the substrate. The material parameters gathered from the mechanical measurements were then used in developing an electrostatic model of the switch using a commercially available finite-element simulator. The calculated pull-in voltages appeared to be in agreement to the experimentally obtained switching voltages to first order.

plasma-enhanced chemical vapor deposition (PECVD).↗

An Integrated Framework for Memory-Centric Analysis: From Trace Collection to Co-Design

The memory wall phenomenon—where advances in processor performance significantly outpace those in memory subsystems—poses a fundamental challenge for contemporary computing systems. In memory-bound applications, memory subsystem behavior dominates performance, yet existing analysis approaches present significant limitations: detailed microarchitectural simulators require days to weeks to simulate modest workloads; hardware performance counters provide only aggregate statistics that obscure temporal and spatial access patterns; and scaled simulation approaches face challenges in capturing certain behaviors that emerge at larger scales. These limitations reflect a processor-centric design philosophy increasingly misaligned with memory-bound workloads where detailed understanding of memory access patterns, cache hierarchy interactions, and contention is critical for effective optimization. This paper presents an integrated framework for memory-centric analysis that enables effective hardware-software co-design. We describe practical trace collection techniques, including hardware-assisted processor tracing with minimal overhead and portable software-based instrumentation with statistical sampling. We present multi-perspective analysis methods that examine memory behavior from temporal, sequential, spatial, and relational viewpoints, revealing distinct optimization opportunities invisible in aggregate metrics. We detail an architectural modeling framework that uses sampled traces with temporal interpolation and confidence-based filtering to evaluate cache and memory configurations. Evaluation on representative benchmarks demonstrates that this framework achieves practical accuracy (L2 cache errors of 2.64\%, confidence-filtered L3 errors of 9.92\%, bandwidth errors of 7.33\%) while providing substantial speedup (26.8×) over cycle-accurate simulation, enabling rapid design space exploration. We demonstrate how this integrated framework enables systematic identification of both hardware optimizations (memory controller tuning, bank partitioning, NUMA configuration) and software optimizations (data layout restructuring, prefetching strategies, memory-aware scheduling). Through this comprehensive treatment of the memory-centric analysis pipeline—from trace collection through architectural modeling to co-design application—we provide researchers and practitioners with practical techniques for addressing memory bottlenecks in contemporary computing systems.

Gajaria, Dhruv Mayur↗

Performance Analysis of Garbage Collection and Dynamic Reordering in a Lisp System

Generation based garbage collection and dynamic reordering of objects are two techniques for improving the efficiency of memory management in Lisp and similar dynamic language systems. An analysis of the effect of generation configuration is presented, focusing on the effect of a number of generations and generation capabilities. Analytic timing and survival models are used to represent garbage collection runtime and to derive structural results on its behavior. The survival model provides bounds on the age of objects surviving a garbage collection at a particular level. Empirical results show that execution time is most sensitive to the capacity of the youngest generation. A technique called scanning for transport statistics, for evaluating the effectiveness of reordering independent of main memory size, is presented.

Llames, Rene Lim↗

Microdose Induced Data Loss on Floating Gate Memories

Heavy ion irradiation of flash memories shows loss of stored data. The fluence dependence is indicative of microdose effects. Other qualitative factors identifying the effect as microdose are discussed. The data is presented, and compared to statistical results of a microdose target-based model.

radiation effects↗

Nanoscale Deformable Optics

Several missions and instruments in the conceptual design phase rely on the technique of interferometry to create detectable fringe patterns. The intimate emplacement of reflective material upon electron device cells based upon chalcogenide material technology permits high-speed, predictable deformation of the reflective surface to a subnanometer or finer resolution with a very high degree of accuracy. In this innovation, a layer of reflective material is deposited upon a wafer containing (perhaps in the millions) chalcogenic memory cells with the reflective material becoming the front surface of a mirror and the chalcogenic material becoming a means of selectively deforming the mirror by the application of heat to the chalcogenic material. By doing so, the mirror surface can deform anywhere from nil to nanometers in spots the size of a modern day memory cell, thereby permitting realtime tuning of mirror focus and reflectivity to mitigate aberrations caused elsewhere in the optical system. Modern foundry methods permit the design and manufacture of individual memory cells having an area of or equal to the Feature (F) size of the design (assume 65 nm). Fabrication rules and restraints generally require the instantiation of one memory cell to another no closer than 1.5 F, or, for this innovation, 90 nm from its neighbor in any direction. Chalcogenide is a semiconducting glass compound consisting of a combination of chalcogen ions, the ratios of which vary according to properties desired. It has been shown that the application of heat to cells of chalcogenic material cause a large alteration in resistance to the range of 4 orders of magnitude. It is this effect upon which chalcogenidebased commercial memories rely. Upon removal of the heat source, the chalcogenide rapidly cools and remains frozen in the excited state. It has also been shown that the chalcogenide expands in volume because of the applied heat, meaning that the coefficient of expansion of chalcogenic materials is larger than 1. In this innovation, chalcogenidebased cells are addressed (as though they are a memory), and heated and cooled according to well-established criteria. In doing so, the exact size of chalcogenide cell deformation is known and predictable; therefore, the deformation of the reflective surface is, likewise, known and predictable. Control electronics can also be implemented so that a closed-loop feedback can be maintained. Changing the contents of the chalcogenide memory cells can compensate for any change in environmental effects that might cause a change in optical path. This real-time control provides significant control and stability in use conditions.

Strauss, Karl F.↗

Large room-temperature elastocaloric effect in a bulk polycrystalline Ni-Ti-Cu-Co alloy with low isothermal stress hysteresis

Creation of high-performance advanced elastocaloric materials is essential for the execution of elastocaloric refrigeration that can be an environment-friendly and high-efficiency substitute for the widely used traditional vapor-compression cooling technology. Here we have developed a bulk polycrystalline Ni-Ti-Cu-Co shape memory alloy exhibiting large elastocaloric effect, low stress hysteresis and room temperature working temperature, all of which are of great importance to and urgently demanded for high-efficiency room-temperature elastocaloric refrigeration. This newly developed (Ni 42.5 Ti 50 Cu 7.5 ) 99 Co 1 alloy shows a large room-temperature elastocaloric effect with directly measured adiabatic temperature change up to -14.4 K during unloading. The stress hysteresis of the isothermal superelastic stress-strain curve is as low as 60 MPa when the maximum tensile strain is 2.7%. Owing to the large elastocaloric effect and low stress hysteresis, a very high coefficient of performance up to 19 is achieved on the material level. This newly developed (Ni 42.5 Ti 50 Cu 7.5 ) 99 Co 1 alloy is a robust candidate for efficient elastocaloric refrigeration. Advanced in-situ synchrotron high-energy X-ray diffraction technique was employed to reveal the phase transformation sequence and to accurately determine the crystal structure of different phases, based on which the lattice compatibility between the transforming phases was evaluated and the phase transformation strain was predicted, providing in-depth fundamental understanding of the martensitic transformation in this newly developed alloy. This work could be useful for designing high-performance elastocaloric materials for solid-state cooling applications.

36 MATERIALS SCIENCE↗

Options for Radiation Tolerant High-Performance Memory

Memory technologies were reviewed for radiation effects performance in order to determine the most cost-efficient target for a possible memory investment targeted at creating a memory component of general applicability for space use. TID and SEL trends that had indicated improvement in intrinsic performance based on scaling cannot be trusted. SEE hardening of memory arrays is prohibitive in terms of cell-level power and area requirements. Radiation-hardened cells and custom controllers are recommended for future memory developments.

Some, Raphael↗

Regional Tau Effects on Prospective Cognitive Change in Cognitively Normal Older Adults

Studies suggest that tau deposition starts in the anterolateral entorhinal cortex (EC) with normal aging, and that the presence of β-amyloid (Aβ) facilitates its spread to neocortex, which may reflect the beginning of Alzheimer's disease (AD). Functional connectivity between the anterolateral EC and the anterior-temporal (AT) memory network appears to drive higher tau deposition in AT than in the posterior-medial (PM) memory network. Here, we investigated whether this differential vulnerability to tau deposition may predict different cognitive consequences of EC, AT, and PM tau. Using 18 F-flortaucipir (FTP) and 11 C-Pittsburgh compound-B (PiB) positron emission tomography (PET) imaging, we measured tau and Aβ in 124 cognitively normal human older adults (74 females, 50 males) followed for an average of 2.8 years for prospective cognition. We found that higher FTP in all three regions was individually related to faster memory decline, and that the effects of AT and PM FTP, but not EC, were driven by Aβ+ individuals. Moreover, when we included all three FTP measures competitively in the same model, only AT FTP significantly predicted memory decline. Our data support a model whereby tau, facilitated by Aβ, transits from EC to cortical regions that are most closely associated with the anterolateral EC, which specifically affects memory in the initial stage of AD. Memory also appears to be affected by EC tau in the absence of Aβ, which may be less clinically consequential. These findings may provide clarification of differences between normal aging and AD, and elucidate the transition between the two stages. SIGNIFICANCE STATEMENT Tau and β-amyloid (Aβ) are hallmarks of Alzheimer's disease (AD) but are also found in cognitively normal people. It is unclear whether, and how, this early deposition of tau and Aβ may affect cognition in normal aging and the asymptomatic stage of AD. We show that tau deposition in the entorhinal cortex (EC), which is common in advanced age, predicts memory decline in older adults independent of Aβ, likely reflecting normal, age-related memory loss. In contrast, tau in anterior-temporal (AT) regions is most predictive of memory decline in Aβ+ individuals. These data support the idea that tau preferentially spreads to specific cortical regions, likely through functional connections, which plays a primary role in memory decline in the early stage of AD.

60 APPLIED LIFE SCIENCES↗

Machine Learning Based Resilience Testing of an Address Randomization Cyber Defense

Moving target defenses (MTDs) are widely used as an active defense strategy for thwarting cyberattacks on cyber-physical systems by increasing diversity of software and network paths. Recently, machine Learning (ML) and deep Learning (DL) models have been demonstrated to defeat some of the cyber defenses by learning attack detection patterns and defense strategies. It raises concerns about the susceptibility of MTD to ML and DL methods. Here, in this article, we analyze the effectiveness of ML and DL models when it comes to deciphering MTD methods and ultimately evade MTD-based protections in real-time systems. Specifically, we consider a MTD algorithm that periodically randomizes address assignments within the MIL-STD-1553 protocol—a military standard serial data bus. Two ML and DL-based tasks are performed on MIL-STD-1553 protocol to measure the effectiveness of the learning models in deciphering the MTD algorithm: 1) determining whether there is an address assignments change i.e., whether the given system employs a MTD protocol and if it does 2) predicting the future address assignments. The supervised learning models (random forest and k-nearest neighbors) effectively detected the address assignment changes and classified whether the given system is equipped with a specified MTD protocol. On the other hand, the unsupervised learning model (K-means) was significantly less effective. The DL model (long short-term memory) was able to predict the future addresses with varied effectiveness based on MTD algorithm's settings.

45 MILITARY TECHNOLOGY, WEAPONRY, AND NATIONAL DEF↗

Total dose effect on soft error rate for dynamic metal-oxide-semiconductor memory cells

A simple model for the soft error rate for dynamic metal-oxide-semiconductor random access memories due to normal galactic radiation was devised and then used to calculate the rate of decrease of the single-event-upset rate with total radiation dose. The computation shows that the decrease in the soft error rate is less than 10 percent per day if the shielding is 0.5 g/sq cm and the spacecraft is in a geosynchronous orbit. The decrease is considerably less in a polar orbiting device.

Benumof, Reuben↗

Memsensing by surface ion migration within Debye length

Integration between electronics and biology is often facilitated by iontronics, where ion migration in aqueous media governs sensing and memory. However, the Debye screening effect limits electric fields to the Debye length, the distance over which mobile ions screen electrostatic interactions, necessitating external voltages that constrain the operation speed and device design. Here we report a high-speed in-memory sensor based on vanadium dioxide (VO2) that operates without an external voltage by leveraging built-in electric fields within the Debye length. When VO2 contacts a low-work-function metal (for example, indium) in a salt solution, electrochemical reactions generate indium ions that migrate into the VO2 surface under the native electric field, inducing a surface insulator-to-metal phase transition of VO2. The VO2 conductance increase rate reflects the salt concentration, enabling in-memory sensing, or memsensing of the solution. The memsensor mimics Caenorhabditis elegans chemosensory plasticity to guide a miniature boat for adaptive chemotaxis, illustrating low-power aquatic neurorobotics with fewer memory units.

Guo, Ruihan↗