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Closed-loop process produces semiconductor-grade silicon. Metallurgical-grade silicon converted to ultrapure silicon by reacting with hydrogen and silicon tetrahalide to form trihalosilane, purifying this intermediate and again decomposing to high purity silicon in third stage. Heterogeneously and homogeneously nucleated polycrystalline silicon used in semiconductor device applications and in silicon photovoltaic solar cell fabrication.
A package of high-power switching semiconductors for the space station have been designed and fabricated. The package includes a high-voltage (600 volts) high current (50 amps) NPN Fast Switching Power Transistor and a high-voltage (1200 volts), high-current (50 amps) Fast Recovery Diode. The package features an isolated collector for the transistors and an isolated anode for the diode. Beryllia is used as the isolation material resulting in a thermal resistance for both devices of .2 degrees per watt. Additional features include a hermetical seal for long life -- greater than 10 years in a space environment. Also, the package design resulted in a low electrical energy loss with the reduction of eddy currents, stray inductances, circuit inductance, and capacitance. The required package design and device parameters have been achieved. Test results for the transistor and diode utilizing the space station package is given.
Chemical sensor technology is being developed for leak detection, emission monitoring, and fire safety applications. The development of these sensors is based on progress in two types of technology: 1) Micromachining and microfabrication (MicroElectroMechanical Systems (MEMS)-based) technology to fabricate miniaturized sensors. 2) The development of high temperature semiconductors, especially silicon carbide. Using these technologies, sensors to measure hydrogen, hydrocarbons, nitrogen oxides, carbon monoxide, oxygen, and carbon dioxide are being developed. A description is given of each sensor type and its present stage of development. It is concluded that microfabricated sensor technology has significant potential for use in a range of aerospace applications.
High-capacity cooling options remain limited for many small-scale applications such as microelectronic components, miniature sensors, and microsystems. A microelectromechanical system (MEMS) using a Stirling thermodynamic cycle to provide cooling or heating directly to a thermally loaded surface is being developed at the NASA Glenn Research Center to meet this need. The device can be used strictly in the cooling mode or can be switched between cooling and heating modes in milliseconds for precise temperature control. Fabrication and assembly employ techniques routinely used in the semiconductor processing industry. Benefits of the MEMS cooler include scalability to fractions of a millimeter, modularity for increased capacity and staging to low temperatures, simple interfaces, limited failure modes, and minimal induced vibration. The MEMS cooler has potential applications across a broad range of industries such as the biomedical, computer, automotive, and aerospace industries. The basic capabilities it provides can be categorized into four key areas: 1) Extended environmental temperature range in harsh environments; 2) Lower operating temperatures for electronics and other components; 3) Precision spatial and temporal thermal control for temperature-sensitive devices; and 4) The enabling of microsystem devices that require active cooling and/or temperature control. The rapidly expanding capabilities of semiconductor processing in general, and microsystems packaging in particular, present a new opportunity to extend Stirling-cycle cooling to the MEMS domain. The comparatively high capacity and efficiency possible with a MEMS Stirling cooler provides a level of active cooling that is impossible at the microscale with current state-of-the-art techniques. The MEMS cooler technology builds on decades of research at Glenn on Stirling-cycle machines, and capitalizes on Glenn s emerging microsystems capabilities.
Feasibility of germanium-silicon alloy single crystals for fabrication of charged particle detectors
Diodes lasers are fabricated using multiple source molecular beam expitaxial growth of (PbSn)Te on BaF2 substrates. Methods for crystal growth, crystal transfer, and device fabrication by photolithographic techniques were developed. The lasers operate in the spectra range from 10 microns to 14 microns and at temperatures from 12K to 60K continuous wave and to 95 K pulsed.
The engineering design, fabrication, assembly, operation, economic analysis, and process support R and D for an Experimental Process System Development Unit (EPSDU) are reported. About 95% of purchased equipment is received and will be reshipped to the West Coast location. The Data Collection System is completed. In the area of melting/consolidation, to the system using silicon powder transfer, melting and shotting on a pseudocontinuous basis is demonstrated. It is proposed to continue the very promising fluid bed work.
Advances in the design and fabrication of very low capacitance planar Schottky diodes and millimeter-wave power amplifiers, more accurate device and circuit models for commercial 3-D electromagnetic simulators, and the availability of both MEMS and high precision metal machining, have enabled RF engineers to extend traditional waveguide-based sensor and source technologies well into the TI-Iz frequency regime. This short paper will highlight recent progress in realizing THz space-qualified receiver front-ends based on room temperature semiconductor devices.
The objective of this project was to demonstrate the fabrication of extremely tight tolerance collimating grids using a high-Z material, specifically tungsten. The approach taken was to fabricate grids by a replication method involving the coating of a silicon grid substrate with tungsten by chemical vapor deposition (CVD). A negative of the desired grid structure was fabricated in silicon using highly wafering techniques developed for the semiconductor industry and capable of producing the required tolerances. Using diamond wafering blades, a network of accurately spaced slots was machined into a single-crystal silicon surface. These slots were then filled with tungsten by CVD, via the hydrogen reduction of tungsten hexafluoride. Following tungsten deposition, the silicon negative was etched away to leave the tungsten collimating grid structure. The project was divided into five tasks: (1) identify materials of construction for the replica and final collimating grid structures; (2) identify and implement a micromachining technique for manufacturing the negative collimator replicas (performed by NASA/JPL); (3) develop a CVD technique and processing parameters suitable for the complete tungsten densification of the collimator replicas; (4) develop a chemical etching technique for the removal of the collimator replicas after the tungsten deposition process; and (5) fabricate and deliver tungsten collimating grid specimens.
Many nanodevices and quantum devices, with their sizes often spanning from millimeters down to sub-nanometer, have intricate low-dimensional, non-uniform, or hierarchical structures on surfaces and interfaces. Since their functionalities are dependent on these structures, high-resolution surface-sensitive characterization becomes imperative to gain a comprehensive understanding of the function–structure relationship. We thus developed hard x-ray ptychographic reflectometry imaging, a new technique that merges the high-resolution two-dimensional imaging capabilities of hard x-ray ptychography for extended objects, with the high-resolution depth profiling capabilities of x-ray reflectivity for layered structures. The synergy of these two methods fully leverages both amplitude and phase information from ptychography reconstruction to not only reveal surface topography and localized structures, such as shapes and electron densities, but also yields statistical details, such as interfacial roughness that is not readily accessible through coherent imaging solely. The hard x-ray ptychographic reflectometry imaging is well-suited for three-dimensional imaging of mesoscopic samples, particularly those comprising planar or layered nanostructures on opaque supports, and could also offer a high-resolution surface metrology and defect analysis on semiconductor devices, such as integrated nanocircuits and lithographic photomasks for microchip fabrications.
A new varactor diode process has been developed in which much of the processing is done from the back of an extremely thin semiconductor wafer laminated to a low-dielectric substrate. Back-to-back BNN diodes were fabricated with this technique; excellent DC and low-frequency capacitance measurements were obtained. Advantages of the new technique relative to other techniques include greatly reduced frontside wafer damage from exposure to process chemicals, improved capability to integrate devices (e.g. for antenna patterns, transmission lines, or wafer-scale grids), and higher line yield. BNN diodes fabricated with this technique exhibit approximately the expected capacitance-voltage characteristics while showing leakage currents under 10 mA at voltages three times that needed to deplete the varactor. This leakage is many orders of magnitude better than comparable Schottky diodes.
This work demonstrates vertical GaN superjunction (SJ) diodes fabricated via a novel self-aligned process. The SJ comprises n-GaN pillars wrapped by the charge-balanced p-type nickel oxide (NiO). After the NiO sputtering around GaN pillars, the self-aligned process exposes the top pillar surfaces without the need for additional lithography or a patterned NiO etching which is usually difficult. The GaN SJ diode shows a breakdown voltage (B V) of 1100 V, a specific on-resistance (R ON ) of 0.4 mΩ· cm2, and a SJ drift-region resistance ( R dr ) of 0.13 mΩ· cm2. Further, the device also exhibits good thermal stability with B V retained over 1 kV and R ON dropped to 0.3 mΩ· cm2 at 125°C. The trade-off between B V and R dr is superior to the 1D GaN limit. These results show the promise of vertical GaN SJ power devices. The self-aligned process is applicable for fabricating the heterogeneous SJ based on various wide- and ultra-wide bandgap semiconductors.
Wide band gap (WBG) semiconductors (E g > 2.0 eV) are integral to the advancement of next-generation electronics, optoelectronics, and power industries owing to their capability for high-temperature operation, high breakdown voltage, and efficient light emission. Enhanced power efficiency and functional performance can be attained through miniaturization, specifically via the integration of device fabrication into a two-dimensional (2D) structure enabled by WBG 2D semiconductors. However, as an essential subgroup of WBG semiconductors, 2D transition metal oxides (TMOs) remain largely underexplored in terms of physical properties and applications in 2D optoelectronic devices, primarily due to the scarcity of sufficiently large 2D crystals. Thus, our goal is to develop synthesis pathways for 2D TMOs possessing large crystal domains (e.g., >10 μm), expanding the 2D TMO family and providing insights for future engineering of 2D TMOs. Here, we demonstrate the synthesis of WBG 2D nickel oxide (NiO) (E g > 2.7 eV) thermally converted from 2D nickel hydroxide (Ni(OH) 2 ) with a lateral domain size larger than 10 μm. Moreover, the conversion process is investigated using various microscopic techniques, such as atomic force microscopy, Raman spectroscopy, transmission electron microscopy, and X-ray photoelectron spectroscopy, providing significant insights into morphology and structural variations under different oxidative conditions. The electronic structure of the converted Ni x O y is further investigated using multiple soft X-ray spectroscopies, such as X-ray absorption and emission spectroscopies.
The sample holder of the invention is formed of the same semiconductor crystal as the integrated circuit on which the molecular beam expitaxial process is to be performed. In the preferred embodiment, the sample holder comprises three stacked micro-machined silicon wafers: a silicon base wafer having a square micro-machined center opening corresponding in size and shape to the active area of a CCD imager chip, a silicon center wafer micro-machined as an annulus having radially inwardly pointing fingers whose ends abut the edges of and center the CCD imager chip within the annulus, and a silicon top wafer micro-machined as an annulus having cantilevered membranes which extend over the top of the CCD imager chip. The micro-machined silicon wafers are stacked in the order given above with the CCD imager chip centered in the center wafer and sandwiched between the base and top wafers. The thickness of the center wafer is about 20% less than the thickness of the CCD imager chip. Preferably, four titanium wires, each grasping the edges of the top and base wafers, compress all three wafers together, flexing the cantilever fingers of the top wafer to accommodate the thickness of the CCD imager chip, acting as a spring holding the CCD imager chip in place.
Nanoscale manipulation and patterning usually require costly and sensitive top-down techniques such as those used in scanning probe microscopies or in semiconductor lithography. DNA nanotechnology enables exploration of bottom-up fabrication and has previously been used to design self-assembling components capable of linear and rotary motion. In this work, we combine three independently controllable DNA origami linear actuators to create a nanoscale robotic printer. The two-axis positioning mechanism comprises a moveable gantry, running on parallel rails, threading a mobile sleeve. We show that the device is capable of reversibly positioning a write head over a canvas through the addition of signaling oligonucleotides. We demonstrate “write” functionality by using the head to catalyze a local DNA strand–exchange reaction, selectively modifying pixels on a canvas. Furthermore, this work demonstrates the power of DNA nanotechnology for creating nanoscale robotic components and could find application in surface manufacturing, biophysical studies, and templated chemistry.
A new class of room-temperature infrared detectors has been developed through use of metal-insulator-semiconductor (MIS) or metal-insulator-semiconductor-insulator-metal (MISIM) slabs. The detectors, which have been fabricated from Si, Ge and GaAs, rely for operation on the electrical capacitance variations induced by modulated incident radiation. The peak detectivity for a 1000-A Si MISIM detector is comparable to that of a conventional Si detector functioning in the photovoltaic mode. Optimization of the photocapacitive-mode detection sensitivity is discussed.
Semiconductors made to accept precise etching after pretreatment. Combination of material destabilization and anisotropic etching permits formation of precise perpendicular-wall cavities in silicon wafers and other semiconductors. New technique extends capabilities of current micromachining technology to fabrication of submillimeter waveguide arrays and filters. Pre-etching process currently used to fabricate thin-walled arrays of submillimeter waveguides for use as dichroic bandpass filters. Possible applications include integration of sensor probes and processing of circuitry on same silicon chip.