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This report documents the efforts and results of the fiscal year (FY) 2010 NASA Electronic Parts and Packaging Program (NEPP) task for nonvolatile memory (NVM) reliability. This year's focus was to measure latency (read, program, and erase) of NAND Flash memories and determine how these parameters drift with erase/program/read endurance cycling.
Electronics designed for use in NASA space missions are required to work efficiently and reliably under harsh environment conditions. These Include radiation, extreme temperatures, thermal cycling, to name a few. Preliminary data obtained on new Gallium Nitride and Silicon Carbide power devices under exposure to radiation followed by long term thermal cycling are presented. This work was done in collaboration with GSFC and JPL in support of the NASA Electronic Parts and Packaging (NEPP) Program
Electronics designed for use in NASA space missions are required to work efficiently and reliably under harsh environment conditions. These include radiation, extreme temperatures, and thermal cycling, to name a few. Data obtained on long-term thermal cycling of new un-irradiated and irradiated samples of EPC1001 gallium nitride enhancement-mode transistors are presented. This work was done by a collaborative effort including GRC, GSFC, and support the NASA www.nasa.gov 1 JPL in of Electronic Parts and Packaging (NEPP) Program
This document has been developed in the course of NASA Electronic Parts and Packaging (NEPP) program and is not an official endorsement of the insertion of commercial capacitors in space programs or an established set of requirements for their testing. The purpose of this document is to suggest possible ways for selection, screening, and qualification of commercial capacitors for NASA projects and open discussions in the parts engineering community related to the use of COTS ceramic capacitors. This guideline is applicable to commercial surface mount chip, simple parallel plate design, multi-layer ceramic capacitors (MLCCs) rated to voltages of 100V and less. Parts with different design, e.g. low inductance ceramic capacitors (LICA), land grid array (LGA) etc., might need additional testing and tailoring of the requirements described in this document. Although the focus of this document is on commercial MLCCs, many procedures discussed below would be beneficial for military-grade capacitors
We have developed a family of tunable microwave circuits, operating from X- through Ka-band, based on laser ablated BaxSr1-xTiO films on lanthanum aluminate and magnesium oxide substrates. Circuits include voltage controlled oscillators, filters, phase shifters and antennas. A review of the basic theory of operation of these devices will be presented along with measured performance. Emphasis has been on low-loss phase shifters to enable a new phased array architecture. The critical role of phase shifter loss and transient response in reflectarray antennas will be discussed. The Ferroelectric Reflectarray Critical Components Space Experiment was launched on the penultimate Space Shuttle, STS-134, in May of 2011. It included a bank of ferroelectric phase shifters with two different stoichiometries as well as ancillary electronics. The experiment package and status will be reported. In addition, unusual results of a Van der Pauw measurement involving a ferroelectric film grown on buffered high resisitivity silicon will be discussed.
This document reports the status of the NASA Electronic Parts and Packaging (NEPP) Double Data Rate 2 (DDR2) Reliability effort for FY2012. The task expanded the focus of evaluating reliability effects targeted for device examination. FY11 work highlighted the need to test many more parts and to examine more operating conditions, in order to provide useful recommendations for NASA users of these devices. This year's efforts focused on development of test capabilities, particularly focusing on those that can be used to determine overall lot quality and identify outlier devices, and test methods that can be employed on components for flight use. Flight acceptance of components potentially includes considerable time for up-screening (though this time may not currently be used for much reliability testing). Manufacturers are much more knowledgeable about the relevant reliability mechanisms for each of their devices. We are not in a position to know what the appropriate reliability tests are for any given device, so although reliability testing could be focused for a given device, we are forced to perform a large campaign of reliability tests to identify devices with degraded reliability. With the available up-screening time for NASA parts, it is possible to run many device performance studies. This includes verification of basic datasheet characteristics. Furthermore, it is possible to perform significant pattern sensitivity studies. By doing these studies we can establish higher reliability of flight components. In order to develop these approaches, it is necessary to develop test capability that can identify reliability outliers. To do this we must test many devices to ensure outliers are in the sample, and we must develop characterization capability to measure many different parameters. For FY12 we increased capability for reliability characterization and sample size. We increased sample size this year by moving from loose devices to dual inline memory modules (DIMMs) with an approximate reduction of 20 to 50 times in terms of per device under test (DUT) cost. By increasing sample size we have improved our ability to characterize devices that may be considered reliability outliers. This report provides an update on the effort to improve DDR2 testing capability. Although focused on DDR2, the methods being used can be extended to DDR and DDR3 with relative ease.
Presentation for the NASA Electronic Parts and Packaging (NEPP) Small Mission Workshop.
This presentation provides a NASA Electronic Parts and Packaging (NEPP) program update on tantalum and ceramic capacitors.
This is a NASA Electronics Parts and Packaging (NEPP) independent investigation to determine the single event destructive and transient susceptibility of the Microsemi RTG4 device (DUT).
Due to low ESR and safe failure mode, new technology chip polymer tantalum capacitors (CPTC) have gained popularity in the electronics design community, first in commercial applications, and now in hi-rel and space systems. The major drawbacks of these parts are high leakage currents, degradation under environmental stresses, and a relatively narrow temperature range of operating and storage conditions. Several studies have shown that a certain amount of moisture in polymer cathodes is necessary for a normal operation of the parts. This might limit applications of CPTCs in space systems and requires analysis of long-term exposure to deep vacuum conditions on their performance and reliability. High leakage currents and limited maximum operational temperature complicate accelerated testing that is necessary to assess long-term reliability and require new screening and qualification procedures for quality assurance. A better understanding of behavior of CPTCs as compared to traditional, MnO2, capacitors is necessary to develop adequate approaches for QA system for space applications. A specific of CPTCs is that different materials and processes might be used for low-voltage (10 V and less) and high-voltage (above 10 V) capacitors, so performance and degradation processes in these groups require separate analysis. In this work, that is a part of the NASA Electronic Parts and Packaging (NEPP) program, degradation of AC and DC characteristics under environmental stresses at different temperatures and voltages have been studied in nine lots of commercial and automotive grade capacitors rated to 10 V. Results of analysis of leakage currents, high temperature storage (HTS) up to 5000 hrs in vacuum and air at different temperatures, and Highly Accelerated Life Testing (HALT) in the range from 85 C to 145 C are presented. Temperature and voltage acceleration factors were calculated based on approximation of distributions of degradation rates with a general log-linear Weibull model. Mechanisms of degradation and failures, and requirements for screening and qualification testing are discussed.
This presentation provides a NASA Electronic Parts and Packaging (NEPP) program update on tantalum and ceramic capacitors.
This presentation provides a NASA Electronic Parts and Packaging (NEPP) Program update of independent Single Event Upset (SEU) Field Programmable Gate Array (FPGA) testing including FPGA test guidelines, Microsemi RTG4 heavy-ion results, Xilinx Kintex-UltraScale heavy-ion results, Xilinx UltraScale+ single event effect (SEE) test plans, development of a new methodology for characterizing SEU system response, and NEPP involvement with FPGA security and trust.
This presentation will include information about Double Data Rate (DDR) technology, NASA Electronic Parts and Packaging (NEPP) tasks and their purpose, collaborations, a roadmap, NEPP partners, results to date, and future plans.
This presentation will include information about Graphics Processor Units (GPUs) technology, NASA Electronic Parts and Packaging (NEPP) tasks, The test setup, test parameter considerations, lessons learned, collaborations, a roadmap, NEPP partners, results to date, and future plans.
Recent work for the NASA Electronic Parts and Packaging Program Power MOSFET task is presented. The Task technology focus, roadmap, and partners are given. Recent single-event effect test results on commercial, automotive, and radiation hardened trench power MOSFETs are summarized with an emphasis on risk of using commercial and automotive trench-gate power MOSFETs in space applications.
The purpose of this test is to assess the single event effects (SEE) and radiation susceptibility of the Intel Optane Memory device (SSD) containing the 3D Xpoint phase change memory (PCM) technology. This test is supported by the NASA Electronics Parts and Packaging Program (NEPP).
The Photonics Group at NASA Goddard Space Flight Center in the Electrical Engineering Division of the Advanced Engineering and Technologies Directorate has been involved in the design, development, characterization, qualification, manufacturing, integration and anomaly analysis of optical fiber subsystems for over a decade. The group supports a variety of instrumentation across NASA and outside entities that build flight systems. Among the projects currently supported are: The Lunar Reconnaissance Orbiter, the Mars Science Laboratory, the James Webb Space Telescope, the Express Logistics Carrier for the International Space Station and the NASA Electronic Parts. and Packaging Program. A collection of the most pertinent information gathered during project support over the past year in regards to space flight performance of optical fiber components is presented here. The objective is to provide guidance for future space flight designs of instrumentation and communication systems.
NASA Electronic Parts and Packaging (NEPP) is developing a process to be employed in critical applications. The framework assesses levels of Trust and assurance in microelectronic systems. The process is being created with participation from a variety of organizations. We present a synopsis of the framework that includes contributions from The Aerospace Corporation.