SEARCH · Search NASA

Results for “Memory”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

SourceResearch connectionFrom yearThrough year

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 469 records · Page 26

All sources NASA NTRS DOE OSTI

NASA NTRS1973

Modeling of a bubble-memory organization with self-checking translators to achieve high reliability.

Study of the design and modeling of a highly reliable bubble-memory system that has the capabilities of: (1) correcting a single 16-adjacent bit-group error resulting from failures in a single basic storage module (BSM), and (2) detecting with a probability greater than 0.99 any double errors resulting from failures in BSM's. The results of the study justify the design philosophy adopted of employing memory data encoding and a translator to correct single group errors and detect double group errors to enhance the overall system reliability.

Bouricius, W. G.↗

NASA NTRS1973

Design relationships for holographic memories.

The maximum capacity of a block-oriented, random-access memory is determined primarily by the geometrical parameters of the lenses required to create a Fourier transform of a spatial bit pattern and to image the reconstructed bits onto a photodetector array. Furthermore, the maximum packing density is determined primarily by the same parameters. Several important relationships are developed that are useful in the preliminary design of holographic memories.

Lugt, A. V.↗

NASA NTRS1974

Control of Finite-State, Finite Memory Stochastic Systems

A generalized problem of stochastic control is discussed in which multiple controllers with different data bases are present. The vehicle for the investigation is the finite state, finite memory (FSFM) stochastic control problem. Optimality conditions are obtained by deriving an equivalent deterministic optimal control problem. A FSFM minimum principle is obtained via the equivalent deterministic problem. The minimum principle suggests the development of a numerical optimization algorithm, the min-H algorithm. The relationship between the sufficiency of the minimum principle and the informational properties of the problem are investigated. A problem of hypothesis testing with 1-bit memory is investigated to illustrate the application of control theoretic techniques to information processing problems.

Sandell, Nils R.↗

NASA NTRS1974

Basic memory module

Construction and electrical characterization of the 4096 x 2-bit Basic Memory Module (BMM) are reported for the Space Ultrareliable Modular Computer (SUMC) program. The module uses four 2K x 1-bit N-channel FET, random access memory chips, called array chips, and two sense amplifier chips, mounted and interconnected on a ceramic substrate. Four 5% tolerance power supplies are required. At the Module, the address, chip select, and array select lines require a 0-8.5 V MOS signal level. The data output, read-strobe, and write-enable lines operate at TTl levels. Although the module is organized as 4096 x 2 bits, it can be used in a 8196 x 1-bit application with appropriate external connections. A 4096 x 1-bit organization can be obtained by depopulating chips.

Tietze, F. C.↗

NASA NTRS1975

Open coil structure for bubble-memory-device packaging

Concept has several important advantages over close-wound system: memory and coil chips are separate and interchangeable; interconnections in coil level are eliminated by packing memory chip and electronics in single structure; and coil size can be adjusted to optimum value in terms of power dissipation and field uniformity.

Chen, T. T.↗

NASA NTRS1974

Augmented burst-error correction for UNICON laser memory

A single-burst-error correction system is described for data stored in the UNICON laser memory. In the proposed system, a long fire code with code length n greater than 16,768 bits was used as an outer code to augment an existing inner shorter fire code for burst error corrections. The inner fire code is a (80,64) code shortened from the (630,614) code, and it is used to correct a single-burst-error on a per-word basis with burst length b less than or equal to 6. The outer code, with b less than or equal to 12, would be used to correct a single-burst-error on a per-page basis, where a page consists of 512 32-bit words. In the proposed system, the encoding and error detection processes are implemented by hardware. A minicomputer, currently used as a UNICON memory management processor, is used on a time-demanding basis for error correction. Based upon existing error statistics, this combination of an inner code and an outer code would enable the UNICON system to obtain a very low error rate in spite of flaws affecting the recorded data.

Lim, R. S.↗

NASA NTRS1975

Plated wire random access memories

A program was conducted to construct 4096-work by 18-bit random access, NDRO-plated wire memory units. The memory units were subjected to comprehensive functional and environmental tests at the end-item level to verify comformance with the specified requirements. A technical description of the unit is given, along with acceptance test data sheets.

Gouldin, L. D.↗

NASA NTRS1975

Displays, memories, and signal processing: A compilation

Articles on electronics systems and techniques were presented. The first section is on displays and other electro-optical systems; the second section is devoted to signal processing. The third section presented several new memory devices for digital equipment, including articles on holographic memories. The latest patent information available is also given.

Source record↗

NASA NTRS1977

DIFMOS - A floating-gate electrically erasable nonvolatile semiconductor memory technology

Electrically alterable read-only memories (EAROM's) or reprogrammable read-only memories (RPROM's) can be fabricated using a single-level metal-gate p-channel MOS technology with all conventional processing steps. Given the acronym DIFMOS for dual-injector floating-gate MOS, this technology utilizes the floating-gate technique for nonvolatile storage of data. Avalanche injection of hot electrons through gate oxide from a special injector diode in each bit is used to charge the floating gates. A second injector structure included in each bit permits discharge of the floating gate by avalanche injection of holes through gate oxide. The overall design of the DIFMOS bit is dictated by the physical considerations required for each of the avalanche injector types. The end result is a circuit technology which can provide fully decoded bit-erasable EAROM-type circuits using conventional manufacturing techniques.

Gosney, W. M.↗

NASA NTRS1979

Troubleshooting plated-wire memories

Faults in plated wire memories are identified and located from outside of system by applying electrical impulses and analyzing their reflectance in technique of Time-Domain Reflectometry (TDR). Intermittent faults are easier to find because memory system is not disturbed by probing or disassembly.

Baker, C. M.↗

NASA NTRS1980

Conserving power in computer memories

Power control system for electronic memories saves energy by switching off power to portions of memories that are not in use. Although power-off period lasts only a few microseconds or milliseconds, it amounts to sizable part of overall read/write cycle timer; large energy savings can be realized.

Source record↗

NASA NTRS1979

The design and testing of a memory metal actuated boom release mechanism

A boom latch and release mechanism was designed, manufactured and tested, based on a specification for the ISEE-B satellite mechanism. From experimental results obtained, it is possible to calculate the energy available and the operating torques which can be achieved from a torsional shape memory element in terms of the reversible strain induced by prior working. Some guidelines to be followed when designing mechanisms actuated by shape memory elements are included.

Powley, D. G.↗

NASA NTRS1979

Multilayer self-structured bubble memories

Research work on multilayer self-structured bubble memories is at an early stage. The coupling of bubbles to stripes is investigated theoretically and experimentally and shown to be adequate for propagation. Propagation of stripes is demonstrated both by current access and field access techniques. These propagation techniques are of prime interest because they can eliminate most photographic features from the storage area. Multilayer films offer great promise for higher-capacity higher-density memories in which most of the photolithography has been eliminated and the minimum feature size of much of the remaining has been increased. Furthermore, stripe propagation can be carried out with current access, providing a significant reduction in packaging cost and power consumption over field access devices.

Kamin, M.↗

NASA NTRS1980

An experimental distributed microprocessor implementation with a shared memory communications and control medium

The distributed processing concept is defined in terms of control primitives, variables, and structures and their use in performing a decomposed discrete Fourier transform (DET) application function. The design assumes interprocessor communications to be anonymous. In this scheme, all processors can access an entire common database by employing control primitives. Access to selected areas within the common database is random, enforced by a hardware lock, and determined by task and subtask pointers. This enables the number of processors to be varied in the configuration without any modifications to the control structure. Decompositional elements of the DFT application function in terms of tasks and subtasks are also described. The experimental hardware configuration consists of IMSAI 8080 chassis which are independent, 8 bit microcomputer units. These chassis are linked together to form a multiple processing system by means of a shared memory facility. This facility consists of hardware which provides a bus structure to enable up to six microcomputers to be interconnected. It provides polling and arbitration logic so that only one processor has access to shared memory at any one time.

Mejzak, R. S.↗

NASA NTRS1980

A spacecraft mass memory design using self-structured magnetic bubbles

A self-structured multilayered bubble device developed for spacecraft sensor systems is described. The data link buffer mass memory is analyzed, and system characteristics are estimated based on a nominal 1.6 micron bubble diameter. It is shown that a memory of at least 10 billion bits capacity and 30 megabits per second could be developed with conventional spacecraft constraints.

Stermer, R. L., Jr.↗

NASA NTRS1981

Semiconductor-ferroelectric nonvolatile memory using anomalous high photovoltages in ferroelectric ceramics

A small ferroelectric ceramic element is used with an insulating gate transistor and two diodes as an electrically addressed, nonvolatile memory device which is read out nondestructively. The device uses the anomalous photovoltaic effect in ferroelectric ceramics, an effect in which the polarity and magnitude of photovoltages depend on the direction and magnitude of remanent polarization. Experimental results give memory characteristics. The device could be programmed with pulses as short as 200 ns. There is long-time retention of stored data.

Brody, P. S.↗

NASA NTRS1981

An analytic formulation for heating source memory in the thermospheric composition

Numerical calculations from a spectral circulation model are utilized to construct an analytic Green's function formulation describing the meridional, time-dependent thermospheric composition and temperature response during magnetic storms. The purpose is to develop a formulation that embodies source memory while being sufficiently simple to serve as a heuristic guide for empirical modeling. By passing from the discrete Fourier series representation, utilized for the numerical circulation model, to a continuous Fourier integral representation, explicit waves are obtained for the thermospheric response times. The response times are altitude and species dependent and can exceed two days below 200 km. Thus, for certain storm scenarios, pronounced source memory signatures for the composition and temperature are predicted. Response times obtained from the formulation are shown to give a response consistent with previously published neutral composition data from AE-C for the February 1974 storm when an ap dependent heat source is employed.

Porter, H. S.↗

NASA NTRS1981

Extended memory management under RTOS

A technique for extended memory management in ROLM 1666 computers using FORTRAN is presented. A general software system is described for which the technique can be ideally applied. The memory manager interface with the system is described. The protocols by which the manager is invoked are presented, as well as the methods used by the manager.

Plummer, M.↗