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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 487 records · Page 27
All sourcesNASA NTRSDOE OSTI
NASA NTRS1996

Development of Electrochemical Supercapacitors for EMA Applications

A limitation of the typical electrochemical capacitor is the maximum available power and energy density, and an improvement in capacitance per unit weight and volume is needed. A solid-ionomer electrochemical capacitor having a unit cell capacitance greater than 2 F/sq cm and a repeating element thickness of 6 mils has been developed. This capacitor could provide high-current pulses for electromechanical actuation (EMA). Primary project objectives were to develop high-capacitance particulates, to increase capacitor gravimetric and volumetric energy densities above baseline and to fabricate a 10-V capacitor with a repeating element thickness of 6 mils or less. Specific EMA applications were identified and capacitor weight and volume projections made.

Kosek, John A.↗
NASA NTRS2002

Space Vehicle Power System Comprised of Battery/Capacitor Combinations

Recent improvements in energy densities of batteries open the possibility of using electric rather that hydraulic actuators in space vehicle systems. However, the systems usually require short-duration, high-power pulses. This power profile requires the battery system to be sized to meet the power requirements rather than stored energy requirements, often resulting in a large and inefficient energy storage system. Similar transient power applications have used a combination of two or more disparate energy storage technologies. For instance, placing a capacitor and a battery side-by-side combines the high energy density of a battery with the high power performance of a capacitor and thus can create a lighter and more compact system. A parametric study was performed to identify favorable scenarios for using capacitors. System designs were then carried out using equivalent circuit models developed for five commercial electrochemical capacitor products. Capacitors were sized to satisfy peak power levels and consequently "leveled" the power requirement of the battery, which can then be sized to meet system energy requirements. Simulation results clearly differentiate the performance offered by available capacitor products for the space vehicle applications.

Camarotte, C.↗
NASA NTRS2004

Liquid-Metal-Fed Pulsed Plasma Thrusters

A short document proposes liquid-metal-fed pulsed plasma thrusters for small spacecraft. The propellant liquid for such a thruster would be a low-melting-temperature metal that would be stored molten in an unpressurized, heated reservoir and would be pumped to the thruster by a magnetohydrodynamic coupler. The liquid would enter the thruster via a metal tube inside an electrically insulating ceramic tube. A capacitor would be connected between the outlet of the metal tube and the outer electrode of the thruster. The pumping would cause a drop of liquid to form at the outlet, eventually growing large enough to make contact with the outer electrode. Contact would close the circuit through the capacitor, causing the capacitor to discharge through the drop. The capacitor would have been charged with enough energy that the discharge would vaporize, ionize, and electromagnetically accelerate the contents of the metal drop. The resulting plasma would be ejected at a speed of about 50 km/s. The vaporization of the drop would reopen the circuit through the capacitor, enabling recharging of the capacitor. As pumping continued, a new drop would grow and the process would repeat.

Markusic, Thomas↗
DOE OSTI2025

Understanding Reliability Trade-Offs in 1T-nC and 2T-nC FeRAM Designs

Ferroelectric random access memory (FeRAM) is a promising candidate for energy-efficient nonvolatile memory, particularly for logic-in-memory and compute-in-memory (CIM) applications. Among the available cell architectures, One-Transistor–n-Capacitor (1T-nC) and two-transistor–n-capacitor (2T-nC) FeRAMs each offer distinct trade-offs in density, scalability, and reliability. In this work, we present a comparative study of these two architectures under both dimensional scaling ( XY/Z shrinkage) and vertical integration (increasing stacked capacitors per cell). Using technology computer-aided design (TCAD) and circuit-level simulations, we analyze how scaling impacts ferroelectric capacitance, parasitic coupling, and floating-node (FN) dynamics, which together dictate sense margin (SM) and read stability. A key mitigation strategy—floating unselected capacitors—is applied to both architectures, effectively decoupling the SM from the number of stacked capacitors and enabling tractable analysis across scaling regimes. Results show that 1T-nC suffers more from charge sharing with the bitline (BL), while 2T-nC benefits from transistor isolation and stronger low-voltage sensing at the cost of increased area. By systematically evaluating these behaviors across scaling directions, this work establishes the reliability trade-offs of 1T-nC and 2T-nC cells and provides design guidelines for high-density, vertically integrated FeRAM systems.

1T-nC↗
DOE OSTI2024

AI-assisted discovery of high-temperature dielectrics for energy storage

Abstract Electrostatic capacitors play a crucial role as energy storage devices in modern electrical systems. Energy density, the figure of merit for electrostatic capacitors, is primarily determined by the choice of dielectric material. Most industry-grade polymer dielectrics are flexible polyolefins or rigid aromatics, possessing high energy density or high thermal stability, but not both. Here, we employ artificial intelligence (AI), established polymer chemistry, and molecular engineering to discover a suite of dielectrics in the polynorbornene and polyimide families. Many of the discovered dielectrics exhibit high thermal stability and high energy density over a broad temperature range. One such dielectric displays an energy density of 8.3 J cc −1 at 200 °C, a value 11 × that of any commercially available polymer dielectric at this temperature. We also evaluate pathways to further enhance the polynorbornene and polyimide families, enabling these capacitors to perform well in demanding applications (e.g., aerospace) while being environmentally sustainable. These findings expand the potential applications of electrostatic capacitors within the 85–200 °C temperature range, at which there is presently no good commercial solution. More broadly, this research demonstrates the impact of AI on chemical structure generation and property prediction, highlighting the potential for materials design advancement beyond electrostatic capacitors.

25 ENERGY STORAGE↗
DOE OSTI2025

Towards Scalable 3D Integration of 2T-nC FeRAM with Hundreds of Layer Stacking

In this article, we study the limits of the number of capacitors and read history dependence in a 2T-nC ferroelectric random-access memory (FeRAM) cell, paving the way for its high-density integration toward hundreds of stacked layers. Through a comprehensive experimental and simulation study on the scaling behavior of the 2T-nC FeRAM architecture, we demonstrate: (i) successful fabrication of 2T-64C cells with robust memory operation and clearly distinguishable ‘0’ and ‘1’ states, even in 64- capacitor configurations; (ii) that the parasitic capacitance of the floating node originates predominantly from the linear component of the ferroelectric capacitor, and its impact on n-scaling—due to degraded sense margin—can be mitigated by floating unselected capacitors with enough TΩ isolation; (iii) that sharing write and read transistors among n capacitors introduces a read history dependence issue due to fluctuating floating node voltage (VFN); and (iv) that a proposed FN discharge scheme can effectively eliminate read-sequence dependence, at the cost of reduced read endurance.

36 MATERIALS SCIENCE↗
DOE OSTI2024

High-Density Capacitive Energy Storage in Low-Dielectric-Constant Polymer PMMA/2D Mica Nanofillers Heterostructure Composite

The ubiquitous, rising demand for energy storage devices with ultra-high storage capacity and efficiency has drawn tremendous research interest in developing energy storage devices. Dielectric polymers are one of the most suitable materials used to fabricate electrostatic capacitive energy storage devices with thin-film geometry with high power density. In this work, we studied the dielectric properties, electric polarization, and energy density of PMMA/2D Mica nanocomposite capacitors where stratified 2D nanofillers are interfaced between the multiple layers of PMMA thin films using two heterostructure designs of the capacitors, PMMA/2D Mica/PMMA (PMP) and PMMA/2D Mica/PMMA/2D Mica/PMMA (PMPMP). The incorporation of a 2D Mica nanofiller in the low-dielectric-constant PMMA leads to an enhancement in the dielectric constant, with ∆ε ~ 15% and 53% for PMP and PMPMP heterostructures at room temperature. Additionally, a significant improvement in discharged energy density was measured for the PMPMP capacitor (Ud ~ 38 J/cm3 at 825 MV/m) compared to the pristine PMMA (Ud ~ 9.5 J/cm3 at 522 MV/m) and PMP capacitors (Ud ~ 19 J/cm3 at 740 MV/m). This excellent capacitive and energy storage performance of the PMMA/2D Mica heterostructure nanocomposite may inform the fabrication of thin-film, high-density energy storage capacitor devices for potential applications in various platforms.

Biochemistry & Molecular Biology↗
NASA NTRS1980

Active notch filter network with variable notch depth, width and frequency

An active notch filter having independently adjustable notch frequency, width, and depth is provided by three equal capacitors connected in series with an operational amplifier (connected in a voltage follower configuration), a potentiometer across the series connected capacitors for notch depth adjustment, and a potentiometer (for notch frequency connected across the center capacitor); with its tap connected to receive a voltage feedback signal from a variable voltage divider comprised of another potentiometer for notch width. Adjusting the voltage dividing potentiometer will independently set the notch width, and adjusting the tap on the potentiometer across the center capacitor will independently adjust the notch frequency of the filter. A second operational amplifier connected in a voltage follower configuration may be used to connect the voltage divider output to the adjustable tap of the potentiometer across the center capacitor.

Black, J. M.↗
NASA NTRS1993

Forback DC-to-DC converter

A pulse-width modulated DC-to-DC power converter including a first inductor, i.e. a transformer or an equivalent fixed inductor equal to the inductance of the secondary winding of the transformer, coupled across a source of DC input voltage via a transistor switch which is rendered alternately conductive (ON) and nonconductive (OFF) in accordance with a signal from a feedback control circuit is described. A first capacitor capacitively couples one side of the first inductor to a second inductor which is connected to a second capacitor which is coupled to the other side of the first inductor. A circuit load shunts the second capacitor. A semiconductor diode is additionally coupled from a common circuit connection between the first capacitor and the second inductor to the other side of the first inductor. A current sense transformer generating a current feedback signal for the switch control circuit is directly coupled in series with the other side of the first inductor so that the first capacitor, the second inductor and the current sense transformer are connected in series through the first inductor. The inductance values of the first and second inductors, moreover, are made identical. Such a converter topology results in a simultaneous voltsecond balance in the first inductance and ampere-second balance in the current sense transformer.

Lukemire, Alan T.↗
NASA NTRS1995

Forback DC-to-DC converter

A pulse-width modulated DC-to-DC power converter including a first inductor, i.e. a transformer or an equivalent fixed inductor equal to the inductance of the secondary winding of the transformer, coupled across a source of DC input voltage via a transistor switch which is rendered alternately conductive (ON) and nonconductive (OFF) in accordance with a signal from a feedback control circuit is described. A first capacitor capacitively couples one side of the first inductor to a second inductor which is connected to a second capacitor which is coupled to the other side of the first inductor. A circuit load shunts the second capacitor. A semiconductor diode is additionally coupled from a common circuit connection between the first capacitor and the second inductor to the other side of the first inductor. A current sense transformer generating a current feedback signal for the switch control circuit is directly coupled in series with the other side of the first inductor so that the first capacitor, the second inductor and the current sense transformer are connected in series through the first inductor. The inductance values of the first and second inductors, moreover, are made identical. Such a converter topology results in a simultaneous voltsecond balance in the first inductance and ampere-second balance in the current sense transformer.

Lukemire, Alan T.↗
NASA NTRS1980

Edge smoothing for real-time simulation of a polygon face object system as viewed by a moving observer

The visual system within an aircraft flight simulation system receives flight data and terrain data which is formated into a buffer memory. The image data is forwarded to an image processor which translates the image data into face vertex vectors Vf, defining the position relationship between the vertices of each terrain object and the aircraft. The image processor then rotates, clips, and projects the image data into two-dimensional display vectors (Vd). A display generator receives the Vd faces, and other image data to provide analog inputs to CRT devices which provide the window displays for the simulated aircraft. The video signal to the CRT devices passes through an edge smoothing device which prolongs the rise time (and fall time) of the video data inversely as the slope of the edge being smoothed. An operational amplifier within the edge smoothing device has a plurality of independently selectable feedback capacitors each having a different value. The values of the capacitors form a series which doubles as a power of two. Each feedback capacitor has a fast switch responsive to the corresponding bit of a digital binary control word for selecting (1) or not selecting (0) that capacitor. The control word is determined by the slope of each edge. The resulting actual feedback capacitance for each edge is the sum of all the selected capacitors and is directly proportional to the value of the binary control word. The output rise time (or fall time) is a function of the feedback capacitance, and is controlled by the slope through the binary control word.

Lotz, Robert W.↗
NASA NTRS2004

Hold-up power supply for flash memory

A hold-up power supply for flash memory systems is provided. The hold-up power supply provides the flash memory with the power needed to temporarily operate when a power loss exists. This allows the flash memory system to complete any erasures and writes, and thus allows it to shut down gracefully. The hold-up power supply detects when a power loss on a power supply bus is occurring and supplies the power needed for the flash memory system to temporally operate. The hold-up power supply stores power in at least one capacitor. During normal operation, power from a high voltage supply bus is used to charge the storage capacitors. When a power supply loss is detected, the power supply bus is disconnected from the flash memory system. A hold-up controller controls the power flow from the storage capacitors to the flash memory system. The hold-up controller uses feedback to assure that the proper voltage is provided from the storage capacitors to the flash memory system. This power supplied by the storage capacitors allows the flash memory system to complete any erasures and writes, and thus allows the flash memory system to shut down gracefully.

Ott, William E.↗
NASA NTRS1980

Radiant energy to electric energy converter

Radiant energy is converted into electric energy by irradiating a capacitor including an ionic dielectric. The dielectric is a sintered crystal superionic conductor, e.g., lanthanum trifluoride, lanthanum trichloride, or silver bromide, so that a multiplicity of crystallites exist between electrodes of the capacitor. The radiant energy cyclically irradiates the dielectric so that the dielectric exhibits a cyclic photocapacitive like effect. Adjacent crystallites have abutting surfaces that enable the crystallites to effectively form a multiplicity of series capacitor elements between the electrodes. Each of the capacitor elements has a dipole layer only on or near its surface. The capacitor is initially charged to a voltage just below the dielectric breakdown voltage by connecting it across a DC source causing a current to flow through a charging resistor to the dielectric. The device can be utilized as a radiant energy detector or as a solar energy cell.

Sher, Arden↗
NASA NTRS1987

Temperature responsive transmitter

A temperature responsive transmitter is provided in which frequency varies linearly with temperature. The transmitter includes two identically biased transistors connected in parallel. A capacitor, which reflects into the common bases to generate negative resistance effectively in parallel with the capacitor, is connected to the common emitters. A crystal is effectively in parallel with the capacitor and the negative resistance. Oscillations occur if the magnitude of the absolute value of the negative resistance is less than the positive resistive impedance of the capacitor and the inductance of the crystal. The crystal has a large linear temperature coefficient and a resonant frequency which is substantially less than the gain-bandwidth product of the transistors to ensure that the crystal primarily determines the frequency of oscillation. A high-Q tank circuit having an inductor and a capacitor is connected to the common collectors to increase the collector current flow which in turn enhances the radiation of the oscillator frequency by the inductor.

Kleinberg, Leonard L.↗
DOE OSTI2025

Vertical 2T-nC FeRAM Demonstration: BEOL Read Transistor for 4F 2 Memory Strings and Two-Terminal Selector Design for Polarization Disturb Mitigation

In this work, we demonstrate a vertical 2T-nC FeRAM with a back-end-of-line (BEOL) read transistor (T R ) for 4F 2 string and propose a selector design to mitigate polarization disturb in passive capacitor crossbar arrays. Key contributions include: 1) successful integration and operation composed of a Si MOSFET write transistor (T W ), 3-layer cylindrical ferroelectric capacitors, and Si-doped In 2 O 3 BEOL T R , demonstrating the feasibility of 4F 2 2T−nC string; 2) introducing nonlinearity into the capacitor stack to suppress ferroelectric voltage drop under inhibition biases while maintaining sufficient write voltage, reducing disturbance; 3)modeling and experimental validation of inserting a metalsemiconductor (a-Si)-metal (MSM) selector into the capacitor in mitigating the disturb, particularly achieving 9x reduction of disturb after 10 6 cycles in the V W /2 scheme.

42 ENGINEERING↗
NASA NTRS1972

Minimizing the area required for time constants in integrated circuits

When a medium- or large-scale integrated circuit is designed, efforts are usually made to avoid the use of resistor-capacitor time constant generators. The capacitor needed for this circuit usually takes up more surface area on the chip than several resistors and transistors. When the use of this network is unavoidable, the designer usually makes an effort to see that the choice of resistor and capacitor combinations is such that a minimum amount of surface area is consumed. The optimum ratio of resistance to capacitance that will result in this minimum area is equal to the ratio of resistance to capacitance which may be obtained from a unit of surface area for the particular process being used. The minimum area required is a function of the square root of the reciprocal of the products of the resistance and capacitance per unit area. This minimum occurs when the area required by the resistor is equal to the area required by the capacitor.

Lyons, J. C.↗
NASA NTRS1975

The relationship between reliability and bonding techniques in hybrid microcircuits

Differential thermal expansion was shown to be responsible for many observed failures in ceramic chip capacitors mounted on alumina substrates. It is shown that the mounting techniques used in bonding the capacitors have a marked effect upon the thermally induced mechanical stress and thus the failure rate. A mathematical analysis was conducted of a composite model of the capacitor-substrate system to predict the magnitude of thermally induced stresses. It was experimentally observed that the stresses in more compliant bonding systems such as soft lead tin and indium solders are significantly lower than those in hard solder and epoxy systems. The marked dependence upon heating and cooling rate was proven to be a determining factor in the prediction of failure solder systems. It was found that the harder or higher melting solders are less susceptible to thermal cycling effects but that they are more likely to fail during initial processing operations. Strain gage techniques were used to determine thermally induced expansion stresses of the capacitors and the alumina substrates. The compliance of the different bonding mediums was determined. From the data obtained, several recommendations are made concerning the optimum bonding system for the achievement of maximum reliability.

Caruso, S. V.↗
NASA NTRS1982

High speed computerized data acquisition of photovoltaic V-I characteristics

The voltage current (V-I) characteristics of the photovoltaic array were studied under actual environmental conditions. A method of data acquisition was devised that uses a capacitor charge technique to obtain the V-I characteristic and a computerized data system to display, record and process the data. The capacitor charge technique uses an array shorting transistor and a capacitor bank to sweep the array operating voltage and current from short circuit to open circuit in a specified time (approximately 125 ms). The computerized data system is synchronized with this transition and repetitively samples the array voltage and current during the transition and records the ambient conditions. This data is then normalized by the computer to standard conditions (100 mW/sq cm, 28 C) and is available in tabular and graphic form for both the voltage current and voltage power characteristics. The capacitor charge technique is described.

Delombard, R.↗