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This ECSCRM 2016 submission presents further electrical testing and microscopic post-failure studies aimed at more comprehensive understanding of the durability limits of this extreme temperature IC technology. The results summarized represent an unprecedented combination of T 500 C semiconductor IC durability and functionality.
Total ionizing dose (TID) and single-event effect (SEE) room-temperature radiation test results are presented for developmental prototype 4H-SiC junction field effect transistor (JFET) semiconductor integrated circuits (ICs) that have demonstrated prolonged operation in extremely high-temperature (500 °C) environments. The devices tested demonstrated over 7 Mrad(Si) TID tolerance and no destructive SEE susceptibility.
NASA space and aeronautical missions for probing the inner solar planets as well as for in situ monitoring and control of next-generation aeronautical engines require high-temperature environment operable sensors and electronics. A 96% aluminum oxide and Au thick-film metallization based packaging system including chip-level packages, printed circuit board, and edge-connector is in development for high temperature SiC electronics. An electronic packaging system based on this material system was successfully tested and demonstrated with SiC electronics at 500 C for over 10,000 hours in laboratory conditions previously. In addition to the tests in laboratory environments, this packaging system has more recently been tested with a SiC junction field effect transistor (JFET) on low earth orbit through the NASA Materials on the International Space Station Experiment 7 (MISSE7). A SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE7 suite to International Space Station via a Shuttle mission and tested on the orbit for eighteen months. A summary of results of tests in both laboratory and space environments will be presented. The future development of alumina based high temperature packaging using co-fired material systems for improved performance at high temperature and more feasible mass production will also be discussed.
The development of robust, high-performance integrated circuits (ICs) will enable numerous potential NASA missions of current interest, including long-duration robotic missions exploring the 460 °C surface of Venus. Currently, NASA is looking towards SiC-based devices to provide such a solution. However, the current NASA silicon carbide (SiC) JFET device with a channel length of 6μm (for recently fabricated Gen. 11 ICs) limits on mission relevant circuit capabilities [1]. In this study, we combined experiments with simulations to explore two straightforward fabrication strategies to reduce the SiC JFET channel length while maintaining turn-off behavior (Fig. 1a) needed to realize 500 °C circuit operation. The first fabrication strategy uses a shallow self-align nitrogen implant (Figure 1b) along the device's top surface but not below the gate combined with a high-dose phosphorous implant directly below the source and drain contacts. For the second fabrication strategy (Figure 1c), the high-dose phosphorous implants extended from below the contacts all the way up to the gate edges. Simulations guided gate length reductions without significant degradation in the turn-off performance. In total 12 SiC JFET variants implementing using the different fabrication strategies, gate lengths, and n-channel epilayer thickness were implemented in our simulation framework implemented in COMSOL. Since the COMSOL database does not have the material properties for 4H-SiC, these parameters were taken from the literature and implemented in COMSOL. The empirical models [2] for incomplete ionization, Auger recombination, low field mobility, and Shockley-Read-Hall recombination were implemented to account for material-specific device behavior.
Since electrons travel over 100 times faster in Silicon-Germanium (SiGe) than in pure Si due to the low effective masses associated with Ge and SiGe-based devices continue to replace Si-based solid-state electronic devices. SiGe thin film on sapphire was successfully grown at 890°C, using a magnetron sputtering system within heteroepitaxial framework. However, SiGe growth at 890oC is a costly and difficult process to produce as a uniform wafer for semiconductor device manufacturing due to thermal soak times, and geometric thermal shadowing from the wafer holder. To leverage the semiconducting capabilities of SiGe, novel processing techniques for SiGe film growth with decreased thermal loading are required. This paper introduces the Molten Target Sputtering (MTS) method that produces high mobility SiGe on sapphire below 500°C. This non-conventional method has the advantage of high kinetic energy, high-energy latency, and high flux density of sputtered atoms by combining benefits of both magnetron sputtering and thermal evaporation. For the MTS method, a 1~2 mm (depth and width) ring-shaped groove was cut between the center magnet and surrounded by electromagnets creating a circular cavity between the copper plate and source target materials that melt the target material. The SiGe grown from the MTS shows continuous morphology and 99.7% single crystal Si0.15Ge0.85 films. The Hall electron mobilities of the Si0.15Ge0.85 are 456 sq. cmV(exp -1)s(exp -1) and 123.9 sq. cmV(exp -1)s(exp -1) at 5.59 x 10(exp 18) cubic cm and 3.5 x 10(exp 20) cubic cm carrier concentration at 22.38°C, respectively. This is approximately 5.5 times higher than that of Si and similar to the Ge value at equivalent carrier concentrations and temperatures.
The development of robust, high-performance integrated circuits (ICs) will enable numerous potential NASA missions of current interest, including long-duration robotic missions exploring the 460°C surface of Venus. Currently, NASA is looking towards SiC-based devices to provide such a solution. However, the current NASA silicon carbide (SiC) JFET device with a channel length of 6 μm (recently fabricated Gen. 11 ICs) limits mission-relevant circuit capabilities. In this study, we combined experiments with simulations to explore two straightforward fabrication strategies (shallow n− and deep n+) to reduce the SiC JFET channel length while maintaining turn-off behavior needed to realize 500 °C circuit operation. First, the material properties for 4H-SiC were implemented in COMSOL and the Poisson equation was solved for twelve 2D device designs. Then, based on the insights gained from the distribution of the electron concentration, electrostatic potential, and electric field for twelve designs (with three fabrication strategies), simulation for a 1 μm gate length nJFET with the turn-off performance comparable to the state-of-the-art.
The development of robust, high-performance integrated circuits (ICs) will enable numerous potential NASA missions of current interest, including long-duration robotic missions exploring the 460°C surface of Venus. Currently, NASA is looking towards SiC-based devices to provide such a solution. However, the current NASA silicon carbide (SiC) JFET device with a channel length of 6 μm (recently fabricated Gen. 11 ICs) limits mission-relevant circuit capabilities. In this study, we combined experiments with simulations to explore two straightforward fabrication strategies (shallow n− and deep n+) to reduce the SiC JFET channel length while maintaining turn-off behavior needed to realize 500 °C circuit operation. First, the material properties for 4H-SiC were implemented in COMSOL and the Poisson equation was solved for twelve 2D device designs. Then, based on the insights gained from the distribution of the electron concentration, electrostatic potential, and electric field for twelve designs (with three fabrication strategies), simulation for a 1 μm gate length nJFET with the turn-off performance comparable to the state-of-the-art.
Zirconium (Zr) alloys are widely used as fuel cladding in nuclear power reactors due to their thermal stability, mechanical durability, corrosion resistance, and low neutron absorption cross-section. However, their performance is challenged by oxidation in reactor environments, making the study of Zr alloy corrosion behavior crucial for ensuring the safety, longevity, and economic viability of nuclear power systems. While the oxidation behavior of Zr-based cladding materials has been extensively studied since the 1950s, a mechanistic understanding into the relationship between structure evolution, solute element redistribution, and properties remains elusive. Valuable insights may be obtained through advanced experimental methods, such as in-situ and high resolution microscopy techniques. Here, in this study, the oxidation behavior of Zircaloy-4 at 500 °C in O 2 is characterized using a multimodal advanced characterization approach. Using in-situ X-ray diffraction, the phase evolution from metastable to stable oxides is tracked in real time. Complementary high-resolution techniques, including electron microscopy and atom probe tomography, reveal nanoscale insights into the microstructural changes and solute redistribution across the oxide/metal interface. Nanohardness mapping across the oxide/metal interface highlights localized mechanical property variations that may be linked to changes in microstructure and crystal structure within the oxide layer. These findings offer valuable insights into the microstructure and property evolution of Zircaloy-4 during oxidation, contributing to a better understanding of microstructural changes in Zr-based alloys under oxidative environments.
Light emitted from Venus’s surface can be viewed through spectral “windows” in its atmosphere, in the nearinfrared (NIR) around 1000 nanometer (nm) wavelengths. The NIR emissivity of Venus’s surface can constrain rock types and their weathering state; emissivities can be measured directly or calculated from reflectances. We measured the reflectances of igneous and sedimentary rocks at Venus’s surface temperature, 400 °C–500 °C at 850 and 950 nm; samples were heated in a box furnace in air, illuminated by light-emitting diodes (LEDs), and imaged with a modified charge-coupled device (CCD) camera. Reflectances were also measured at 25 °C from 350 to 1400 nm. Rock reflectances at 850 and 950 nm and 400 °C–500 °C are nearly identical to those at 25 °C, except for the effects of nanophase hematite forming on some surfaces. Fresh basalts have reflectances (high and low temperatures) near 7.5%; a leucogranite similarly has reflectances near 50%. Pigmentary hematite has nearly identical reflectances at high- and low-temperature at these wavelengths. Pigmentary hematite appears dark brown 400 °C–500 °C because its absorption edge has shifted to beyond the limit of human vision. These rock reflectances imply that basalts should have emissivities near 0.9, and granite (and similar felsic rocks) should have lower emissivities ∼0.5. Thus, basalt and felsic rock should be easily distinguished in NIR emissivity measurements of Venus’s surface, such as are baselined in recent Venus mission proposals. Other sedimentary rocks should have even lower emissivities: quartz sand at around ∼0.3, and anhydrite as low as 0.1.
To evaluate the potential of high entropy alloys (HEAs) for nuclear applications, two HEAs, Al 0.3 CoCrFeNi and CoCrFeMnNi, and a conventional Type 316H stainless steel (SS) were irradiated with 1 MeV krypton ions at 500 degrees C up to 1 dpa, and examined in-situ with a transmission electron microscope (TEM). After irradiation, a high density of ordered L1 2 nanoparticles was observed in Al 0.3 CoCrFeNi. In contrast, no phase transformation was observed in CoCrFeMnNi and 316H SS. In the thin foil regions of TEM samples, stacking-fault tetrahedra were observed in the HEAs. In the thick foil regions, interstitial dislocation loops were observed for all alloys, and the areal loop density increased linearly with foil thickness. The Al 0.3 CoCrFeNi had the largest loop size (the lowest density), followed by the CoCrFeMnNi and then the 316H SS. The higher loop nucleation rate in the 316H SS was attributed to carbon content. Finally, the degree of irradiation hardening was slightly lower for the HEAs than for the 316H SS, which is a promising sign for the nuclear application of HEAs at high temperatures.
This paper presents results from metal contact processing experiments towards the implementationof durable 500 deg.C high-frequency 4H-SiC bipolar junction transistors (BJTs). Specifically, p-type ohmic contacts have been demonstrated on a 0.25 μm-thick p-type homoepitaxial layer of doping 8 x 1018± 4 x 1018cm-3. Finally, preliminary current-voltage characteristics of fabricated BJTs are presented.
The purpose of this testing was to obtain total ionizing dose (TID) information about custom-built research prototype silicon carbide (SiC) junction field effect transistor (JFET) integrated circuits (ICs) capable of prolonged operation in extremely high-temperature (500 degrees Centigrade) environments. The circuits included ring oscillators and operational amplifiers as well as individual n-channel JFETs. This technology is being considered for use in high temperature, high pressure applications such as Long-Lives Surface System Explorer (LLISSE). These devices were developed at NASA Glenn Research Center (GRC). Testing occurred from July 9th-July 13th, 2018.
The NASA Glenn Research Center is developing very high temperature semiconductor integrated circuits (ICs) for use in the hot sections of aircraft engines and for Venus exploration where ambient temperatures are well above the approximately 300 degrees Centigrade effective limit of silicon-on-insulator IC technology. In order for beneficial technology insertion to occur, such transistor ICs must be capable of prolonged operation in such harsh environments. This paper reports on the fabrication and long-term 500 degrees Centigrade operation of 6H-SiC integrated circuits based on epitaxial 6H-SiC junction field effect transistors (JFETs). Simple analog amplifier and digital logic gate ICs have now demonstrated thousands of hours of continuous 500 degrees Centigrade operation in oxidizing air atmosphere with minimal changes in relevant electrical parameters. Electrical characterization and modeling of transistors and circuits at temperatures from 24 degrees Centigrade to 500 degrees Centigrade is also described. Desired analog and digital IC functionality spanning this temperature range was demonstrated without changing the input signals or power supply voltages.
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A wide range of high-value applications, including power generation and chemical manufacturing, involve harsh chemical conditions and extreme temperatures. In this work, we discuss the pairing of single crystal optical fiber with optically responsive, high-temperature stable perovskite oxide materials for monitoring of oxidizing and reduction gas streams up to 1000 °C. Optical sensing will be presented for hydrogen and oxygen monitoring in this temperature regime. Strategies will be discussed for improving stability and eliminating drift via multi-wavelength detection. The application of spatially resolved interrogation techniques, such as optical time domain reflectometry (OTDR) will be addressed for these sensors.
For crystal growth of semiconductor materials a short-term temperature stability of 0.1 C at 1500 C is one of the essential parameters to be addressed for achieving high-quality crystals. Hence, for temperature monitoring and control with high precision in a floating zone furnace two sets of thermo-sensors, type B thermocouples and optical fibre thermometers, have been implemented and successfully operated in the furnace for more than 2000 h. The optical fibre thermometers consist of an optical system made of sapphire (two fibres plus a prism in between for deflection) and transmit the infra-red radiation of the heater to the outside of the hot core of the furnace for pyrometric temperature measurement. A dedicated control algorithm has been set up which controlled the power settings to the individual heaters. Both sensor types showed no degradation after this period and yielded a short-term stability at 1200 C of 0.05 C (optical fibre thermometers), respectively 0.08 C (thermocouples).
Gold thick-film metallization and 96 alumina substrate based prototype packaging system developed for 500C SiC electronics and sensors is briefly reviewed, the needs of improvement are discussed. A high temperature co-fired alumina material system based packaging system composed of 32-pin chip-level package and printed circuit board is discussed for packaging 500C SiC electronics and sensors.