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At least 55 records · Page 3

NuGraph2 with context-aware inputs: physics-inspired improvements in semantic segmentation

Graph neural networks have recently shown strong promise for event reconstruction tasks in Liquid Argon Time Projection Chambers, yet their performance remains limited for underrepresented classes of particles, such as Michel electrons. In this work, we investigate physics-informed strategies to improve semantic segmentation within the NuGraph2 architecture. We explore three complementary approaches: (i) enriching the input representation with context-aware features derived from detector geometry and track continuity, (ii) introducing auxiliary decoders to capture class-level correlations, and (iii) incorporating energy-based regularization terms motivated by Michel electron energy distributions. Experiments on MicroBooNE public datasets show that physics-inspired feature augmentation yields the largest gains, particularly boosting Michel electron precision and recall by disentangling overlapping latent space regions. In contrast, auxiliary decoders and energy-regularization terms provided limited improvements, partly due to the hit-level nature of NuGraph2, which lacks explicit particle- or event-level representations. Our findings highlight that embedding physics context directly into node-level inputs is more effective than imposing task-specific auxiliary losses, and suggest that future hierarchical architectures such as NuGraph3, with explicit particle- and event-level reasoning, will provide a more natural setting for advanced decoders and physics-based regularization. The code for this work is publicly available on Github at https://github.com/vitorgrizzi/nugraph_phys/tree/main_phys.

Other Experiments

A system for the input and storage of data in the Besm-6 digital computer

Computer programs used for the decoding and storage of large volumes of data on the the BESM-6 computer are described. The following factors are discussed: the programming control language allows the programs to be run as part of a modular programming system used in data processing; data control is executed in a hierarchically built file on magnetic tape with sequential index storage; and the programs are not dependent on the structure of the data.

Schmidt, K.

Three-phase dc motor decoder

Circuit minimizes components required to provide six properly timed drive signals from three equal-interval sensor inputs.

Studer, P. A.

Error-Rate Bounds for Coded PPM on a Poisson Channel

Equations for computing tight bounds on error rates for coded pulse-position modulation (PPM) on a Poisson channel at high signal-to-noise ratio have been derived. These equations and elements of the underlying theory are expected to be especially useful in designing codes for PPM optical communication systems. The equations and the underlying theory apply, more specifically, to a case in which a) At the transmitter, a linear outer code is concatenated with an inner code that includes an accumulator and a bit-to-PPM-symbol mapping (see figure) [this concatenation is known in the art as "accumulate-PPM" (abbreviated "APPM")]; b) The transmitted signal propagates on a memoryless binary-input Poisson channel; and c) At the receiver, near-maximum-likelihood (ML) decoding is effected through an iterative process. Such a coding/modulation/decoding scheme is a variation on the concept of turbo codes, which have complex structures, such that an exact analytical expression for the performance of a particular code is intractable. However, techniques for accurately estimating the performances of turbo codes have been developed. The performance of a typical turbo code includes (1) a "waterfall" region consisting of a steep decrease of error rate with increasing signal-to-noise ratio (SNR) at low to moderate SNR, and (2) an "error floor" region with a less steep decrease of error rate with increasing SNR at moderate to high SNR. The techniques used heretofore for estimating performance in the waterfall region have differed from those used for estimating performance in the error-floor region. For coded PPM, prior to the present derivations, equations for accurate prediction of the performance of coded PPM at high SNR did not exist, so that it was necessary to resort to time-consuming simulations in order to make such predictions. The present derivation makes it unnecessary to perform such time-consuming simulations.

Moision, Bruce

Single phase dynamic CMOS PLA using charge sharing technique

A single phase dynamic CMOS NOR-NOR programmable logic array (PLA) using triggered decoders and charge sharing techniques for high speed and low power is presented. By using the triggered decoder technique, the ground switches are eliminated, thereby, making this new design much faster and lower power dissipation than conventional PLA's. By using the charge-sharing technique in a dynamic CMOS NOR structure, a cascading AND gate can be implemented. The proposed PLA's are presented with a delay-time of 15.95 and 18.05 nsec, respectively, which compare with a conventional single phase PLA with 35.5 nsec delay-time. For a typical example of PLA like the Signetics 82S100 with 16 inputs, 48 input minterms (m) and 8 output minterms (n), the 2-SOP PLA using the triggered 2-bit decoder is 2.23 times faster and has 2.1 times less power dissipation than the conventional PLA. These results are simulated using maximum drain current of 600 micro-A, gate length of 2.0 micron, V sub DD of 5 V, the capacitance of an input miniterm of 1600 fF, and the capacitance of an output minterm of 1500 fF.

Dhong, Y. B.

Maximum aposteriori joint source/channel coding

A maximum aposteriori probability (MAP) approach to joint source/channel coder design is presented in this paper. This method attempts to explore a technique for designing joint source/channel codes, rather than ways of distributing bits between source coders and channel coders. For a nonideal source coder, MAP arguments are used to design a decoder which takes advantage of redundancy in the source coder output to perform error correction. Once the decoder is obtained, it is analyzed with the purpose of obtaining 'desirable properties' of the channel input sequence for improving overall system performance. Finally, an encoder design which incorporates these properties is proposed.

Sayood, Khalid

A high-speed lossless data compression system for space applications

This paper reports on the integration of a lossless data compression/decompression chipset into a space data system architecture. For its compression engine, the data system incorporates the Universal Source Encoder (USE) designed for the NASA/Goddard Space Flight Center. Currently, the data compression testbed generates video frames consisting of 512 lines of 512 pixels having 8-bit resolution. Each image is passed through the USE where the lines are internally partitioned into 16-word blocks. These blocks are adaptively encoded across widely varying entropy levels using a Rice 12-option set coding algorithm. The current system operates at an Input/Output rate of 10 Msamples/s or 80 Mbits/s for each buffered input line. Frame and line synchronization for each image are maintained through the use of uniquely decodable command words. Length information of each variable length compressed image line is also included in the output stream. The data and command information are passed to the next stage of the system architecture through a serial fiber-optic transmitter. The initial segment of this stage consists of packetizer hardware which adds an appropriate CCSDS header to the received source data. An uncompressed mode is optionally available to pass image lines directly to the packetizer hardware. A data decompression testbed has also been developed to confirm the data compression operation.

Miko, Joe

Airoscope command system

A PCM telemetry command system is presented having a capacity of 256 unique commands, an end-to-end actuation time of less than 250 milliseconds, and an address plus complementary command code to provide security against the acceptance of anything but intended commands. The system consists of a ground-based encoder and a balloon-borne decoder, both built using low-current drain, high reliability CMOS logic elements. Commands are normally issued by a simple switch closure to +5VDC on the appropriate input line, however as a backup mode, the 8-bit command may be entered manually on 8 toggle switches and executed via a SEND button. In any case, the command is then serialized into a PCM bit stream and sent via a P-Band radio link to the DECODER aloft. All 256 outputs from the DECODER are buffered through drivers and thus may be used to drive CMOS, TTL, or DTL logic.

Barrows, W.

Big Viterbi Decoder (BVD) results for (7,1/2) convolutional code

The Big Viterbi Decoder (BVD), capable of decoding convolutional codes with constraint lengths of up to 15, is under development for the Deep Space Network (DSN). As part of the development, a commercial single-chip (7,1/2) Viterbi decoder is used to enable early start of system integration. Tests of the integrated partial system (including simulator, input systems, output interfaces, and computer controls) were recently completed at the DSN Compatibility Test Area (CTA-21) at JPL. The system elements used for the demonstration and test results are described.

Statman, J.

Constant Overhead Entanglement Distillation via Scrambling

High-fidelity quantum entanglement enables key quantum networking capabilities such as secure communication and distributed quantum computing, but long-distance entanglement distribution is limited by noise and loss. Entanglement distillation protocols address this problem by extracting high-fidelity Bell pairs from multiple noisy ones. The primary objective is minimizing the resource overhead: the number of noisy input pairs needed to distill each high-fidelity output pair. While protocols achieving optimal overhead are known in theory, they often require complex decoding operations that make practical implementation challenging. We circumvent this challenge by introducing protocols that use quantum scrambling—the spreading of quantum information under chaotic dynamics—through random Clifford operations. Based on this scrambling mechanism, our protocol maintains asymptotically constant overhead, independent of the desired output error rate $\bar{𝜖}$ , and can be implemented with shallow quantum circuits of depth 𝑂⁡(poly log log⁡ $\bar{𝜖}$ −1 ) and memory 𝑂⁡(poly log⁡ $\bar{𝜖}$ −1 ). Our protocol remains effective even with noisy quantum gates. By incorporating error correction, our protocol achieves state-of-the-art performance: starting with pairs of 10% initial infidelity, we require only seven noisy inputs per output pair to distill a single Bell pair with infidelity $\bar{𝜖}$ =10 −12 , substantially outperforming existing schemes. We demonstrate the utility of our protocols for quantum repeater networks.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC

Low-overhead transversal fault tolerance for universal quantum computation

Fast, reliable logical operations are essential for realizing useful quantum computers. By redundantly encoding logical qubits into many physical qubits and using syndrome measurements to detect and correct errors, we can achieve low logical error rates. However, for many practical quantum error correction codes such as the surface code, owing to syndrome measurement errors, standard constructions require multiple extraction rounds—of the order of the code distance d—for fault-tolerant computation, particularly considering fault-tolerant state preparation. Here we show that logical operations can be performed fault-tolerantly with only a constant number of extraction rounds for a broad class of quantum error correction codes, including the surface code with magic state inputs and feedforward, to achieve ‘transversal algorithmic fault tolerance’. Through the combination of transversal operations7 and new strategies for correlated decoding, despite only having access to partial syndrome information, we prove that the deviation from the ideal logical measurement distribution can be made exponentially small in the distance, even if the instantaneous quantum state cannot be made close to a logical codeword because of measurement errors. We supplement this proof with circuit-level simulations in a range of relevant settings, demonstrating the fault tolerance and competitive performance of our approach. Furthermore, our work sheds new light on the theory of quantum fault tolerance and has the potential to reduce the space–time cost of practical fault-tolerant quantum computation by over an order of magnitude.

Zhou, Hengyun [QuEra Computing, Boston, MA (United

Node synchronization schemes for the Big Viterbi Decoder

The Big Viterbi Decoder (BVD), currently under development for the DSN, includes three separate algorithms to acquire and maintain node and frame synchronization. The first measures the number of decoded bits between two consecutive renormalization operations (renorm rate), the second detects the presence of the frame marker in the decoded bit stream (bit correlation), while the third searches for an encoded version of the frame marker in the encoded input stream (symbol correlation). A detailed account of the operation is given, as well as performance comparison, of the three methods.

Cheung, K.-M.

A programmable microcomputer for real time speech processing

The implementation of a programmable microprocessor for real time speech processing is described. The design of a fast special-purpose computer operating at 150 nsec per instruction time reduces the problem of speech encoding and decoding to a software problem. Each instruction is a twelve-bit word, and the information conveyed by a word is explained. The microprocessor is controlled by two clocks - the A/D clock, or input sampling clock, which loads the digital input into the input register and presets the counter to a value set by the external switches; and the instruction clock, or system clock, which operates at 6 MHz. At this system clock rate and a sampling clock rate of 30 KHz, 200 instructions can be executed between samples, and for many speech encoding and decoding algorithms, 200 instructions are more than enough. The microcomputer is being used to test various delta modulator encoding algorithms.

Apelewicz, T.

PDF DECODER ANALYSIS CODE

SF-24-038"PDFdecoder", as a new application to explore parametrizations of parton distribution functions (PDFs) of the proton or other hadrons. The PDFs are fundamental quantities in particle physics which are necessary inputs to precise theoretical predictions for experiments at the Large Hadron Collider (LHC) and other facilities. As such, understanding how the PDFs are parametrized and associated uncertainties is a pressing need. The specific problem PDFdecoder confronts is the need of having a tractable and interpretably machine-learning (ML) framework to parametrize the PDFs and their uncertainties so as to understand how a given preferred parametrization is obtained. This problem has not been significantly addressed in the current literature. While other groups have used ML-based approaches to parametrize PDFs in the form of feed-forward neural networks, the question of tractability has not been explored in a PDF context. Our solution makes significant progress in this problem by using an array of encoder-decoder (essentially, autoencoder) architectures with varying constraints to the intermediate latent spaces based on interpretable physics. As a consequence, the trained models can be used as generative networks to produce interpretable predictions for the PDFs in a way that can be refined and studied further.

Hobbs, Timothy

Bandwidth efficient trellis-coded modulation with prescribed decoding delay - new interpretations and results

Motivated by previous work of Li and Rimoldi for obtaining bandwidth efficient TCM signals with finite decoding delay, we present an alternative representation for their encoder/signal mapper transmitter structure which merely consists of a single filter having an input equal to the equivalent of the inoput data bits in their implementation.

trellis coding bandwidth efficient modulation digi