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At least 55 records · Page 3

Magnetic Switching in Monolayer 2D Diluted Magnetic Semiconductors via Spin‐to‐Spin Conversion

Abstract The integration of 2D van der Waals (vdW) magnets with topological insulators or heavy metals holds great potential for realizing next‐generation spintronic memory devices. However, achieving high‐efficiency spin–orbit torque (SOT) switching of monolayer vdW magnets at room temperature poses a significant challenge, particularly without an external magnetic field. Here, it is shown field‐free, deterministic, and nonvolatile SOT switching of perpendicular magnetization in the monolayer, diluted magnetic semiconductor (DMS), Fe‐doped MoS 2 (Fe:MoS 2 ) at up to 380 K with a current density of ≈7 × 10 4 A cm −2 . The in situ doping of Fe into monolayer MoS 2 via chemical vapor deposition and the geometry‐induced strain in the crystal break the rotational switching symmetry in Fe:MoS 2 , promoting field‐free SOT switching by generating out‐of‐plane spins via spin‐to‐spin conversion. An apparent anomalous Hall effect (AHE) loop shift at a zero in‐plane magnetic field verifies the existence of z spins in Fe:MoS 2 , inducing an antidamping‐like torque that facilitates field‐free SOT switching. This field‐free SOT application using a 2D ferromagnetic monolayer provides a new pathway for developing highly power‐efficient spintronic memory devices.

Chen, Siwei [Department of Mechanical Engineering ↗

Persistent Memory Object Storage and Indexing for Scientific Computing

This paper presents Mosiqs, a persistent memory object storage framework with metadata indexing and querying for scientific computing. We design Mosiqs based on the key idea that memory objects on shared PM pool can live beyond the application lifetime and can become the sharing currency for applications and scientists. Mosiqs provides an aggregate memory pool atop an array of persistent memory devices to store and access memory objects. Mosiqs uses a lightweight persistent memory key-value store to manage the metadata of memory objects such as persistent pointer mappings, which enables memory object sharing for effective scientific collaborations. Mosiqs is implemented atop PMDK. We evaluate the proposed approach on many-core server with an array of real PM devices. The preliminary evaluation confirms a 100% improvement for write and 30% in read performance against a PM-aware file system approach.

Khan, Awais↗

MOSIQS: Persistent Memory Object Storage With Metadata Indexing and Querying for Scientific Computing

Scientific applications often require high-bandwidth shared storage to perform joint simulations and collaborative data analytics. Shared memory pools provide a chance to satisfy such needs. Recently, a high-speed network such as Gen-Z utilizing persistent memory (PM) offers an opportunity to create a shared memory pool connected to compute nodes. However, there are several challenges to use scientific applications on the shared memory pool directly such as scalability, failure-atomicity, and lack of scientific metadata-based search and query. In this paper, we propose MOSIQS, a persistent memory object storage framework with metadata indexing and querying for scientific computing. We design MOSIQS based on the key idea that memory objects on PM pool can live beyond the application lifetime and can become the sharing currency for applications and scientists. MOSIQS provides an aggregate memory pool atop an array of persistent memory devices to store and access memory objects to accelerate scientific computing. MOSIQS uses a lightweight persistent memory key-value store to manage the metadata of memory objects, which enables memory object sharing. To facilitate metadata search and query over millions of memory objects resident on memory pool, we introduce Group Split and Merge (GSM), a novel persistent index data structure designed primarily for scientific datasets. GSM splits and merges dynamically to minimize the query search space and maintains low query processing time while overcoming the index storage overhead. MOSIQS is implemented on top of PMDK. We evaluate the proposed approach on many-core server with an array of real PM devices. Experimental results show that MOSIQS gains a 100% write performance improvement and executes multi-attribute queries efficiently with 2.7× less index storage overhead offering significant potential to speed up scientific computing applications.

97 MATHEMATICS AND COMPUTING↗

Logic in Memory Emulator

Logic in Memory Emulator (LiME) is a hardware/software tool specially designed for memory system evaluation and experiment. Emerging memories display a wide range of bandwidths, latencies, and capacities, making it challenging for the computer architect to navigate the design space of potential memory configurations, and for the application developer to assess performance implications of using such memories. With the LiME framework, architectural ideas can be prototyped in great detail yet with sufficient performance to support realistic evaluation on long running applications. LiME consists of two fundamental components: 1) the hardware and OS infrastructure for the emulator, and 2) a suite of benchmark applications to assist in characterizing the performance of current and future computer architectures. Some of the applications have been collected from other open source projects. Uses: Logging, replay and analysis of an application's memory behavior Evaluate impact of emerging memory technology on application performance. Emulate complex memory interactions in whole applications orders of magnitude faster than software simulation. Emulate acceleration hardware co-located with the memory subsystem. Features: Capture and log external memory accesses to a separate off-chip memory device without affecting application execution. Memory traces include the address, length, timestamp, and optionally the data for each transaction. Captured trace data can be saved to an SD card for off-line analysis. Configure a wide range of memory latencies in sub-nanosecond increments that encompass highbandwidth and storage class memories. Specify regions of interest (ROI) in applications to reduce the amount of trace data captured for analysis. Currently supports execution on Xilinx Zynq SoC which integrates an ARM processor with FPGA logic on a single device. Applications can be run under Linux or in bare metal mode on the ARM cores.

Jain, AbhishekK↗

Asymmetric Electrode Work Function Customization via Top Electrode Replacement in Ferroelectric and Field–Induced Ferroelectric Hafnium Zirconium Oxide Thin Films

Non-volatile memory device structures such as ferroelectric random-access memory and ferroelectric tunnel junctions employ switchable spontaneous polarization to hold binary states. These devices can potentially benefit from the imposition of spontaneous internal biases and their resulting effect on the polarization properties of the ferroelectric (or field-induced ferroelectric/ antiferroelectric) layer. While HfO 2 -based thin films are ideal candidates for implementation into these devices due to their scalability and silicon compatibility, the phase purity of these oxides is sensitive to the selection of electrode material, preventing incorporation of asymmetric electrode layers into such structures. Within this work, electrode replacement following post-metallization anneal processing is introduced as a route to achieve ferroelectric and field-induced ferroelectric Hf x Zr 1–x O 2 (HZO) thin films with electrode-independent phase constitutions. The effects of this process and the corresponding internal biases imposed across the HZO layers due to asymmetric work functions are investigated. It is shown that internal biases vary in magnitude in accordance with prediction based on the work functions of the replaced electrode layers and affect remanent polarization magnitudes. Accordingly, electrode replacement presents a processing route that can readily produce HZO films with spontaneous internal biases and electrode- independent phase constitutions, facilitating implementation of these ferroelectrics into the next generation device structures.

36 MATERIALS SCIENCE↗

IRIS: A Performance-Portable Framework for Cross-Platform Heterogeneous Computing

From edge to exascale, computer architectures are becoming more heterogeneous and complex. The systems typically have fat nodes, with multicore CPUs and multiple hardware accelerators such as GPUs, FPGAs, and DSPs. This complexity is causing a crisis in programming systems and performance portability. Several programming systems are working to address these challenges, but the increasing architectural diversity is forcing software stacks and applications to be specialized for each architecture. As we show, all of these approaches critically depend on their software framework for discovery, execution, scheduling, and data orchestration. To address this challenge, we believe that a more agile and proactive software framework is essential to increase performance portability and improve user productivity. To this end, we have designed and implemented IRIS: a performance-portable framework for cross-platform heterogeneous computing. IRIS can discover available resources, manage multiple diverse programming platforms (e.g., CUDA, Hexagon, HIP, Level Zero, OpenCL, OpenMP) simultaneously in the same execution, respect data dependencies, orchestrate data movement proactively, and provide for user-configurable scheduling. To simplify data movement, IRIS introduces a shared virtual device memory with relaxed consistency among different heterogeneous devices. IRIS also adds an automatic kernel workload partitioning technique using the polyhedral model so that it can resize kernels for a wide range of devices. Our evaluation on three architectures, ranging from Qualcomm Snapdragon to a Summit supercomputer node, shows that IRIS improves portability across a wide range of diverse heterogeneous architectures with negligible overhead.

97 MATHEMATICS AND COMPUTING↗

Data migration schedule prediction using machine learning

Various embodiments provide for one or more processor instructions and memory instructions that enable a memory sub-system to predict a schedule for migrating data between memory devices, which can be part of a memory sub-system.

Roberts, David Andrew↗

Influence of surface adsorption on MoS 2 memtransistor switching kinetics

Sulfur-deficient polycrystalline two-dimensional (2D) molybdenum disulfide (MoS 2 ) memtransistors exhibit gate-tunable memristive switching to implement emerging memory operations and neuromorphic computing paradigms. Grain boundaries and sulfur vacancies are critical for memristive switching; however, the underlying physical mechanisms are not fully understood. Furthermore, the adsorption of water and gaseous species strongly perturbs electronic transport in monolayer MoS 2 , and little work has been done to explore the influence of surface interactions on defect-related kinetics that produces memristive switching. Here, we study the switching kinetics of back-gated MoS 2 memtransistors using current transient measurements in a controlled atmosphere chamber. Here, we observe that adsorbed water molecules lead to suppression of the electronic trap-filling processes concomitant with the resistive switching process, resulting in altered kinetics of the resistive switching. Additionally, using the transient response from “bunched” drain voltage pulse trains performed as a function of temperature, we extract the energy of the affected trap state and find that it places the trap roughly midgap [E T = E C – 0.7 (±0.4) eV]. Our results highlight the importance of controlling for surface interactions that may affect switching kinetics in 2D memtransistors, synaptic transistors, and related memory devices.

36 MATERIALS SCIENCE↗

Impact of Random Spatial Fluctuation in Non-Uniform Crystalline Phases on the Device Variation of Ferroelectric FET

In this work, a comprehensive study of random spatial fluctuation of the ferroelectric (FE) phase and dielectric (DE) phase in FeFETs is conducted to understand its impact on device variation. It is found that: i) there exists a certain DE percentage threshold that below which the increase of the DE phase does not significantly impact the device memory window and variation and only above which evident device degradation can be observed; ii) increasing the DE phase increases the variation in the memory window and the coercive field distribution further exacerbates the variation, hence degrading the sensing margin; iii) decreasing the number of grains degrades the device variation, which calls for further grain size engineering for variation suppression.

42 ENGINEERING↗

Characterization of fluorite-structured ferroelectrics using transmission electron microscopy: Techniques, challenges, and recent advances

Fluorite-structured ferroelectrics, such as hafnium oxide and its alloyed variants, are key candidates for next-generation memory devices. Yet, fundamental questions about switching mechanisms, domain dynamics, and phase evolution remain open. Transmission electron microscopy (TEM) provides unique capabilities to address these challenges by simultaneously resolving the positions of anions and cations, chemical variations, and structural transformations. Recent advances—including in situ heating, electron beam-induced switching, electron energy loss spectroscopy, and differential phase contrast imaging—have revealed critical insights into phase transitions, potential switching pathways, and oxygen vacancy behavior. However, experimental barriers such as TEM sample-preparation-induced artifacts, high coercive fields, and imaging constraints persist, especially for polycrystalline films. By offering a focused overview of current TEM developments in fluorite ferroelectrics, this work outlines how TEM contributes to understanding key phenomena and proposes a roadmap for future studies.

36 MATERIALS SCIENCE↗

A broad-host-range event detector: expanding and quantifying performance between Escherichia coli and Pseudomonas species

Modern microbial biodesign relies on the principle that well-characterized genetic parts can be reused and reconfigured for different functions. However, this paradigm has only been successful in a limited set of hosts, mostly comprised from common lab strains of Escherichia coli . It is clear that new applications such as chemical sensing and event logging in complex environments will benefit from new host chassis. This study quantitatively compared how the same chemical event logger performed across four strains and three different microbial species. An integrase-based sensor and memory device was operated by two representative soil Pseudomonads— Pseudomonas fluorescens SBW25 and Pseudomonas putida DSM 291. Quantitative comparisons were made between these two non-traditional hosts and two benchmark E. coli chassis including the probiotic Nissle 1917 and common cloning strain DH5α. The performance of sensor and memory components changed according to each host, such that a clear chassis effect was observed and quantified. These results were obtained via fluorescence from reporter proteins that were transcriptionally fused to the integrase and downstream recombinant region and via data-driven kinetic models. The Pseudomonads proved to be acceptable chassis for the operation of this event logger, which outperformed the common E. coli DH5α in many ways. This study advances an emerging frontier in synthetic biology that aims to build broad-host-range devices and understand the context by which different species can execute programmable genetic operations.

59 BASIC BIOLOGICAL SCIENCES↗

Device Feasibility Analysis of Multi-level FeFETs for Neuromorphic Computing

As an emerging non-volatile memory device technology, Ferroelectric Field-Effect Transistors (FeFETs) can enable low-power, adaptive intelligent system design. However, device dimension and operating voltage dependent reliability issues of scaled FeFETs can ultimately lead to degraded performance in solving machine learning tasks. In this article, detailed experimental characterization of FeFET devices of different dimensions have been carried out to explicitly evaluate the non-ideal behavior in device conductance programming properties like number of programming states, cycle-to-cycle (C2C) variations, device-to-device (D2D) variations, and state retention. A hardware-aware software simulation approach has been adopted to capture the adversarial effects of the non-idealities on recognition accuracy through algorithm-level performance assessment by including them in NeuroSim, a popular neural network hardware simulator, to execute a neural network model considering all other hardware constraints. With the added non-idealities, significant accuracy degradation has been observed compared to the ideal scenarios where D2D variations play the most critical role. Thereafter, feasibility of a variation-aware training method has been evaluated to tackle the accuracy drop.

42 ENGINEERING↗

Systems and methods for enhanced power system model validation

A system for enhanced power system model validation is provided. The system includes a computing device including at least one processor in communication with at least one memory device. The at least one processor is programmed to store a plurality of models for a plurality of devices and a plurality of input files associated with the plurality of models, receive, from a user, a selection of model of the plurality of models to simulate, retrieve one or more input files of the plurality of input files, perform a model validity check on the selected model, if the selected model passed the model validity check, perform a model calibration on the selected model, and if the selected model passed the model calibration, perform a post evaluation on the selected model.

Wang, Honggang↗

LC-MEMENTO: A Memory Model for Accelerated Architectures

With the advent of heterogeneous architectures, in particular, with the ubiquity of multi-GPU systems, it is becoming increasingly important to manage device memory efficiently in order to reap the benefits of the additional core count. To date, such responsibility mainly falls on the programmer where device-to-host data communication (and vice versa), if not done properly, may incur costly memory transfer operations and synchronization. The problem may be compounded by additional requirement to maintain system-wide memory consistency that may involve expensive synchronization overhead. In this paper, we present Location Consistency Memory Model for Enhanced Transfer Operations (LC-MEMENTO). This framework considers incorporating runtime techniques for multi-GPU memory management to support relaxed synchronization semantics and memory transfer operations automatically. Specifically, we implement a relaxed form of a memory consistency model based on the Location Consistency (LC) in an Asynchronous Many-Task Runtime (ARTS) and demonstrate that, this memory model enables additional optimization opportunities for the three representative applications encompassing different computational patterns (scientific computation, graphs, data streaming, etc.).

Memory Models, Accelerators, Adaptive Optimization↗

Magnetic force microscopy revealing long-range room temperature stable molecule bridge-induced magnetic ordering on magnetic tunnel junction (MTJ) pillars

Magnetic tunnel junctions (MTJs) can integrate novel single molecular device elements to overcome long-standing fabrication challenges, thus unlocking their novel potential. This study employs magnetic force microscopy (MFM) to demonstrate that organometallic molecules, when placed between two ferromagnetic electrodes along cross-junction shaped MTJ edges, dramatically altered the magnetic properties of the electrodes, affecting areas several hundred microns in size around the molecular junction vicinity at room temperature. These findings are supported by magnetic resonance and magnetometer studies on ∼7000 MTJ pillars. MFM on the pillar sample showed an almost complete disappearance of the magnetic contrast. The spatial magnetic image suggests that molecular channels significantly impacted the spin density of states in the ferromagnetic electrodes. This advancement in MTJ-based molecular devices paves the way for a new generation of commercially viable logic and memory devices controlled by molecular quantum states at near-room temperatures.

Tyagi, Pawan (ORCID:0000000275411344)↗

Magnon confinement in epitaxial antiferromagnetic oxide heterostructures.

Magnons, the quanta of spin waves, have been extensively studied in a range of materials for spintronics, particularly for non-volatile logic-in-memory devices. Controlling magnons in conventional antiferromagnets and harnessing them in practical applications, however, remains a challenge. Here, we demonstrate highly efficient magnon transport in a LaFeO3/ BiFeO3/ LaFeO3 all-antiferromagnetic system, which can be controlled electrically, making it highly desirable for energy-efficient computation. Leveraging spin-orbit-driven spin-charge transduction, we demonstrate that this material architecture permits magnon confinement in ultrathin antiferromagnets, enhancing the output voltage generated by magnon transport by several orders of magnitude, which provides a pathway to enable magnetoelectric memory and logic functionalities. Additionally, the non-volatility of output voltage enables ultralowpower logic-in-memory processing, where magnonic devices can be efficiently reconfigured via electrically controlled magnon spin currents within magnetoelectric channels.

Husain, Sajid↗

Interactions Enhance Ramp Reversal Memory in Locally Phase Separated Materials

The ramp-reversal memory (RRM) effect in metal–insulator transition metal oxides (TMOs), a non-volatile resistance change induced by repeated temperature cycling, has attracted considerable interest in neuromorphic computing and non-volatile memory devices. Our previous defect motion model successfully explained RRM in vanadium dioxide (VO 2 ), capturing observed critical temperature shifts and memory accumulation throughout the sample. However, this approach lacked interactions between metallic and insulating domains. Here, we extend our model by combining a correlated Random Field Ising Model with defect diffusion-segregation, enabling accurate hysteresis modeling while predicting the relationship between RRM and domain interactions. Our simulations demonstrate that the maximum RRM occurs when the turnaround temperature approaches the inflection point. This peak in RRM vs. turnaround temperature is consistent with prior transport measurements, as well as our own optical measurements reported here. Significantly, we find that increasing nearest-neighbor interactions enhances the maximum memory effect, thus providing a clear mechanism for optimizing RRM performance. Since our model employs minimal assumptions, we predict that RRM should be a widespread phenomenon in materials exhibiting patterned phase coexistence of electronic domains. This work not only advances fundamental understanding of memory behavior in TMOs but also establishes a much-needed theoretical framework for optimizing device applications.

36 MATERIALS SCIENCE↗

Nonvolatile electrochemical memory at 600°C enabled by composition phase separation

Silicon-based microelectronics are limited to ~150°C and therefore not suitable for the extremely high temperatures in aerospace, energy, and space applications. While wide-band-gap semiconductors can provide high-temperature logic, nonvolatile memory devices at high temperatures have been challenging. In this work, we develop a nonvolatile electrochemical memory cell that stores and retains analog and digital information at temperatures as high as 600°C. Through correlative scanning transmission electron microscopy, we show that this high-temperature information retention is a result of composition phase separation between the oxidized and reduced forms of amorphous tantalum oxide. This result demonstrates a memory concept that is resilient at extreme temperatures and reveals phase separation as the principal mechanism that enables nonvolatile information storage in these electrochemical memory cells.

42 ENGINEERING↗