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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 55 records · Page 3
All sourcesNASA NTRSDOE OSTI
NASA NTRS2009

Nanoscale content-addressable memory

A combined content addressable memory device and memory interface is provided. The combined device and interface includes one or more one molecular wire crossbar memories having spaced-apart key nanowires, spaced-apart value nanowires adjacent to the key nanowires, and configurable switches between the key nanowires and the value nanowires. The combination further includes a key microwire-nanowire grid (key MNG) electrically connected to the spaced-apart key nanowires, and a value microwire-nanowire grid (value MNG) electrically connected to the spaced-apart value nanowires. A key or value MNGs selects multiple nanowires for a given key or value.

Davis, Bryan↗
NASA NTRS2009

Satellite Test of Radiation Impact on Ramtron 512K FRAM

The Memory Test Experiment is a space test of a ferroelectric memory device on a low Earth orbit satellite. The test consists of writing and reading data with a ferroelectric based memory device. Any errors are detected and are stored on board the satellite. The data is send to the ground through telemetry once a day. Analysis of the data can determine the kind of error that was found and will lead to a better understanding of the effects of space radiation on memory systems. The test will be one of the first flight demonstrations of ferroelectric memory in a near polar orbit which allows testing in a varied radiation environment. The memory devices being tested is a Ramtron Inc. 512K memory device. This paper details the goals and purpose of this experiment as well as the development process. The process for analyzing the data to gain the maximum understanding of the performance of the ferroelectric memory device is detailed.

MacLeod, Todd C.↗
NASA NTRS1987

Rotary stepping device with memory metal actuator

A rotary stepping device includes a rotatable shaft which is driven by means of a coiled spring clutch which is alternately tightened to grip and rotate the shaft and released to return it to a resting position. An actuator formed of a memory metal is used to pull the spring clutch to tighten it and rotate the shaft. The actuator is activated by heating it above its critical temperature and is returned to an elongated configuration by means of the force of the spring cloth.

Jamieson, Robert S.↗
NASA NTRS2010

Systems, methods, and products for graphically illustrating and controlling a droplet actuator

Systems for controlling a droplet microactuator are provided. According to one embodiment, a system is provided and includes a controller, a droplet microactuator electronically coupled to the controller, and a display device displaying a user interface electronically coupled to the controller, wherein the system is programmed and configured to permit a user to effect a droplet manipulation by interacting with the user interface. According to another embodiment, a system is provided and includes a processor, a display device electronically coupled to the processor, and software loaded and/or stored in a storage device electronically coupled to the controller, a memory device electronically coupled to the controller, and/or the controller and programmed to display an interactive map of a droplet microactuator. According to yet another embodiment, a system is provided and includes a controller, a droplet microactuator electronically coupled to the controller, a display device displaying a user interface electronically coupled to the controller, and software for executing a protocol loaded and/or stored in a storage device electronically coupled to the controller, a memory device electronically coupled to the controller, and/or the controller.

Paik, Philip Y.↗
NASA NTRS2007

Ion-Conducting Organic/Inorganic Polymers

Ion-conducting polymers that are hybrids of organic and inorganic moieties and that are suitable for forming into solid-electrolyte membranes have been invented in an effort to improve upon the polymeric materials that have been used previously for such membranes. Examples of the prior materials include perfluorosulfonic acid-based formulations, polybenzimidazoles, sulfonated polyetherketone, sulfonated naphthalenic polyimides, and polyethylene oxide (PEO)-based formulations. Relative to the prior materials, the polymers of the present invention offer greater dimensional stability, greater ease of formation into mechanically resilient films, and acceptably high ionic conductivities over wider temperature ranges. Devices in which films made of these ion-conducting organic/inorganic polymers could be used include fuel cells, lithium batteries, chemical sensors, electrochemical capacitors, electrochromic windows and display devices, and analog memory devices. The synthesis of a polymer of this type (see Figure 1) starts with a reaction between an epoxide-functionalized alkoxysilane and a diamine. The product of this reaction is polymerized by hydrolysis and condensation of the alkoxysilane group, producing a molecular network that contains both organic and inorganic (silica) links. The silica in the network contributes to the ionic conductivity and to the desired thermal and mechanical properties. Examples of other diamines that have been used in the reaction sequence of Figure 1 are shown in Figure 2. One can use any of these diamines or any combination of them in proportions chosen to impart desired properties to the finished product. Alternatively or in addition, one could similarly vary the functionality of the alkoxysilane to obtain desired properties. The variety of available alkoxysilanes and diamines thus affords flexibility to optimize the organic/inorganic polymer for a given application.

Kinder, James D.↗
NASA NTRS1992

Enhanced fatigue and retention in ferroelectric thin film memory capacitors by post-top electrode anneal treatment

Thin film ferroelectric capacitors comprising a ferroelectric film sandwiched between electrodes for nonvolatile memory operations are rendered more stable by subjecting the capacitors to an anneal following deposition of the top electrode. The anneal is done so as to form the interface between the ferroelectric film and the top electrode. Heating in an air oven, laser annealing, or electron bombardment may be used to form the interface. Heating in an air oven is done at a temperature at least equal to the crystallization temperature of the ferroelectric film. Where the ferroelectric film comprises lead zirconate titanate, annealing is done at about 550 to 600 C for about 10 to 15 minutes. The formation treatment reduces the magnitude of charge associated with the nonswitching pulse in the thin film ferroelectric capacitors. Reduction of this charge leads to significantly more stable nonvolatile memory operations in both digital and analog memory devices. The formation treatment also reduces the ratio of change of the charge associated with the nonswitching pulse as a function of retention time. These improved memory devices exhibit greater performance in retention and reduced fatigue in memory arrays.

Thakoor, Sarita↗
NASA NTRS1994

Enhanced fatigue and retention in ferroelectric thin film memory capacitors by post-top electrode anneal treatment

Thin film ferroelectric capacitors (10) comprising a ferroelectric film (18) sandwiched between electrodes (16 and 20) for nonvolatile memory operations are rendered more stable by subjecting the capacitors to an anneal following deposition of the top electrode (20). The anneal is done so as to form the interface (22) between the ferroelectric film and the top electrode. Heating in an air oven, laser annealing, or electron bombardment may be used to form the interface. Heating in an air oven is done at a temperature at least equal to the crystallization temperature of the ferroelectric film. Where the ferroelectric film comprises lead zirconate titanate, annealing is done at about 550.degree. to 600.degree. C. for about 10 to 15 minutes. The formation treatment reduces the magnitude of charge associated with the non-switching pulse in the thin film ferroelectric capacitors. Reduction of this charge leads to significantly more stable nonvolatile memory operations in both digital and analog memory devices. The formation treatment also reduces the ratio of change of the charge associated with the non-switching pulse as a function of retention time. These improved memory devices exhibit greater performance in retention and reduced fatigue in memory arrays.

Thakoor, Sarita↗
NASA NTRS1991

Ferroelectric Memory Capacitors For Neural Networks

Thin-film ferroelectric capacitors proposed as nonvolatile analog memory devices. Intended primarily for use as synaptic connections in electronic neural networks. Connection strengths (synaptic weights) stored as nonlinear remanent polarizations of ferroelectric films. Ferroelectric memory and interrogation capacitors combined into memory devices in vertical or lateral configurations. Photoconductive layer modulated by light provides variable resistance to alter bias signal applied to memory capacitor. Features include nondestructive readout, simplicity, and resistance to ionizing radiation. Interrogated without destroying stored analog data. Also amenable to very-large-scale integration. Allows use of ac coupling, eliminating errors caused by dc offsets in amplifier circuits of neural networks.

Thakoor, Sarita↗
NASA NTRS1986

Fast Initialization of Bubble-Memory Systems

Improved scheme several orders of magnitude faster than normal initialization scheme. State-of-the-art commercial bubble-memory device used. Hardware interface designed connects controlling microprocessor to bubblememory circuitry. System software written to exercise various functions of bubble-memory system in comparison made between normal and fast techniques. Future implementations of approach utilize E2PROM (electrically-erasable programable read-only memory) to provide greater system flexibility. Fastinitialization technique applicable to all bubble-memory devices.

Looney, K. T.↗
NASA NTRS2012

Development of Next Generation Memory Test Experiment for Deployment on a Small Satellite

The original Memory Test Experiment successfully flew on the FASTSAT satellite launched in November 2010. It contained a single Ramtron 512K ferroelectric memory. The memory device went through many thousands of read/write cycles and recorded any errors that were encountered. The original mission length was schedule to last 6 months but was extended to 18 months. New opportunities exist to launch a similar satellite and considerations for a new memory test experiment should be examined. The original experiment had to be designed and integrated in less than two months, so the experiment was a simple design using readily available parts. The follow-on experiment needs to be more sophisticated and encompass more technologies. This paper lays out the considerations for the design and development of this follow-on flight memory experiment. It also details the results from the original Memory Test Experiment that flew on board FASTSAT. Some of the design considerations for the new experiment include the number and type of memory devices to be used, the kinds of tests that will be performed, other data needed to analyze the results, and best use of limited resources on a small satellite. The memory technologies that are considered are FRAM, FLASH, SONOS, Resistive Memory, Phase Change Memory, Nano-wire Memory, Magneto-resistive Memory, Standard DRAM, and Standard SRAM. The kinds of tests that could be performed are read/write operations, non-volatile memory retention, write cycle endurance, power measurements, and testing Error Detection and Correction schemes. Other data that may help analyze the results are GPS location of recorded errors, time stamp of all data recorded, radiation measurements, temperature, and other activities being perform by the satellite. The resources of power, volume, mass, temperature, processing power, and telemetry bandwidth are extremely limited on a small satellite. Design considerations must be made to allow the experiment to not interfere with the satellite s primary mission.

MacLeod, Todd↗
NASA NTRS1987

Rare-earth substitution in (BiYCa)3(FeSiGe)5O12 bubble films

The substitution of Y by Sm, Tb, Gd, and Ho in (BiYCa)3 FeSiGe)5O12 bubble garnet is shown to have large effects on the growth-induced anisotropy (GIA). The presently accepted film composition intended for 6-or 8-micron-period bubble memory devices demands partial substitution of Y by Gd and Ho. However, comparing films grown under the same growth conditions, it is observed that YGdHoBilG films posess less (GIA) than their Gd, Ho-free counterparts. Thus, to satisfy (GIA) requirements, the supercooling during growth must be increased by 20 K to 80 K with undesirable effects on defect densities. A new film composition containing Sm, Tb, and Gd has been formulated to satisfy all known material property specifications for 6- or 8-micron-period memory devices. It can be grown with only 45-50 K supercooling.

Luther, L. C.↗
NASA NTRS1998

Interaction between Convection and Heat Transfer in Crystal Growth

Crystals are integral components in some of our most sophisticated and rapidly developing industries. Single crystals are solids with the most uniform structures that can be obtained on an atomic scale. Because of their structural uniformity, crystals can transmit acoustic and electromagnetic waves and charged particles with essentially no scattering or interferences. This transparency, which can be selectively modified by controlled additions of impurities known as dopants, is the foundation of modern electronic industry. It has brought about widespread application of crystals in transistors, lasers, microwave devices, infrared detectors, magnetic memory devices, and many other magnets and electro-optic components. The performance of a crystal depends strongly on its compositional homogeneity. For instance, in modern microcircuitry, compositional variations of a few percent (down to a submicron length scale) can seriously jeopardize predicted yields. Since crystals are grown by carefully controlled phase transformations, the compositional adjustment in the solid is often made during growth from the nutrient. Hence, a detailed understanding of mass transfer in the nutrient is essential. Moreover, since mass transfer is often the slowest process during growth, it is usually the rate limiting mechanism. Crystal growth processes are usually classified according to the nature of the parent phase. Nevertheless, whether the growth occurs by solidification from a melt (melt growth), nucleation from a solution (solution growth), condensation from a vapor (physical vapor transport) or chemical reaction of gases (chemical vapor deposition), the parent phase is a fluid. As is with most non-equilibrium processes involving fluids, liquid or vapor, fluid motion plays an important role, affecting both the concentration and temperature gradients at the soli-liquid interface.

Source record↗
NASA NTRS1976

A 128K-bit CCD buffer memory system

A prototype system was implemented to demonstrate that CCD's can be applied advantageously to the problem of low power digital storage and particularly to the problem of interfacing widely varying data rates. 8K-bit CCD shift register memories were used to construct a feasibility model 128K-bit buffer memory system. Peak power dissipation during a data transfer is less than 7 W., while idle power is approximately 5.4 W. The system features automatic data input synchronization with the recirculating CCD memory block start address. Descriptions are provided of both the buffer memory system and a custom tester that was used to exercise the memory. The testing procedures and testing results are discussed. Suggestions are provided for further development with regards to the utilization of advanced versions of CCD memory devices to both simplified and expanded memory system applications.

Siemens, K. H.↗
NASA NTRS2022

Non-Volatile, Low Power, and High Density SiC Memory For Future Venus Missions

Long lived memory would transform Venus landers & missions. Venus durable memory demonstrated in earlier HOTTech with impractically high power and low bit capacity. This project seeks to develop and demonstrate the world’s first Venus-durable low power memory device (Non-Volatile Random Access Memory (NVRAM) to enhance extended Venus surface missions.

silicon carbide↗
NASA NTRS2010

Radiation-Hardened Solid-State Drive

A method is provided for a radiationhardened (rad-hard) solid-state drive for space mission memory applications by combining rad-hard and commercial off-the-shelf (COTS) non-volatile memories (NVMs) into a hybrid architecture. The architecture is controlled by a rad-hard ASIC (application specific integrated circuit) or a FPGA (field programmable gate array). Specific error handling and data management protocols are developed for use in a rad-hard environment. The rad-hard memories are smaller in overall memory density, but are used to control and manage radiation-induced errors in the main, and much larger density, non-rad-hard COTS memory devices. Small amounts of rad-hard memory are used as error buffers and temporary caches for radiation-induced errors in the large COTS memories. The rad-hard ASIC/FPGA implements a variety of error-handling protocols to manage these radiation-induced errors. The large COTS memory is triplicated for protection, and CRC-based counters are calculated for sub-areas in each COTS NVM array. These counters are stored in the rad-hard non-volatile memory. Through monitoring, rewriting, regeneration, triplication, and long-term storage, radiation-induced errors in the large NV memory are managed. The rad-hard ASIC/FPGA also interfaces with the external computer buses.

Sheldon, Douglas J.↗
NASA NTRS2016

Reliability Characterization of TaOx-Based Commercial ReRAM in Combination with Radiation

We present reliability data combined with total dose gamma radiation for one of the first commercially available resistive memory devices. These Tantalum Oxide (TaOX)-based resistive memory chips demonstrate operation in dynamic program and erase testing up to ~130 Krad(Si) of 60Co gamma dose. In static and unbiased conditions, the stored data in the memory cells were able to withstand up to 50Mrad(Si) of exposure. The access circuitry, though, seemed less robust to gamma radiation and was able to operate only up to a total dose of 3Mrad(Si). Post exposure reliability as indicated by endurance, cycling error rate, and data retention tests showed no detectable impact from the combination with prior gamma irradiation. Overall, the total dose radiation tolerance of the commercial TaOx-based resistive memory chip appears to be higher than flash memory chips and in agreement with prior tests conducted with single cell resistive memories.

total ionizing dose↗
NASA NTRS2020

Status of NEPP Radiation Testing 3D NAND Flash

This work provides a current update of radiation testing activities on 3D NAND flash memories in support of the NEPP program. Single-event effects data from heavy-ion and low-energy proton testing is highlighted on a state of the art memory device.

Flash↗