A circuit with logarithmic transfer response over 9 decades.
Silicon transistor connected as three terminal feedback network in operational amplifier to obtain logarithmic transfer response over nine decades
DYNAMIC RESPONSE↗
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Results for “SILICON TRANSISTOR”
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Temperature transducer has high output, is time stable
Compact, lightweight temperature transducer requires no amplification of its output signal and is time stable. It uses the temperature-dependent characteristics of a silicon transistor to provide a zero-to-five-volt signal proportional to temperature.
Follett, W. H.↗
Research on the physics of solid materials semiannual status report no. 11, 1 may - 31 oct. 1964
Environmental effects on electric properties of n-p-n silicon transistors
METALLURGY↗
Miniature electrometer preamplifier effectively compensates for input capacitance
Negative capacitance preamplifier using a dual MOS /Metal Oxide Silicon/ transistor in conjunction with bipolar transistors is used with intracellular microelectrodes in recording bioelectric potentials. Applications would include use as a pickup plate video amplifier in storage tube tests and for pH and ionization chamber measurements.
Burrous, C. N.↗
GaAs-Si photon-activated switch.
Light activated low level switch consisting of electroluminescent GaAs p-n diode and double emitter silicon transistor
SWITCHING ELEMENT↗
Safe operating area determination for prevention of second breakdown
Performance and reliability testing of 10 n-p-n silicon transistors from critical spacecraft locations
Source record↗
Radiation-Hardness Data For Semiconductor Devices
Document presents data on and analysis of radiation hardness of various semiconductor devices. Data specifies total-dose radiation tolerance of devices. Volume 1 of report covers diodes, bipolar transistors, field effect transistors, silicon controlled rectifiers and optical devices. Volume 2 covers integrated circuits. Volume 3 provides detailed analysis of data in volumes 1 and 2.
Price, W. E.↗
Copper-Based OHMIC Contracts for the Si/SiGe Heterojunction Bipolar Transistor Structure
Silicon based heterojunction bipolar transistors (HBT) with SiGe base are potentially important devices for high-speed and high-frequency microelectronics. These devices are particularly attractive as they can be fabricated using standard Si processing technology. However, in order to realize the full potential of devices fabricated in this material system, it is essential to be able to form low resistance ohmic contacts using low thermal budget process steps and have full compatibility with VLSI/ULSI processing. Therefore, a study was conducted in order to better understand the contact formation and to develop optimized low resistance contacts to layers with doping densities corresponding to the p-type SiGe base and n-type Si emitter regions of the HBTS. These as-grown doped layers were implanted with BF(sub 2) up to 1 X 10(exp 16)/CM(exp 2) and As up to 5 x 10(exp 15)/CM2, both at 30 keV for the p-type SiGe base and n-type Si emitter layers, respectively, in order to produce a low sheet resistance surface layer. Standard transfer length method (TLM) contact pads on both p and n type layers were deposited using an e-beam evaporated trilayer structure of Ti/CufTi/Al (25)A/1500A/250A/1000A). The TLM pads were delineated by a photoresist lift-off procedure. These contacts in the as-deposited state were ohmic, with specific contact resistances for the highest implant doses of the order of 10(exp -7) ohm-CM2 and lower.
Das, Kalyan↗
Components irradiation test no. 19, gamma irradiation of 2N914, 2N918, S2N930, 2N2192 and 2N2369 transistors
Gamma radiation tests on n-p-n silicon epitaxial transistors
SILICON TRANSISTOR↗
Low level commutation using mos fet transistors
Metal oxide silicon field effect transistors /MOS FET/ as switching elements for low level commutator
METAL OXIDE SEMICONDUCTOR /MOS/↗
An investigation of the effects of radiation on silicon nitride insulated gate /MNS/ transistors Final report
Radiation effects on silicon nitride insulated gate field effect transistors
Frank, R.↗
Broad Beam and Ion Microprobe Studies of Single-Event Upsets in High Speed 0.18micron Silicon Germanium Heterojunction Bipolar Transistors and Circuits
Combining broad-beam circuit level SEU response with ion microprobe tests on single silicon germanium heterojunction bipolar transistors allows for a better understanding of the charge collection mechanisms responsible for SEU response of HBT technology.
Robert A Reed↗
Mechanisms of ionizing radiation surface effects on transistors.
Ionizing radiation effects on silicon planar bipolar transistors determine degradation mechanisms
SILICON TRANSISTOR↗
Mechanisms of ionizing radiation surface effects on transistors.
Ionizing radiation effects on silicon planar bipolar transistors to determine degradation mechanisms
IONIZING RADIATION↗
High power switching transistor Final report
Design theory and fabrication procedure for n-p-n 100 ampere silicon switching transistor
SILICON TRANSISTOR↗
Fabrication and encapsulation of transistors and computation of voltage capability and current gain Second quarterly report, Oct. - Dec. 1965
Fabrication and encapsulation of epitaxial surface transistor
EPITAXIAL DEPOSITION↗
Effect of electron radiation on silicon nitride insulated gate field effect transistors.
Electron radiation stability of silicon nitride insulated gate FET with passivation layers and heat treatment, noting contamination effects
Newman, P. A.↗
Junction-to-Case Thermal Resistance of a Silicon Carbide Bipolar Junction Transistor Measured
Junction temperature of a prototype SiC-based bipolar junction transistor (BJT) was estimated by using the base-emitter voltage (V(sub BE)) characteristic for thermometry. The V(sub BE) was measured as a function of the base current (I(sub B)) at selected temperatures (T), all at a fixed collector current (I(sub C)) and under very low duty cycle pulse conditions. Under such conditions, the average temperature of the chip was taken to be the same as that of the temperature-controlled case. At increased duty cycle such as to substantially heat the chip, but same I(sub C) pulse height, the chip temperature was identified by matching the V(sub BE) to the thermometry curves. From the measured average power, the chip-to-case thermal resistance could be estimated, giving a reasonable value. A tentative explanation for an observed bunching with increasing temperature of the calibration curves may relate to an increasing dopant atom ionization. A first-cut analysis, however, does not support this.
Niedra, Janis M.↗