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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 55 records · Page 3

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NASA NTRS1976

Development of single cell protectors for sealed silver-zinc cells, phase 1

A single cell protector (SCP) assembly capable of protecting a single silver-zinc (Ag Zn) battery cell was designed, fabricated, and tested. The SCP provides cell-level protection against overcharge and overdischarge by a bypass circuit. The bypass circuit consists of a magnetic-latching relay that is controlled by the high and low-voltage limit comparators. Although designed specifically for secondary Ag-Zn cells, the SCP is flexible enough to be adapted to other rechargeable cells. Eighteen SCPs were used in life testing of an 18-cell battery. The cells were sealed Ag-Zn system with inorganic separators. For comparison, another 18-cell battery was subjected to identical life test conditions, but with battery-level protection rather than cell-level. An alternative approach to the SCP design in the form of a microprocessor-based system was conceptually designed. The comparison of SCP and microprocessor approaches is also presented and a preferred approach for Ag-Zn battery protection is discussed.

Imamura, M. S.↗

NASA NTRS1986

Definition and verification of a complex aircraft for aerodynamic calculations

Techniques are reviewed which are of value in CAD/CAM CFD studies of the geometries of new fighter aircraft. In order to refine the computations of the flows to take advantage of the computing power available from supercomputers, it is often necessary to interpolate the geometry of the mesh selected for the numerical analysis of the aircraft shape. Interpolating the geometry permits a higher level of detail in calculations of the flow past specific regions of a design. A microprocessor-based mathematics engine is described for fast image manipulation and rotation to verify that the interpolated geometry will correspond to the design geometry in order to ensure that the flow calculations will remain valid through the interpolation. Applications of the image manipulation system to verify geometrical representations with wire-frame and shaded-surface images are described.

Edwards, T. A.↗

NASA NTRS1979

A microprocessor based satellite borne packet switch

Design considerations applicable to a space-borne single microprocessor based packet switch are identified. These include system architecture decisions and microprocessor selection. The division of tasks among different subroutines is discussed. The primary design criterion is to maximize throughput. The extension to a multi-satellite network is discussed. The maximum throughput attainable is derived. A queue theoretic model has been developed and expressions for average response times and average queue sizes are obtained. A number of graphs showing the effect of various design parameters on the average response time and the average queue sizes are presented.

Crist, S. C.↗

NASA NTRS1978

Stand-alone development system using a KIM-1 microcomputer module

A small microprocessor-based system designed to: contain all or most of the interface hardware, designed to be easy to access and modify the hardware, to be capable of being strapped to the seat of a small general aviation aircraft, and to be independent of the aircraft power system is described. The system is used to develop a low cost Loran C sensor processor, but is designed such that the Loran interface boards may be removed and other hardware interfaces inserted into the same connectors. This flexibility is achieved through memory-mapping techniques into the microprocessor.

Nickum, J. D.↗

NASA NTRS1980

The digital implementation of control compensators - The coefficient wordlength issue

There exist a number of mathematical procedures for designing discrete-time compensators. However, the digital implementation of these designs, with a microprocessor, for example, has not received nearly as thorough an investigation. The finite-precision nature of the digital hardware makes it necessary to choose a computational structure that will perform adequately with regard to the initial objectives of the design. This paper describes a procedure for estimating the required fixed-point coefficient wordlength for any given computational structure for the implementation of a single-input single-output LQG design. The results are compared to the actual number of bits necessary to achieve a specified performance index.

Moroney, P.↗

NASA NTRS1977

A keyboard interface for the JOLT microprocessor

A keyboard interface designed to allow data input without use of a teleprinter is described. In operation, the keyboard allows JOLT start-up and entry of data for LORAN or OMEGA navigation.

Wright, L.↗

NASA NTRS1979

The digital implementation of control compensators: The coefficient wordlength issue

There exists a number of mathematical procedures for designing discrete-time compensators. However, the digital implementation of these designs, with a microprocessor for example, has not received nearly as thorough an investigation. The finite-precision nature of the digital hardware makes it necessary to choose an algorithm (computational structure) that will perform 'well-enough' with regard to the initial objectives of the design. This paper describes a procedure for estimating the required fixed-point coefficient wordlength for any given computational structure for the implementation of a single-input single-output LOG design. The results are compared to the actual number of bits necessary to achieve a specified performance index.

Moroney, P.↗

NASA NTRS1989

Space station propulsion test bed

A test bed was fabricated to demonstrate hydrogen/oxygen propulsion technology readiness for the intital operating configuration (IOC) space station application. The test bed propulsion module and computer control system were delivered in December 1985, but activation was delayed until mid-1986 while the propulsion system baseline for the station was reexamined. A new baseline was selected with hydrogen/oxygen thruster modules supplied with gas produced by electrolysis of waste water from the space shuttle and space station. As a result, an electrolysis module was designed, fabricated, and added to the test bed to provide an end-to-end simulation of the baseline system. Subsequent testing of the test bed propulsion and electrolysis modules provided an end-to-end demonstration of the complete space station propulsion system, including thruster hot firings using the oxygen and hydrogen generated from electrolysis of water. Complete autonomous control and operation of all test bed components by the microprocessor control system designed and delivered during the program was demonstrated. The technical readiness of the system is now firmly established.

Briley, G. L.↗

NASA NTRS1985

High-speed, automatic controller design considerations for integrating array processor, multi-microprocessor, and host computer system architectures

Modern control systems must typically perform real-time identification and control, as well as coordinate a host of other activities related to user interaction, online graphics, and file management. This paper discusses five global design considerations which are useful to integrate array processor, multimicroprocessor, and host computer system architectures into versatile, high-speed controllers. Such controllers are capable of very high control throughput, and can maintain constant interaction with the nonreal-time or user environment. As an application example, the architecture of a high-speed, closed-loop controller used to actively control helicopter vibration is briefly discussed. Although this system has been designed for use as the controller for real-time rotorcraft dynamics and control studies in a wind tunnel environment, the controller architecture can generally be applied to a wide range of automatic control applications.

Jacklin, S. A.↗

NASA NTRS1979

Preliminary design and development of a reflectance spectrometer instrument

An improved design for the reflectance spectrometer is described to be used on various terrestrial body missions. These improvements were made on the original Lunar Polar Orbiter design. These include a larger entrance mirror, rectangular aperture, multiple optical beams, spatial resolution, and a bandwidth extension to 5 microns. In addition, detailed electronic designs were produced for a charge amplifier and an amplifier/demodulator/integrator. Design of a microprocessor driven test system was begun. Laboratory tests were performed on a tuning fork chopper.

Mccord, T. B.↗

NASA NTRS1982

Development of flying qualities criteria for single pilot instrument flight operations

Flying qualities criteria for Single Pilot Instrument Flight Rule (SPIFR) operations were investigated. The ARA aircraft was modified and adapted for SPIFR operations. Aircraft configurations to be flight-tested were chosen and matched on the ARA in-flight simulator, implementing modern control theory algorithms. Mission planning and experimental matrix design were completed. Microprocessor software for the onboard data acquisition system was debugged and flight-tested. Flight-path reconstruction procedure and the associated FORTRAN program were developed. Algorithms associated with the statistical analysis of flight test results and the SPIFR flying qualities criteria deduction are discussed.

Bar-Gill, A.↗

NASA NTRS1984

Smart motor technology

Current spacecraft design relies upon microprocessor control; however, motors usually require extensive additional electronic circuitry to interface with these microprocessor controls. An improved control technique that allows a smart brushless motor to connect directly to a microprocessor control system is described. An actuator with smart motors receives a spacecraft command directly and responds in a closed loop control mode. In fact, two or more smart motors can be controlled for synchronous operation.

Packard, D.↗

NASA NTRS1986

Fast Initialization of Bubble-Memory Systems

Improved scheme several orders of magnitude faster than normal initialization scheme. State-of-the-art commercial bubble-memory device used. Hardware interface designed connects controlling microprocessor to bubblememory circuitry. System software written to exercise various functions of bubble-memory system in comparison made between normal and fast techniques. Future implementations of approach utilize E2PROM (electrically-erasable programable read-only memory) to provide greater system flexibility. Fastinitialization technique applicable to all bubble-memory devices.

Looney, K. T.↗

NASA NTRS1985

MIMD computing in the USA - 1984

It is often said that the 1980s are becoming the decade of multiinstruction stream or MIMD computers, while the 1970s could be described as the decade of the SIMD (single instruction stream multiple data stream) computers. The availability of microprocessors and VLSI facilities has led to the proposal and construction of novel computer architectures based on linking many hundreds or even thousands of microprocessors, or specially designed VLSI chips. Some of the larger manufacturers offer computers with a small number of CPUs. Because of the variety of the new developments, it was decided to conduct a survey of proposed and existing MIMD computers in the U.S., taking into account a simple classification of the different devices. Particular attention is given to computers which are designed for numerical work with floating-point numbers and the solution of large problems in physics, chemistry, and engineering.

Hockney, R. W.↗

NASA NTRS1989

Film annotation system for a space experiment

This microprocessor system was designed to control and annotate a Nikon 35 mm camera for the purpose of obtaining photographs and data at predefined time intervals. The single STD BUSS interface card was designed in such a way as to allow it to be used in either a stand alone application with minimum features or installed in a STD BUSS computer allowing for maximum features. This control system also allows the exposure of twenty eight alpha/numeric characters across the bottom of each photograph. The data contains such information as camera identification, frame count, user defined text, and time to .01 second.

Browne, W. R.↗

NASA NTRS1998

An Adaptable Power System with Software Control Algorithm

A low cost, flexible and modular spacecraft power system design was developed in response to a call for an architecture that could accommodate multiple missions in the small to medium load range. Three upcoming satellites will use this design, with one launch date in 1999 and two in the year 2000. The design consists of modular hardware that can be scaled up or down, without additional cost, to suit missions in the 200 to 600 Watt orbital average load range. The design will be applied to satellite orbits that are circular, polar elliptical and a libration point orbit. Mission unique adaptations are accomplished in software and firmware. In designing this advanced, adaptable power system, the major goals were reduction in weight volume and cost. This power system design represents reductions in weight of 78 percent, volume of 86 percent and cost of 65 percent from previous comparable systems. The efforts to miniaturize the electronics without sacrificing performance has created streamlined power electronics with control functions residing in the system microprocessor. The power system design can handle any battery size up to 50 Amp-hour and any battery technology. The three current implementations will use both nickel cadmium and nickel hydrogen batteries ranging in size from 21 to 50 Amp-hours. Multiple batteries can be used by adding another battery module. Any solar cell technology can be used and various array layouts can be incorporated with no change in Power System Electronics (PSE) hardware. Other features of the design are the standardized interfaces between cards and subsystems and immunity to radiation effects up to 30 krad Total Ionizing Dose (TID) and 35 Mev/cm(exp 2)-kg for Single Event Effects (SEE). The control algorithm for the power system resides in a radiation-hardened microprocessor. A table driven software design allows for flexibility in mission specific requirements. By storing critical power system constants in memory, modifying the system code for other programs is simple. These constants can be altered also by ground command, or in response to an anomolous event. All critical power system functions have backup hardware functions to prevent a software or computer glitch from propagating. A number of battery charge control schemes can be implemented by selecting the proper control terms in the code. The architecture allows the design engineer to tune the system response to various system components and anticipated load profiles without costly alterations. A design trade was made with the size, weight and power dissipation of the electronics versus the performance of the power bus to load variations. Linear, fine control is maintained with a streamlined electronics design. This paper describes the hardware design as well as the software control algorithm. The challenges of closing the system control loop digitally is discussed. Control loop margin and power system performance is presented. Lab measurements are shown and compared to the system response of a hardware model running actual flight software.

Castell, Karen↗

NASA NTRS1979

The application of microprocessor technology to in-flight computation

A modular design of a general purpose microprocessor-based computer to perform in-flight computations for cross-country soaring pilots is described. The basic requirements for the system are discussed. Several specialized applications of the computer are presented, including real-time pilot feedback and flight-test data acquisition and reduction.

Sawyer, P. L.↗

NASA NTRS1982

Electron lithography STAR design guidelines. Part 3: The mosaic transistor array applied to custom microprocessors. Part 4: Stores logic arrays, SLAs implemented with clocked CMOS

The Mosaic Transistor Array is an extension of the STAR system developed by NASA which has dedicated field cells designed to be specifically used in semicustom microprocessor applications. The Sandia radiation hard bulk CMOS process is utilized in order to satisfy the requirements of space flights. A design philosophy is developed which utilizes the strengths and recognizes the weaknesses of the Sandia process. A style of circuitry is developed which incorporates the low power and high drive capability of CMOS. In addition the density achieved is better than that for classic CMOS, although not as good as for NMOS. The basic logic functions for a data path are designed with compatible interface to the STAR grid system. In this manner either random logic or PLA type structures can be utilized for the control logic.

Trotter, J. D.↗