Search NASA⌕ Search

SEARCH · Search NASA

Results for “semiconductor device fabrication”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 55 records · Page 3
All sourcesNASA NTRSDOE OSTI
NASA NTRS2009

NASA Tech Briefs, July 2009

Topics covered include: Dual Cryogenic Capacitive Density Sensor; Hail Monitor Sensor; Miniature Six-Axis Load Sensor for Robotic Fingertip; Improved Blackbody Temperature Sensors for a Vacuum Furnace; Wrap-Around Out-the-Window Sensor Fusion System; Wide-Range Temperature Sensors with High-Level Pulse Train Output; Terminal Descent Sensor Simulation; A Robust Mechanical Sensing System for Unmanned Sea Surface Vehicles; Additive for Low-Temperature Operation of Li-(CF)n Cells; Li/CFx Cells Optimized for Low-Temperature Operation; Number Codes Readable by Magnetic-Field-Response Recorders; Determining Locations by Use of Networks of Passive Beacons; Superconducting Hot-Electron Submillimeter-Wave Detector; Large-Aperture Membrane Active Phased-Array Antennas; Optical Injection Locking of a VCSEL in an OEO; Measuring Multiple Resistances Using Single-Point Excitation; Improved-Bandwidth Transimpedance Amplifier; Inter-Symbol Guard Time for Synchronizing Optical PPM; Novel Materials Containing Single-Wall Carbon Nanotubes Wrapped in Polymer Molecules; Light-Curing Adhesive Repair Tapes; Thin-Film Solid Oxide Fuel Cells; Zinc Alloys for the Fabrication of Semiconductor Devices; Small, Lightweight, Collapsible Glove Box; Radial Halbach Magnetic Bearings; Aerial Deployment and Inflation System for Mars Helium Balloons; Steel Primer Chamber Assemblies for Dual Initiated Pyrovalves; Voice Coil Percussive Mechanism Concept for Hammer Drill; Inherently Ducted Propfans and Bi-Props; Silicon Nanowire Growth at Chosen Positions and Orientations; Detecting Airborne Mercury by Use of Gold Nanowires; Detecting Airborne Mercury by Use of Palladium Chloride; Micro Electron MicroProbe and Sample Analyzer; Nanowire Electron Scattering Spectroscopy; Electron-Spin Filters Would Offer Spin Polarization Greater than 1; Subcritical-Water Extraction of Organics from Solid Matrices; A Model for Predicting Thermoelectric Properties of Bi2Te3; Integrated Miniature Arrays of Optical Biomolecule Detectors; A Software Rejuvenation Framework for Distributed Computing; Kurtosis Approach to Solution of a Nonlinear ICA Problem; Robust Software Architecture for Robots; R4SA for Controlling Robots; Bio-Inspired Neural Model for Learning Dynamic Models; Evolutionary Computing Methods for Spectral Retrieval; Monitoring Disasters by Use of Instrumented Robotic Aircraft; Complexity for Survival of Living Systems; Using Drained Spacecraft Propellant Tanks for Habitation; Connecting Node; and Electrolytes for Low-Temperature Operation of Li-CFx Cells.

Source record↗
NASA NTRS1990

Method of fabricating germanium and gallium arsenide devices

A method of semiconductor diode fabrication is disclosed which relies on the epitaxial growth of a precisely doped thickness layer of gallium arsenide or germanium on a semi-insulating or intrinsic substrate, respectively, of gallium arsenide or germanium by either molecular beam epitaxy (MBE) or by metal-organic chemical vapor deposition (MOCVD). The method involves: depositing a layer of doped or undoped silicon dioxide on a germanium or gallium arsenide wafer or substrate, selectively removing the silicon dioxide layer to define one or more surface regions for a device to be fabricated thereon, growing a matched epitaxial layer of doped germanium or gallium arsenide of an appropriate thickness using MBE or MOCVD techniques on both the silicon dioxide layer and the defined one or more regions; and etching the silicon dioxide and the epitaxial material on top of the silicon dioxide to leave a matched epitaxial layer of germanium or gallium arsenide on the germanium or gallium arsenide substrate, respectively, and upon which a field effect device can thereafter be formed.

Jhabvala, Murzban↗
NASA NTRS2005

Improved Method of Manufacturing SiC Devices

The phrase, "common-layered architecture for semiconductor silicon carbide" ("CLASSiC") denotes a method of batch fabrication of microelectromechanical and semiconductor devices from bulk silicon carbide. CLASSiC is the latest in a series of related methods developed in recent years in continuing efforts to standardize SiC-fabrication processes. CLASSiC encompasses both institutional and technological innovations that can be exploited separately or in combination to make the manufacture of SiC devices more economical. Examples of such devices are piezoresistive pressure sensors, strain gauges, vibration sensors, and turbulence-intensity sensors for use in harsh environments (e.g., high-temperature, high-pressure, corrosive atmospheres). The institutional innovation is to manufacture devices for different customers (individuals, companies, and/or other entities) simultaneously in the same batch. This innovation is based on utilization of the capability for fabrication, on the same substrate, of multiple SiC devices having different functionalities (see figure). Multiple customers can purchase shares of the area on the same substrate, each customer s share being apportioned according to the customer s production-volume requirement. This makes it possible for multiple customers to share costs in a common foundry, so that the capital equipment cost per customer in the inherently low-volume SiC-product market can be reduced significantly. One of the technological innovations is a five-mask process that is based on an established set of process design rules. The rules provide for standardization of the fabrication process, yet are flexible enough to enable multiple customers to lay out masks for their portions of the SiC substrate to provide for simultaneous batch fabrication of their various devices. In a related prior method, denoted multi-user fabrication in silicon carbide (MUSiC), the fabrication process is based largely on surface micromachining of poly SiC. However, in MUSiC one cannot exploit the superior sensing, thermomechanical, and electrical properties of single-crystal 6H-SiC or 4H-SiC. As a complement to MUSiC, the CLASSiC five-mask process can be utilized to fabricate multiple devices in bulk single-crystal SiC of any polytype. The five-mask process makes fabrication less complex because it eliminates the need for large-area deposition and removal of sacrificial material. Other innovations in CLASSiC pertain to selective etching of indium tin oxide and aluminum in connection with multilayer metallization. One major characteristic of bulk micromachined microelectromechanical devices is the presence of three-dimensional (3D) structures. Any 3D recesses that already exist at a given step in a fabrication process usually make it difficult to apply a planar coat of photoresist for metallization and other subsequent process steps. To overcome this difficulty, the CLASSiC process includes a reversal of part of the conventional flow: Metallization is performed before the recesses are etched.

Okojie, Robert S.↗
DOE OSTI2024

Autonomous hybrid optimization of a SiO 2 plasma etching mechanism

Computational modeling of plasma etching processes at the feature scale relevant to the fabrication of nanometer semiconductor devices is critically dependent on the reaction mechanism representing the physical processes occurring between plasma produced reactant fluxes and the surface, reaction probabilities, yields, rate coefficients, and threshold energies that characterize these processes. The increasing complexity of the structures being fabricated, new materials, and novel gas mixtures increase the complexity of the reaction mechanism used in feature scale models and increase the difficulty in developing the fundamental data required for the mechanism. This challenge is further exacerbated by the fact that acquiring these fundamental data through more complex computational models or experiments is often limited by cost, technical complexity, or inadequate models. In this paper, we discuss a method to automate the selection of fundamental data in a reduced reaction mechanism for feature scale plasma etching of SiO 2 using a fluorocarbon gas mixture by matching predictions of etch profiles to experimental data using a gradient descent (GD)/Nelder–Mead (NM) method hybrid optimization scheme. These methods produce a reaction mechanism that replicates the experimental training data as well as experimental data using related but different etch processes.

36 MATERIALS SCIENCE↗
NASA NTRS2006

Selective Plasma Deposition of Fluorocarbon Films on SAMs

A dry plasma process has been demonstrated to be useful for the selective modification of self-assembled monolayers (SAMs) of alkanethiolates. These SAMs are used, during the fabrication of semiconductor electronic devices, as etch masks on gold layers that are destined to be patterned and incorporated into the devices. The selective modification involves the formation of fluorocarbon films that render the SAMs more effective in protecting the masked areas of the gold against etching by a potassium iodide (KI) solution. This modification can be utilized, not only in the fabrication of single electronic devices but also in the fabrication of integrated circuits, microelectromechanical systems, and circuit boards. In the steps that precede the dry plasma process, a silicon mold in the desired pattern is fabricated by standard photolithographic techniques. A stamp is then made by casting polydimethylsiloxane (commonly known as silicone rubber) in the mold. The stamp is coated with an alkanethiol solution, then the stamp is pressed on the gold layer of a device to be fabricated in order to deposit the alkanethiol to form an alkanethiolate SAM in the desired pattern (see figure). Next, the workpiece is exposed to a radio-frequency plasma generated from a mixture of CF4 and H2 gases. After this plasma treatment, the SAM is found to be modified, while the exposed areas of gold remain unchanged. This dry plasma process offers the potential for forming masks superior to those formed in a prior wet etching process. Among the advantages over the wet etching process are greater selectivity, fewer pin holes in the masks, and less nonuniformity of the masks. The fluorocarbon films formed in this way may also be useful as intermediate layers for subsequent fabrication steps and as dielectric layers to be incorporated into finished products.

Crain, Mark M., III↗
NASA NTRS1985

Investigation of semiconductor clad optical waveguides

A variety of techniques have been proposed for fabricating integrated optical devices using semiconductors, lithium niobate, and glasses as waveguides and substrates. The use of glass waveguides and their interaction with thin semiconductor cladding layers was studied. Though the interactions of these multilayer waveguide structures have been analyzed here using glass, they may be applicable to other types of materials as well. The primary reason for using glass is that it provides a simple, inexpensive way to construct waveguides and devices.

Batchman, T. E.↗
DOE OSTI2026

Recent progress in atomic-scale controlled plasma processing

Atomic-scale control in plasma processing is becoming increasingly critical for fabricating of advanced semiconductor devices, particularly as the industry shifts toward three-dimensional (3D) architectures and high-aspect-ratio (HAR) structures. This review presents a comprehensive overview of recent developments in atomic-scale controlled plasma processes, organized along two key directions: the hierarchical structure of plasma–surface interactions and the generational evolution of atomic layer processing (ALP) technologies. We examined the gas phase, where molecular design enables selective generation of ions and radicals; the boundary layer, where transport phenomena govern species delivery into nanoscale features, and the surface, where temperature-dependent reactions and cyclic processing determine etching selectivity and precision. Building on this foundation, we outline five generations of ALP—from thermal atomic layer deposition to transport-aware, temporally and structurally decoupled processes—highlighting the increasing sophistication of process control. The review further explores the transition from empirical recipe development to science-based, data-driven methodologies. By integrating quantum-chemical modeling, advanced diagnostics, and machine learning, we demonstrated how predictive models can link plasma species composition to process outcomes, enabling autonomous and adaptive control strategies. Finally, this review discusses the broader societal implications of plasma process innovation through the E4 quartet: energy and resource efficiency, environmental sustainability, evolutionary advancement, and educational promotion. These principles guide the development of sustainable and intelligent atomic-scale manufacturing technologies that are not only technically advanced but also socially responsible.

Ishikawa, Kenji [Nagoya Univ. (Japan)] (ORCID:0000↗
NASA NTRS1995

The Fundamentals of Using the Digital Micromirror Device (DMD(TM)) for Projection Display

Developed by Texas Instruments (TI) the digital micromirror device (DMD(tm)) is a quickly emerging and highly useful micro-electro-mechanical structures (MEMS) device. Using standard semiconductor fabrication technology, the DMD's simplicity in concept and design will provide advantageous solutions for many different applications. At the rudimentary level, the DMD is a precision, semiconductor light switch. In the initial commercial development of DMD technology, TI has concentrated on projection display and hardcopy. This paper will focus on how the DMD is used for projection display. Other application areas are being explored and evaluated to find appropriate and beneficial uses for the DMD.

Yoder, Lars A.↗
NASA NTRS1996

Porous silicon carbide (SIC) semiconductor device

Porous silicon carbide is fabricated according to techniques which result in a significant portion of nanocrystallites within the material in a sub 10 nanometer regime. There is described techniques for passivating porous silicon carbide which result in the fabrication of optoelectronic devices which exhibit brighter blue luminescence and exhibit improved qualities. Based on certain of the techniques described porous silicon carbide is used as a sacrificial layer for the patterning of silicon carbide. Porous silicon carbide is then removed from the bulk substrate by oxidation and other methods. The techniques described employ a two-step process which is used to pattern bulk silicon carbide where selected areas of the wafer are then made porous and then the porous layer is subsequently removed. The process to form porous silicon carbide exhibits dopant selectivity and a two-step etching procedure is implemented for silicon carbide multilayers.

Shor, Joseph S.↗
NASA NTRS2013

Dual ohmic contact to N- and P-type silicon carbide

Simultaneous formation of electrical ohmic contacts to silicon carbide (SiC) semiconductor having donor and acceptor impurities (n- and p-type doping, respectively) is disclosed. The innovation provides for ohmic contacts formed on SiC layers having n- and p-doping at one process step during the fabrication of the semiconductor device. Further, the innovation provides a non-discriminatory, universal ohmic contact to both n- and p-type SiC, enhancing reliability of the specific contact resistivity when operated at temperatures in excess of 600.degree. C.

Okojie, Robert S.↗
NASA NTRS2000

Method For Growth of Crystal Surfaces and Growth of Heteroepitaxial Single Crystal Films Thereon

A method of growing atomically-flat surfaces and high quality low-defect crystal films of semiconductor materials and fabricating improved devices thereon is discussed. The method is also suitable for growing films heteroepitaxially on substrates that are different than the film. The method is particularly suited for growth of elemental semiconductors (such as Si), compounds of Groups III and V elements of the Periodic Table (such as GaN), and compounds and alloys of Group IV elements of the Periodic Table (such as SiC).

Powell, J. Anthony↗
NASA NTRS2004

High-Temperature Probe Station Developed to Characterize Microwave Devices Through 500 C

A photograph and a block diagram of the high-temperature probe station are shown. The system consists of the ceramic heater mounted on a NASA shuttle tile insulator, a direct current power supply, a personal-computer-based data acquisition and temperature controller, microwave probes, a microscope, and a network analyzer. The ability to perform microwave tests at high temperatures is becoming necessary. There is now a need for sensors and communication circuits that can operate at 500 C and above for aircraft engine development and monitoring during flight. To address this need, researchers have fabricated devices using wide bandgap semiconductors such as SiC with targeted operating temperatures of 500 to 600 C. However, the microwave properties of these devices often change drastically with temperature, so any designs that are intended to be used in such an environment must be characterized at high temperatures. For some reliability, lifetime, and direct-current testing, the device under test can be packaged and characterized in an oven. However, for RF and microwave measurements, it is usually not possible to establish a calibrated reference plane at the device terminals within a package. In addition, the characteristics of the package would vary over a 500 C temperature range, and this would have to be accounted for when the data were analyzed. A high temperature probe station allows circuits and devices to be characterized through on wafer measurements across a broad temperature range with known reference plane. The conventional, commercially available thermal wafer-probe stations that are used to evaluate microwave devices across a controlled temperature range have a typical upper limit of 200 C. Standalone thermal heating chucks are available with an extended upper temperature range of 300 to 400 C. To effectively characterize devices at temperatures up to and surpassing 500 C, Glenn researchers developed a custom probe station. In the past, custom probe stations have been developed to test devices under other extreme environments, such as cryogenic temperatures as low as 37 K. Similarly, this custom probe station was specifically modified for high-temperature use. It allows devices to be measured quickly and flexibly, without the use of wire bonds and test fixtures. The probe station is shown making scattering parameter measurements from 1 to 50 GHz with a Hewlett-Packard 8510C Network Analyzer. There is a half-wafer of silicon directly on top of the heater to provide a uniform heated platform for our sample. A quarter wafer of silicon carbide forms the substrate for our test circuit of several transmission lines.

Downey, Alan N.↗
NASA NTRS2006

Graded junction termination extensions for electronic devices

A graded junction termination extension in a silicon carbide (SiC) semiconductor device and method of its fabrication using ion implementation techniques is provided for high power devices. The properties of silicon carbide (SiC) make this wide band gap semiconductor a promising material for high power devices. This potential is demonstrated in various devices such as p-n diodes, Schottky diodes, bipolar junction transistors, thyristors, etc. These devices require adequate and affordable termination techniques to reduce leakage current and increase breakdown voltage in order to maximize power handling capabilities. The graded junction termination extension disclosed is effective, self-aligned, and simplifies the implementation process.

Merrett, J. Neil↗
NASA NTRS2007

Graded junction termination extensions for electronic devices

A graded junction termination extension in a silicon carbide (SiC) semiconductor device and method of its fabrication using ion implementation techniques is provided for high power devices. The properties of silicon carbide (SiC) make this wide band gap semiconductor a promising material for high power devices. This potential is demonstrated in various devices such as p-n diodes, Schottky diodes, bipolar junction transistors, thyristors, etc. These devices require adequate and affordable termination techniques to reduce leakage current and increase breakdown voltage in order to maximize power handling capabilities. The graded junction termination extension disclosed is effective, self-aligned, and simplifies the implementation process.

Merrett, J. Neil↗
NASA NTRS1981

Chemical composition of the SiO2/InSb interface as determined by X-ray photoelectron spectroscopy

In connection with the relatively poor insulating characteristics of the native oxides of most III-V compound semiconductors, there has been interest in the development of deposited dielectric layers for surface passivation and MOS device fabrication on III-V compound semiconductor substrates. The chemical system of SiO2 deposited on single-crystal InSb substrates has been proposed for the fabrication of IR CCD. The considered investigation is concerned with a detailed examination of the chemical nature of the interactions between deposited and native oxides using X-ray photoelectron spectroscopy (XPS) in conjunction with a chemical-etching technique for depth profiling. The compositional structure of the interfaces obtained in the SiO2/native oxide/InSb system is derived on the basis of an intensity analysis of XPS spectra. Thermal oxidation of the InSb substrate is found to result in an In-rich native oxide and excess elemental Sb at the native oxide/substrate interface.

Vasquez, R. P.↗