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Silicon Carbide Electronic Devices

The status of emerging silicon carbide (SiC) widebandgap semiconductor electronics technology is briefly surveyed. SiC-based electronic devices and circuits are being developed for use in high-temperature, high-power, and/or high-radiation conditions under which conventional semiconductors cannot function. Projected performance benefits of SiC electronics are briefly illustrated for several applications. However, most of these operational benefits of SiC have yet to be realized in actual systems, primarily owing to the fact that the growth techniques of SiC crystals are relatively immature and device fabrication technologies are not yet sufficiently developed to the degree required for widespread, reliable commercial use. Key crystal growth and device fabrication issues that limit the performance and capability of high-temperature and/or high-power SiC electronics are identified. The electrical and material quality differences between emerging SiC and mature silicon electronics technology are highlighted.

Neudeck, P. G.↗

High-Pressure Transducer Package

Enclosure for silicon device ensures accurate measurements of cryogenic liquids. Package holds silicon sensor in uniform compression around periphery and helps ensure accurate, stable, and repeatable pressure measurements. Mounting assembly housed in package of stainless steel. Materials selected for equality of thermal expansion and for pressure-sealing properties. Besides its high-pressure, low-temperature characteristics, package withstands vibrations as severe as 400 times standard gravitational acceleration at 0 to 2,000 Hz.

Wamstad, D.↗

Single-Event Effects in Silicon Carbide Power Devices

This report summarizes the NASA Electronic Parts and Packaging Program Silicon Carbide Power Device Subtask efforts in FY15. Benefits of SiC are described and example NASA Programs and Projects desiring this technology are given. The current status of the radiation tolerance of silicon carbide power devices is given and paths forward in the effort to develop heavy-ion single-event effect hardened devices indicated.

heavy-ion single-event effects↗

Study of the Staebler-Wronski degradation effect in a-Si:H based p-i-n solar cell

Conversion of solar energy into electricity using environmentally safe and clean photovoltaic methods to supplement the ever increasing energy needs has been a cherished goal of many scientists and engineers around the world. Photovoltaic solar cells on the other hand, have been the power source for satellites ever since their introduction in the early sixties. For widespread terrestrial applications, however, the cost of photovoltaic systems must be reduced considerably. Much progress has been made in the recent past towards developing economically viable terrestrial systems, and the future looks highly promising. Thin film solar cells offer cost reductions mainly from their low processing cost, low material cost, and choice of low cost substrates. These are also very attractive for space applications because of their high power densities (power produced per kilogram of solar cell pay load) and high radiation resistance. Amorphous silicon based solar cells are amongst the top candidates for economically viable terrestrial and space based power generation. Despite very low federal funding during the eighties, amorphous silicon solar cell efficiencies have continually been improved - from a low 3 percent to over 13 percent now. Further improvements have been made by the use of multi-junction tandem solar cells. Efficiencies close to 15 percent have been achieved in several labs. In order to be competitive with fossil fuel generated electricity, it is believed that module efficiency of 15 percent or cell efficiency of 20 percent is required. Thus, further improvements in cell performance is imperative. One major problem that was discovered almost 15 years ago in amorphous silicon devices is the well known Staebler-Wronski Effect. Efficiency of amorphous silicon solar cells was found to degrade upon exposure to sunlight. Until now their is no consensus among the scientists on the mechanism for this degradation. Efficiency may degrade anywhere from 10 percent to almost 50 percent within the first few months of operation. In order to improve solar cell efficiencies, it is clear that the cause or causes of such degradation must be found and the processing conditions altered to minimize the loss in efficiency. This project was initiated in 1987 to investigate a possible link between metallic impurities, in particular, Ag, and this degradation. Such a link was established by one of the NASA scientists for the light induced degradation of n+/p crystalline silicon solar cells.

Naseem, H. A.↗

Silicon Carbide Power Devices and Integrated Circuits

An overview of the NASA NEPP Program Silicon Carbide Power Device subtask is given, including the current task roadmap, partnerships, and future plans. Included are the Agency-wide efforts to promote development of single-event effect hardened SiC power devices for space applications.

single-event gate rupture (SEGR)↗

Annual Conference on Nuclear and Space Radiation Effects, 19th, Las Vegas, NV, July 20-22, 1982, Proceedings

The results of research concerning the effects of nuclear and space radiation are presented. Topics discussed include the basic mechanisms of nuclear and space radiation effects, radiation effects in devices, and radiation effects in microcircuits, including studies of radiation-induced paramagnetic defects in MOS structures, silicon solar cell damage from electrical overstress, radiation-induced charge dynamics in dielectrics, and the enhanced radiation effects on submicron narrow-channel NMOS. Also examined are topics in SGEMP/IEMP phenomena, hardness assurance and testing, energy deposition, desometry, and radiation transport, and single event phenomena. Among others, studies are presented concerning the limits to hardening electronic boxes to IEMP coupling, transient radiation screening of silicon devices using backside laser irradiation, the damage equivalence of electrons, protons, and gamma rays in MOS devices, and the single event upset sensitivity of low power Schottky devices.

Long, D. M.↗

Silicon Carbide Being Developed for High-Definition Television (HDTV) Transmitter Modules

Through a Space Act Agreement, the NASA Lewis Research Center has helped develop the base silicon carbide (SiC) epitaxial growth technology for Westinghouse's efforts to bring silicon carbide products to the marketplace. SiC is a high-temperature, high-voltage semiconductor that can deliver greater than three times the power of conventional silicon devices. The technology was initially disclosed in the 1994 R&T report. NASA Lewis High Temperature Integrated Electronics and Sensors (HTIES) team is developing SiC as a material for advanced semiconductor electronic device applications because SiC-based electronics and sensors can operate in hostile environments where conventional silicon-based electronics cannot function. SiC transmitters hold great promise for television stations because they can convert broadcasts from analog to digital signals. A modular solid-state design provides broadcasters with an option to gradually add modules, increasing the power of their transmitters as they expand their high-definition television (HDTV) coverage. Using these high-power transistors will significantly reduce the space needed for high-power transmitters at television stations and will offer a solid-state solution, reducing long-term maintenance costs. Thus, transmitter manufacturers will be able to abandon their reliance on tube-based technology for high-power transmitters and will be able to build smaller, high-power, solid-state transmitters.

Costello, Donald E.↗

Gigarad-tolerant power switches and memory elements

A new class of silicon devices operating without p-n junctions has been studied for radiation hardness. The electric field in these devices is uniform over most of the device, thus causing high-voltage breakdown to increase with electrode spacing. Deep acceptor levels are created in the silicon by diffusing gold atoms into the lattice, or by electron radiation. These acceptor levels, near the center of the band gap, trap out electrons so that the low resistivity of the n-type doped wafer can be raised to intrinsic resistivity. Switching between a high-resistivity state at low currents and a low-resistivity state at high currents occurs at a definite threshold voltage, exhibiting characteristics similar to silicon-controlled rectifiers. Compensating 0.1 ohm-meter (10 ohm-cm) silicon wafers requires electron fluxes of 10 to the 23rd electrons per square meter (10 to the 19th electrons per square centimeter). Experiments demonstrating gamma tolerance to 1 Gigarad(Si) are described. Calculations for maximum tolerable neutron fluence are shown, and a phenomenological explanation for these results is presented.

Joyner, W. T.↗

Ultra-Low-Temperature Homoepitaxial Growth of Sb-Doped Silicon

An ultra-low-temperature process for homoepitaxial growth of high-quality, surface-confined, Sb-doped silicon layers is presented. Non-equilibrium growth by molecular beam epitaxy (MBE) is used to achieve dopant incorporation in excess of 2x10(exp 14) per sq cm in a thin, surface-confined layer. Sb surface segregation larger than expected from theoretical models was observed, in agreement with other experimental works. Furthermore, this work details an entirely low-temperature process (less than 450 degree C) that can be applied to fully processed and aluminum-metallized silicon devices. One application of this process is the formation of a back-surface electrode for back-illuminated high-purity silicon imaging arrays.

Molecular beam epitaxy↗

Performance of MEMS Silicon Oscillator, ASFLM1, under Wide Operating Temperature Range

Over the last few years, MEMS (Micro-Electro-Mechanical Systems) resonator-based oscillators began to be offered as commercial-off-the-shelf (COTS) parts by a few companies [1-2]. These quartz-free, miniature silicon devices could compete with the traditional crystal oscillators in providing the timing (clock function) for many digital and analog electronic circuits. They provide stable output frequency, offer great tolerance to shock and vibration, and are immune to electro-static discharge [1-2]. In addition, they are encapsulated in compact lead-free packages, cover a wide frequency range (1 MHz to 125 MHz), and are specified, depending on the grade, for extended temperature operation from -40 C to +85 C. The small size of the MEMS oscillators along with their reliability and thermal stability make them candidates for use in space exploration missions. Limited data, however, exist on the performance and reliability of these devices under operation in applications where extreme temperatures or thermal cycling swings, which are typical of space missions, are encountered. This report presents the results of the work obtained on the evaluation of an ABRACON Corporation MEMS silicon oscillator chip, type ASFLM1, under extreme temperatures.

Patterson, Richard L.↗

Assessment of Operation of EMK21 MEMS Silicon Oscillator Over Wide Temperature Range

Electronic control systems, data-acquisition instrumentation, and microprocessors require accurate timing signals for proper operation. Traditionally, ceramic resonators and crystal oscillators provided this clock function for the majority of these systems. Over the last few years, MEMS (Micro-Electro-Mechanical Systems) resonator-based oscillators began to surface as commercial-off-the-shelf (COTS) parts by a few companies. These quartz-free, miniature silicon devices could easily replace the traditional crystal oscillators in providing the timing/clock function for many digital and analog circuits. They are reported to provide stable output frequency, offer great tolerance to shock and vibration, and are immune to electro-static discharge [ 1-2]. In addition, they are encapsulated in compact lead-free packages and cover a wide frequency range (1 MHz to 125 MHz). The small size of the MEMS oscillators along with their thermal stability make them ideal candidates for use in space exploration missions. Limited data, however, exist on the performance and reliability of these devices under operation in applications where extreme temperatures or thermal cycling swings, which are typical of space missions, are encountered. This report presents the results of the work obtained on the evaluation of an Ecliptek Corporation MEMS silicon oscillator chip under extreme temperatures.

Patterson, Richard L.↗

Defects in silicon effect on device performance and relationship to crystal growth conditions

A relationship between material defects in silicon and the performance of electronic devices will be described. A role which oxygen and carbon in silicon play during the defects generation process will be discussed. The electronic properties of silicon are a strong function of the oxygen state in the silicon. This state controls mechanical properties of silicon efficiency for internal gettering and formation of defects in the device's active area. In addition, to temperature, time, ambience, and the cooling/heating rates of high temperature treatments, the oxygen state is a function of the crystal growth process. The incorporation of carbon and oxygen into silicon crystal is controlled by geometry and rotation rates applied to crystal and crucible during crystal growths. Also, formation of nucleation centers for oxygen precipitation is influenced by the growth process, although there is still a controversy which parameters play a major role. All these factors will be reviewed with special emphasis on areas which are still ambiguous and controversial.

Jastrzebski, L.↗

Passive Cooling for Mercury Surface Lander Electronics

A significant barrier to operation of a mission on the surface of Mercury is the temperature. At Mercury’s perihelion distance of 0.313 AU, the solar intensity is 10.6 times the solar flux at Earth orbit, and at the subsolar point, the maximum surface temperature reaches 427°C. For a mission landing on the surface of Mercury at latitude of 40°S, we analyzed using passive thermal control to reduce the temperature of the critical electronics to within the operation temperature limits of silicon devices. The thermal control requires reducing the thermal conductance and infrared flux from the high temperature surface and surrounding spacecraft, and moderating the solar heat input using a surface coating with high solar reflectivity, and maximizing thermal cooling with high infrared emissivity. Using this approach, we find that we can passively cool an electronics box to a temperature of 393K (120°C) using a radiator-white surface with solar absorptivity 0.11 and infrared emissivity 0.91. This temperature is well under 175C target we use for the limits of high-temperature silicon integrated circuits, including RAM and microcontrollers. We could further reduce this operating temperature to as low as 321K (48°C) with an advanced thermal coating, a temperature well within the operational limits of conventional electronics.

Mercury↗

Passive Cooling for Mercury Surface Lander Electronics

A significant barrier to operation of a mission on the surface of Mercury is the temperature. At Mercury’s perihelion distance of 0.313 AU, the solar intensity is 10.6 times the solar flux at Earth orbit, and at the subsolar point, the maximum surface temperature reaches 427°C. For a mission landing on the surface of Mercury at latitude of 40°S, we analyzed using passive thermal control to reduce the temperature of the critical electronics to within the operation temperature limits of silicon devices. The thermal control requires reducing the thermal conductance and infrared flux from the high temperature surface and surrounding spacecraft, and moderating the solar heat input using a surface coating with high solar reflectivity, and maximizing thermal cooling with high infrared emissivity. Using this approach, we find that we can passively cool an electronics box to a temperature of 393K (120°C) using a radiator-white surface with solar absorptivity 0.11 and infrared emissivity 0.91. This temperature is well under 175C target we use for the limits of high-temperature silicon integrated circuits, including RAM and microcontrollers. We could further reduce this operating temperature to as low as 321K (48°C) with an advanced thermal coating, a temperature well within the operational limits of conventional electronics

Mercury↗