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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 55 records · Page 3
All sourcesNASA NTRSDOE OSTI
NASA NTRS1988

Two-Dimensional Systolic Array For Kalman-Filter Computing

Two-dimensional, systolic-array, parallel data processor performs Kalman filtering in real time. Algorithm rearranged to be Faddeev algorithm for generalized signal processing. Algorithm mapped onto very-large-scale integrated-circuit (VLSI) chip in two-dimensional, regular, simple, expandable array of concurrent processing cells. Processor does matrix/vector-based algebraic computations. Applications include adaptive control of robots, remote manipulators and flexible structures and processing radar signals to track targets.

Chang, Jaw John↗
NASA NTRS1989

Systolic VLSI array for implementing the Kalman filter algorithm

A method and apparatus for processing signals representative of a complex matrix/vector equation. More particularly, signals representing an orderly sequence of the combined matrix and vector equation, known as a Kalman filter algorithm, are processed in real time in accordance with the principles of this invention. The Kalman filter algorithm is rearranged into a Faddeeva algorithm, which is a matrix-only algorithm that is modified to represent both the matrix and vector portions of the Kalman filter algorithm. The modified Faddeeva algorithm is embodied into electrical signals which are applied as inputs to a systolic array processor. The processor performs triangulation and nullification on the input signals, and delivers an output signal which is a real-time solution to the input signals.

Jaw J Chang↗
NASA NTRS1990

A VLSI design for a systolic Viterbi decoder

A systolic Viterbi decoder for convolutional codes is developed. This decoder uses the trace-back method to reduce the amount of data needed to be stored in registers. It is shown that this new algorithm requires a smaller chip size and achieves a faster decoding time than other existing methods.

Truong, T. K.↗
NASA NTRS1991

Cascading a systolic array and a feedforward neural network for navigation and obstacle avoidance using potential fields

A technique is developed for vehicle navigation and control in the presence of obstacles. A potential function was devised that peaks at the surface of obstacles and has its minimum at the proper vehicle destination. This function is computed using a systolic array and is guaranteed not to have local minima. A feedfoward neural network is then used to control the steering of the vehicle using local potential field information. In this case, the vehicle is a trailer truck backing up. Previous work has demonstrated the capability of a neural network to control steering of such a trailer truck backing to a loading platform, but without obstacles. Now, the neural network was able to learn to navigate a trailer truck around obstacles while backing toward its destination. The network is trained in an obstacle free space to follow the negative gradient of the field, after which the network is able to control and navigate the truck to its target destination in a space of obstacles which may be stationary or movable.

Plumer, Edward S.↗
NASA NTRS1991

A class of least-squares filtering and identification algorithms with systolic array architectures

A unified approach is presented for deriving a large class of new and previously known time- and order-recursive least-squares algorithms with systolic array architectures, suitable for high-throughput-rate and VLSI implementations of space-time filtering and system identification problems. The geometrical derivation given is unique in that no assumption is made concerning the rank of the sample data correlation matrix. This method utilizes and extends the concept of oblique projections, as used previously in the derivations of the least-squares lattice algorithms. Exponentially weighted least-squares criteria are considered for both sliding and growing memory.

Kalson, Seth Z.↗
NASA NTRS1991

Systolic array IC for genetic computation

Measuring similarities between large sequences of genetic information is a formidable task requiring enormous amounts of computer time. Geneticists claim that nearly two months of CRAY-2 time are required to run a single comparison of the known database against the new bases that will be found this year, and more than a CRAY-2 year for next year's genetic discoveries, and so on. The DNA IC, designed at HP-ICBD in cooperation with the California Institute of Technology and the Jet Propulsion Laboratory, is being implemented in order to move the task of genetic comparison onto workstations and personal computers, while vastly improving performance. The chip is a systolic (pumped) array comprised of 16 processors, control logic, and global RAM, totaling 400,000 FETS. At 12 MHz, each chip performs 2.7 billion 16 bit operations per second. Using 35 of these chips in series on one PC board (performing nearly 100 billion operations per second), a sequence of 560 bases can be compared against the eventual total genome of 3 billion bases, in minutes--on a personal computer. While the designed purpose of the DNA chip is for genetic research, other disciplines requiring similarity measurements between strings of 7 bit encoded data could make use of this chip as well. Cryptography and speech recognition are two examples. A mix of full custom design and standard cells, in CMOS34, were used to achieve these goals. Innovative test methods were developed to enhance controllability and observability in the array. This paper describes these techniques as well as the chip's functionality. This chip was designed in the 1989-90 timeframe.

Anderson, D.↗
NASA NTRS1993

Practical issues in implementing roving spares in VLSI systolic arrays

In this paper we address several unsolved problems in implementing roving spares as a methodology for on-line testing and reconfiguration of systolic arrays. An algorithm for distinguishing between permanent faults and intermittent/transient faults is proposed. A methodology for determining different parameter values for this algorithm is presented. Results characterizing an optimal switching structure are presented. A judicious partitioning of information (for distributed and central processing) allows design of simple switch controllers for implementing roving spares operation as well as reconfiguration in the presence of failures. Testability and self-checking capability is incorporated into these controllers using a few extra gates.

Bandekar, Rajendra↗
NASA NTRS1992

Bit-systolic arithmetic arrays using dynamic differential gallium arsenide circuits

A new family of gallium arsenide circuits for fine grained bit-systolic arithmetic arrays is introduced. This scheme combines features of two recent techniques of dynamic gallium arsenide FET logic and differential dynamic single-clock CMOS logic. The resulting circuits are fast and compact, with tightly constrained series FET propagation paths, low fanout, no dc power dissipation, and depletion FET implementation without level shifting diodes.

Beagles, Grant↗
NASA NTRS1995

Systolic Processor Array For Recognition Of Spectra

Spectral signatures of materials detected and identified quickly. Spectral Analysis Systolic Processor Array (SPA2) relatively inexpensive and satisfies need to analyze large, complex volume of multispectral data generated by imaging spectrometers to extract desired information: computational performance needed to do this in real time exceeds that of current supercomputers. Locates highly similar segments or contiguous subsegments in two different spectra at time. Compares sampled spectra from instruments with data base of spectral signatures of known materials. Computes and reports scores that express degrees of similarity between sampled and data-base spectra.

Chow, Edward T.↗
NASA NTRS1995

Pipeline synthetic aperture radar data compression utilizing systolic binary tree-searched architecture for vector quantization

A system for data compression utilizing systolic array architecture for Vector Quantization (VQ) is disclosed for both full-searched and tree-searched. For a tree-searched VQ, the special case of a Binary Tree-Search VQ (BTSVQ) is disclosed with identical Processing Elements (PE) in the array for both a Raw-Codebook VQ (RCVQ) and a Difference-Codebook VQ (DCVQ) algorithm. A fault tolerant system is disclosed which allows a PE that has developed a fault to be bypassed in the array and replaced by a spare at the end of the array, with codebook memory assignment shifted one PE past the faulty PE of the array.

Chang, Chi-Yung↗
NASA NTRS2001

Respiratory sinus arrhythmia: opposite effects on systolic and mean arterial pressure in supine humans

1. Are arterial blood pressure fluctuations buffered or reinforced by respiratory sinus arrhythmia (RSA)? There is still considerable debate about this simple question. Different results have been obtained, triggering a discussion as to whether or not the baroreflexes are responsible for RSA. We suspected that the measurements of different aspects of arterial pressure (mean arterial pressure (MAP) and systolic pressure (SP)) can explain the conflicting results. 2. Simultaneous recordings of beat-to-beat MAP, SP, left cardiac stroke volume (SV, pulsed ultrasound Doppler), heart rate (HR) and respiration (RE) were obtained in 10 healthy young adults during spontaneous respiration. In order to eliminate HR variations at respiratory frequency we used propranolol and atropine administration in the supine and tilted positions. Respiration-synchronous variation in the recorded variables was quantified by spectral analysis of the recordings of each of these variables, and the phase relations between them were determined by cross-spectral analysis. 3. MAP fluctuations increased after removing heart rate variations in both supine and tilted position, whereas SP fluctuations decreased in the supine position and increased in the head-up tilted position. 4. RSA buffers respiration-synchronous fluctuations in MAP in both positions. However, fluctuations in SP were reinforced by RSA in the supine and buffered in the tilted position.

Clinical Trial↗
NASA NTRS1973

Effects of posture on exercise performance - Measurement by systolic time intervals.

Because posture significantly influences cardiac performance, the effects of moderate supine and upright ergometer exercise were compared on the basis of proportional (+37%) rate increments over resting control. Supine exercise produced significant decreases in left ventricular ejection time (LVET), pre-ejection period (PEP), and isovolumic contraction time (IVCT). Ejection time index (ETI) and corrected ejection time (LVETc) did not change significantly. Upright exercise produced greater decreases in PEP and LVET, but despite the rate increase there was no change in LVET, which resulted in sharp increases in ETI and LVETc. The discordant directional effects on LVET and its rate-correcting indices between the two postures were consistent with hemodynamic studies demonstrating lack of stroke volume change during supine exercise and increased stroke volume over control during light to moderate upright exercise.

Spodick, D. H.↗
NASA NTRS1977

Recovery from exercise at varying work loads - Time course of responses of heart rate and systolic intervals

The time course of the recovery period was characterized by noninvasive measurements after 4 minute bicycle exercise at 3 separate work loads in volunteers with normal peak responses. Most responses started immediately to return toward resting control values. Left ventricular ejection time and stroke volume change are discussed. Changes in pre-ejection period were determined by changes in isovolume contraction time, and factors affecting the degree and rate of return are considered. The rates of change in the ejection time index and in the ratio pre-ejection period/left ventricular ejection time were virtually independent of load throughout most of recovery.

Nandi, P. S.↗
NASA NTRS1981

Optical implementation of systolic array processing

Algorithms for matrix vector multiplication are implemented using acousto-optic cells for multiplication and input data transfer and using charge coupled devices detector arrays for accumulation and output of the results. No two dimensional matrix mask is required; matrix changes are implemented electronically. A system for multiplying a 50 component nonnegative real vector by a 50 by 50 nonnegative real matrix is described. Modifications for bipolar real and complex valued processing are possible, as are extensions to matrix-matrix multiplication and multiplication of a vector by multiple matrices.

Caulfield, H. J.↗