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At least 595 records · Page 33

WARP: Weight Associative Rule Processor. A dedicated VLSI fuzzy logic megacell

During the last five years Fuzzy Logic has gained enormous popularity in the academic and industrial worlds. The success of this new methodology has led the microelectronics industry to create a new class of machines, called Fuzzy Machines, to overcome the limitations of traditional computing systems when utilized as Fuzzy Systems. This paper gives an overview of the methods by which Fuzzy Logic data structures are represented in the machines (each with its own advantages and inefficiencies). Next, the paper introduces WARP (Weight Associative Rule Processor) which is a dedicated VLSI megacell allowing the realization of a fuzzy controller suitable for a wide range of applications. WARP represents an innovative approach to VLSI Fuzzy controllers by utilizing different types of data structures for characterizing the membership functions during the various stages of the Fuzzy processing. WARP dedicated architecture has been designed in order to achieve high performance by exploiting the computational advantages offered by the different data representations.

Pagni, A.↗

Bit-parallel arithmetic in a massively-parallel associative processor

A simple but powerful new architecture based on a classical associative processor model is presented. Algorithms for performing the four basic arithmetic operations both for integer and floating point operands are described. For m-bit operands, the proposed architecture makes it possible to execute complex operations in O(m) cycles as opposed to O(m exp 2) for bit-serial machines. A word-parallel, bit-parallel, massively-parallel computing system can be constructed using this architecture with VLSI technology. The operation of this system is demonstrated for the fast Fourier transform and matrix multiplication.

Scherson, Isaac D.↗

Time-variant analysis of rotorcraft systems dynamics - An exploitation of vector processors

In this paper a generalized algorithmic procedure is presented for handling constraints in mechanical transmissions. The latter are treated as multibody systems of interconnected rigid/flexible bodies. The constraint Jacobian matrices are generated automatically and suitably updated in time, depending on the geometrical and kinematical constraint conditions describing the interconnection between shafts or gears. The type of constraints are classified based on the interconnection of the bodies by assuming that one or more points of contact exist between them. The effects due to elastic deformation of the flexible bodies are included by allowing each body element to undergo small deformations. The procedure is based on recursively formulated Kane's dynamical equations of motion and the finite element method, including the concept of geometrical stiffening effects. The method is implemented on an IBM-3090-600j vector processor with pipe-lining capabilities. A significant increase in the speed of execution is achieved by vectorizing the developed code in computationally intensive areas. An example consisting of two meshing disks rotating at high angular velocity is presented. Applications are intended for the study of the dynamic behavior of helicopter transmissions.

Amirouche, F. M. L.↗

Evaluation of the Intel iWarp parallel processor for space flight applications

The potential of a DARPA-sponsored advanced processor, the Intel iWarp, for use in future SSF Data Management Systems (DMS) upgrades is evaluated through integration into the Ames DMS testbed and applications testing. The iWarp is a distributed, parallel computing system well suited for high performance computing applications such as matrix operations and image processing. The system architecture is modular, supports systolic and message-based computation, and is capable of providing massive computational power in a low-cost, low-power package. As a consequence, the iWarp offers significant potential for advanced space-based computing. This research seeks to determine the iWarp's suitability as a processing device for space missions. In particular, the project focuses on evaluating the ease of integrating the iWarp into the SSF DMS baseline architecture and the iWarp's ability to support computationally stressing applications representative of SSF tasks.

Hine, Butler P., III↗

Dynamic overset grid communication on distributed memory parallel processors

A parallel distributed memory implementation of intergrid communication for dynamic overset grids is presented. Included are discussions of various options considered during development. Results are presented comparing an Intel iPSC/860 to a single processor Cray Y-MP. Results for grids in relative motion show the iPSC/860 implementation to be faster than the Cray implementation.

Barszcz, Eric↗

An optical processor for zero-crossing edge detection

An optical processor for zero-crossing edge detection is presented, which consists of two defocused imaging systems to perform the Gaussian convolutions and a VLSI, ferroelectric liquid crystal spatial light modulator (SLM) to determine the zero-crossings. The zero-crossing SLM is a 32 x 32 array of pixels located on 100 microns centers. Each pixels contains a phototransistor, an auto-scaling amplifier, a zero-crossing detection circuit, and a liquid crystal modulating pad. Electrical and optical characteristics of the zero-crossing SLM are presented along with experimental results of the system.

Jared, David A.↗

The Massively Parallel Processor: Architecture and application

The massively parallel processor (MPP) has a simple, yet elegant architecture. Some have granted that it is novel, and other have claimed it to be fundamental. Whichever is the case, it has shown itself to be both useful and practical. Its hardware embodiment consumes relatively low power compared to other supercomputers, does not require special cooling, has an instruction cycle time that is relatively long, thus allowing it to avoid high speed technologies, and yet it competes respectably with any currently available supercomputer in speed of execution of applications. Due to the efficiency of the architecture, ease of construction and variety of applications, it is conceivable that within a few years computational accelerators more powerful than the MPP will be available at reasonable cost to be placed inside desktop workstations.

Dorband, John E.↗

Autonomous space processor for orbital debris removal and flame augmentation additives in scramjets for the National Aerospace Plane

This is a brief description of the USRA-sponsored design project at the University of Arizona. Approximately eighty-percent of this effort was spent pursuing a novel engineering concept for the in-situ processing of orbital debris utilizing resources available in low Earth orbit (LEO); the other twenty-percent was devoted to discovering innovative additives for the anchoring of supersonic combustion zones that find direct use in the Aerospace Plane that is expected to use scramjets. The seriousness of the orbital debris problem is briefly described. Available 'solutions' are outlined from the literature. The engineering design is briefly mentioned, with an emphasis on the positive aspects of the space environment that should be used in an economical approach. The aspects of operating in microgravity, vacuum, and in utilizing solar energy are mentioned. A quantitative computer animation was developed to provide design data. Three specific dead spacecraft were identified for an initial cleanup mission. The design concept, which includes a solar processor, remote arm manipulators, and the gradual processing of the debris, is also described. This is followed by a description of hardware construction. Operation and actual processing of simulated debris parts (aluminum, for now) are demonstrated in the NASP task, construction of the new design for measuring the radiation from the key free radicals (as enhanced by the additives) is described. Immediate (1988) and long-range (through 1992) future plans are shown to clearly indicate the full engineering design strategy in the light of the national space program thrusts.

Source record↗

Fast, Massively Parallel Data Processors

Proposed fast, massively parallel data processor contains 8x16 array of processing elements with efficient interconnection scheme and options for flexible local control. Processing elements communicate with each other on "X" interconnection grid with external memory via high-capacity input/output bus. This approach to conditional operation nearly doubles speed of various arithmetic operations.

Heaton, Robert A.↗

Using algebra for massively parallel processor design and utilization

This paper summarizes the author's advances in the design of dense processor networks. Within is reported a collection of recent constructions of dense symmetric networks that provide the largest know values for the number of nodes that can be placed in a network of a given degree and diameter. The constructions are in the range of current potential engineering significance and are based on groups of automorphisms of finite-dimensional vector spaces.

Campbell, Lowell↗

Experience with custom processors in space flight applications

The Applied Physics Laboratory (APL) has developed a magnetometer instrument for a swedish satellite named Freja with launch scheduled for August 1992 on a Chinese Long March rocket. The magnetometer controller utilized a custom microprocessor designed at APL with the Genesil silicon compiler. The processor evolved from our experience with an older bit-slice design and two prior single chip efforts. The architecture of our microprocessor greatly lowered software development costs because it was optimized to provide an interactive and extensible programming environment hosted by the target hardware. Radiation tolerance of the microprocessor was also tested and was adequate for Freja's mission -- 20 kRad(Si) total dose and very infrequent latch-up and single event upset events.

Fraeman, M. E.↗

A fast adaptive convex hull algorithm on two-dimensional processor arrays with a reconfigurable BUS system

A bus system that can change dynamically to suit computational needs is referred to as reconfigurable. We present a fast adaptive convex hull algorithm on a two-dimensional processor array with a reconfigurable bus system (2-D PARBS, for short). Specifically, we show that computing the convex hull of a planar set of n points taken O(log n/log m) time on a 2-D PARBS of size mn x n with 3 less than or equal to m less than or equal to n. Our result implies that the convex hull of n points in the plane can be computed in O(1) time in a 2-D PARBS of size n(exp 1.5) x n.

Olariu, S.↗

VPU(tm) demonstration mission vicinity processor unit(tm) overview

Evolving Technologies Corporation is designing a new type of computer called a Vicinity Processor Unit (VPU). The VPU is designed to monitor and control payloads using an operating system, control process and software environment that specifically takes into account the time delay associated with remotely controlling and monitoring a group of payloads in real time. This is a fundamentally different way of computing which has vast scientific implications for the design and implementation of data processing systems for future space flight missions. As a demonstration mission, the VPU is expected to be flown aboard the Space Shuttle (Payload Identification No. G-700) as a part of NASA's Small Self-Contained Payloads (SSCP) Program. We believe this mission can greatly facilitate the development and validation of technology which may prove to be mission critical for many future space flight missions.

Abdulezer, Loren↗

A unified approach to VLSI layout automation and algorithm mapping on processor arrays

Development of software tools for designing supercomputing systems is highly complex and cost ineffective. To tackle this a special purpose PAcube silicon compiler which integrates different design levels from cell to processor arrays has been proposed. As a part of this, we present in this paper a novel methodology which unifies the problems of Layout Automation and Algorithm Mapping.

Venkateswaran, N.↗

Autonomous Space Processor for Orbital Debris (ASPOD)

A project in the Advanced Design Program at the University of Arizona is described. The project is named the Autonomous Space Processor for Orbital Debris (ASPOD) and is a Universities Space Research Association (USRA) sponsored design project. The development of ASPOD and the students' abilities in designing and building a prototype spacecraft are the ultimate goals of this project. This year's focus entailed the development of a secondary robotic arm and end-effector to work in tandem with an existent arm in the removal of orbital debris. The new arm features the introduction of composite materials and a linear drive system, thus producing a light-weight and more accurate prototype. The main characteristic of the end-effector design is that it incorporates all of the motors and gearing internally, thus not subjecting them to the harsh space environment. Furthermore, the arm and the end-effector are automated by a control system with positional feedback. This system is composed of magnetic and optical encoders connected to a 486 PC via two servo-motor controller cards. Programming a series of basic routines and sub-routines allowed the ASPOD prototype to become more autonomous. The new system is expected to perform specified tasks with a positional accuracy of 0.5 cm.

Ramohalli, Kumar↗

Autonomous space processor for orbital debris advanced design project in support of solar system exploration

This paper is regarding a project in the Advanced Design Program at the University of Arizona. The project is named the Autonomous Space Processor for Orbital Debris (ASPOD) and is a NASA/Universities Space Research Association (USRA) sponsored design project. The development of ASPOD and the students' abilities in designing and building a prototype spacecraft are the ultimate goals of this project. This year's focus entailed the development of a secondary robotic arm and end-effector to work in tandem with an existent arm in the removal of orbital debris. The new arm features the introduction of composite materials and a linear drive system, thus producing a light-weight and more accurate prototype. The main characteristic of the end-effector design is that it incorporates all of the motors and gearing internally, thus not subjecting them to the harsh space environment. Furthermore, the arm and the end-effector are automated by a control system with positional feedback. This system is composed of magnetic and optical encoders connected to a 486 PC via two servo-motor controller cards. Programming a series of basic routines and sub-routines has allowed the ASPOD prototype to become more autonomous. The new system is expected to perform specified tasks with a positional accuracy of 0.5 cm.

Ramohalli, Kumar↗

Construction of a parallel processor for simulating manipulators and other mechanical systems

This report summarizes the results of NASA Contract NAS5-30905, awarded under phase 2 of the SBIR Program, for a demonstration of the feasibility of a new high-speed parallel simulation processor, called the Real-Time Accelerator (RTA). The principal goals were met, and EAI is now proceeding with phase 3: development of a commercial product. This product is scheduled for commercial introduction in the second quarter of 1992.

Hannauer, George↗

The geophysical processor system: Automated analysis of ERS-1 SAR imagery

The Geophysical Processor System (GPS) at the Alaska (U.S.) SAR (Synthetic Aperture Radar) Facility (ASF) uses ERS-1 SAR images as input to generate three types of products: sea ice motion, sea ice type, and ocean wave spectra. The GPS, operating automatically with minimal human intervention, delivers its output to the Archive and Catalog System (ACS) where scientists can search and order the products on line. The GPS has generated more than 10,000 products since it became operational in Feb. 1992, and continues to deliver 500 new products per month to the ACS. These products cover the Beaufort and Chukchi Seas and the western portion of the central Arctic Ocean. More geophysical processing systems are needed to handle the large volumes of data from current and future satellites. Images must be routinely and consistently analyzed to yield useful information for scientists. The current GPS is a good, working prototype on the way to more sophisticated systems.

Stern, Harry L.↗