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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 73 records · Page 4

TDC with uncontrolled delay lines: calibration approaches and precision improvement methods

The time-to-digital-converter (TDC) using uncontrolled delay lines has a simple structure and finer measurement precision since the delay cells are pure digital gates that operate at maximum speed. For every incoming hit, two “snapshots” of the delay line are taken by the register array with two strobes separated with a known time interval. With two measurements, propagation delays of each cell in the delay line can be calibrated for the operating temperature and voltage. The two measurements can also be averaged to improve the TDC measurement precision. We will discuss various calibration approaches and present test results in this work.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

Equivalent-Circuit Models of Grid-Forming IBRs for Electromagnetic-Transient Simulations

We derive equivalent-circuit models of control- and physical-layer subsystems of grid-forming (GFM) inverter-based resources (IBRs) for electromagnetic-transient (EMT) simulations. Three different primary controllers are considered: Droop, Virtual Synchronous Machine (VSM), and dispatchable Virtual Oscillator Control (dVOC). In addition, the models include cascaded voltage- and current-control loops, and LCL output filters. Simulations for a single-inverter setup and for a network of five inverters in a modified IEEE 14-bus topology are presented. The equivalent-circuit models simulated with analog electronic circuit-simulator software (in our case, LTspice) offer the same accuracy, and with no explicit tuning of the solver, lower computational burden compared to block-diagram-based implementations in commercial off-the-shelf EMT software (in our case, MATLAB-Simulink).

electromagnetic transient simulation↗

Equivalent-Circuit Models of Grid-Forming IBRs for Electromagnetic-Transient Simulations: Preprint

We derive equivalent-circuit models of control- and physical-layer subsystems of grid-forming (GFM) inverter-based resources (IBRs) for electromagnetic-transient (EMT) simulations. Three different primary controllers are considered: droop, virtual synchronous machine (VSM), and dispatchable virtual oscillator control (dVOC). In addition, the models include cascaded voltage- and current-control loops, and LCL output filters. Simulations for a single-inverter setup and for a network of five inverters in a modified IEEE 14-bus topology are presented. The equivalent-circuit models simulated with analog electronic circuit-simulator software (in our case, LTspice) offer the same accuracy with up to 150x lower computational burden compared to block-diagram-based implementations in commercial off-the-shelf EMT software (in our case, MATLAB-Simulink).

circuit-equivalent model↗

An integer- N frequency synthesizer for flexible on-chip clock generation

A low-power integer-N frequency synthesizer for flexible on-chip clock generation has been designed in a 65 nm CMOS process. The circuit can be programmed to generate two independent low-jitter clocks between 30 MHz and 3 GHz that are locked to a 10–50 MHz reference input. The design uses a phase-locked loop (PLL) with a dual-tuned LC voltage-controlled oscillator (VCO), programmable feedback divider, and dual output dividers. The total power consumption from 1.2 V and 0.8 V supplies is 4.0 mW. In conclusion, experimental results confirm the functionality of the proposed synthesizer over a wide range of output frequencies.

47 OTHER INSTRUMENTATION↗

Characterization of a gigabit transceiver for the ATLAS inner tracker pixel detector readout upgrade

We present a gigabit transceiver prototype Application Specific Integrated Circuit (ASIC), GBCR, for the ATLAS Inner Tracker (ITk) Pixel detector readout upgrade. GBCR is designed in a 65-nm CMOS technology and consists of four upstream receiver channels, a downstream transmitter channel, and an Inter-Integrated Circuit (I2C) slave. The upstream channels receive the data at 5.12 Gbps passing through 5-meter 34-American Wire Gauge (AWG) Twin-axial (Twinax) cables, equalize and retime them with a recovered clock, and then drive an optical transmitter. The downstream channel receives the data at 2.56 Gbps from an optical receiver and drives the cable as same as the upstream channels. The jitter of the upstream channel output is measured to be 35 ps (peak-peak) when the Clock-Data Recovery (CDR) module is turned on and the jitter of the downstream channel output after the cable is 138 ps (peak-peak). The power consumption of each upstream channel is 72 mW when the CDR module is turned on and the downstream channel consumes 27 mW. GBCR survives the total ionizing dose of 200 kGy.

47 OTHER INSTRUMENTATION↗

Radio frequency electrical resistance measurement under destructive pulsed magnetic fields

We developed a resistance measurement using radio frequency reflection to investigate the electrical transport characteristics under destructive pulsed magnetic fields above 100 T. A sample stage consisting of a homemade flexible printed circuit reduced the noise caused by the induced voltage from the pulsed magnetic fields, improving the accuracy of the measurements of the reflected waves. From the obtained reflectance data, the absolute value of the magnetoresistance was successfully determined by analyzing the phase with admittance charts. In conclusion, these developments enable more accurate and comprehensive measurements of electrical resistance in pulsed magnetic fields.

47 OTHER INSTRUMENTATION↗

Event-driven readout development: testing of the EDWARD65P1 chip with integrated event generators

Building on a prototype readout integrated circuit for segmented silicon sensors with the EDWARD event-driven readout architecture, the front-end in each pixel was replaced by a hardware generator to verify readout performance, ensuring no data loss, consistent priority handling, and speed verification. Here, this generator produces Poisson-distributed readout requests with individually tunable rates per pixel via a digitally controlled oscillator. The resulting EDWARD65P1 test ASIC is a 32×32 pixel matrix with a 100 μm pitch, equipped with digital event generators simulating radiation hits at user-defined rates. Test results for this new design are presented.

47 OTHER INSTRUMENTATION↗

Input-output processing on a remote integrated circuit chip

An electronic device includes a first integrated circuit chip including a processing functional block, and a second integrated circuit chip including an input-output (IO) functional block. The IO functional block performs one or more IO processing operations on behalf of the processing functional block in the first integrated circuit chip. The first integrated circuit chip lacks at least some elements of the IO functional block, so that the processing functional block is unable to perform corresponding IO operations without the IO functional block.

42 ENGINEERING↗

Universal signal scaling in microwave impedance microscopy

Microwave impedance microscopy (MIM) is an emerging scanning probe technique that measures the local complex dielectric function using near-field microwave. Although it has made significant impacts in diverse fields, a systematic, quantitative understanding of the signal's dependence on various important design parameters is lacking. Here, we show that for a wide range of MIM implementations, given a complex tip-sample admittance change ΔΥ, the MIM signal—the amplified change in the reflected microwave amplitude—is –G · ΔΥ/2Υ 0 · η 2 · V in , where η is the ratio of the microwave voltage at the probe to the incident microwave amplitude, Y o is the system admittance, and G is the total voltage gain. For linear circuits, η is determined by the circuit design and does not depend on V in . We show that the maximum achievable signal for different designs scales with η 2 or η when limited by input power or sample perturbation, respectively. Furthermore, this universal scaling provides guidance on diverse design goals, including maximizing narrow-band signal for imaging and balancing bandwidth and signal strength for spectroscopy.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Nanoscale Three-Dimensional Imaging of Integrated Circuits Using a Scanning Electron Microscope and Transition-Edge Sensor Spectrometer

X-ray nanotomography is a powerful tool for the characterization of nanoscale materials and structures, but it is difficult to implement due to the competing requirements of X-ray flux and spot size. Due to this constraint, state-of-the-art nanotomography is predominantly performed at large synchrotron facilities. We present a laboratory-scale nanotomography instrument that achieves nanoscale spatial resolution while addressing the limitations of conventional tomography tools. The instrument combines the electron beam of a scanning electron microscope (SEM) with the precise, broadband X-ray detection of a superconducting transition-edge sensor (TES) microcalorimeter. The electron beam generates a highly focused X-ray spot on a metal target held micrometers away from the sample of interest, while the TES spectrometer isolates target photons with a high signal-to-noise ratio. This combination of a focused X-ray spot, energy-resolved X-ray detection, and unique system geometry enables nanoscale, element-specific X-ray imaging in a compact footprint. The proof of concept for this approach to X-ray nanotomography is demonstrated by imaging 160 nm features in three dimensions in six layers of a Cu-SiO 2 integrated circuit, and a path toward finer resolution and enhanced imaging capabilities is discussed.

47 OTHER INSTRUMENTATION↗

Comparative evaluation of analogue front-end designs for the CMS Inner Tracker at the High Luminosity LHC

The CMS Inner Tracker, made of silicon pixel modules, will be entirely replaced prior to the start of the High Luminosity LHC period. One of the crucial components of the new Inner Tracker system is the readout chip, being developed by the RD53 Collaboration, and in particular its analogue front-end, which receives the signal from the sensor and digitizes it. Three different analogue front-ends (Synchronous, Linear, and Differential) were designed and implemented in the RD53A demonstrator chip. A dedicated evaluation program was carried out to select the most suitable design to build a radiation tolerant pixel detector able to sustain high particle rates with high efficiency and a small fraction of spurious pixel hits. The test results showed that all three analogue front-ends presented strong points, but also limitations. The Differential front-end demonstrated very low noise, but the threshold tuning became problematic after irradiation. Moreover, a saturation in the preamplifier feedback loop affected the return of the signal to baseline and thus increased the dead time. The Synchronous front-end showed very good timing performance, but also higher noise. For the Linear front-end all of the parameters were within specification, although this design had the largest time walk. This limitation was addressed and mitigated in an improved design. The analysis of the advantages and disadvantages of the three front-ends in the context of the CMS Inner Tracker operation requirements led to the selection of the improved design Linear front-end for integration in the final CMS readout chip.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

An FPGA-based readout chip emulator for the CMS ETL detector upgrade

Here, we present an FPGA-based readout chip emulator board for the CMS Endcap Timing Layer (ETL) detector upgrade. The emulator board uses an Intel Cyclone 10 GX FPGA to emulate the digital functions of four Endcap Layer Readout Chips (ETROCs). Based on the actual ETROC design, the firmware is implemented and verified. The emulator board is being used for the ETROC digital design verification and system development.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Characterization of the ATLAS Liquid Argon Front-End ASIC ALFE2 for the HL-LHC upgrade

In this study, ALFE2 is an ATLAS Liquid Argon Calorimeter (LAr) Front-End ASIC designed for the HL-LHC upgrade. ALFE2 comprises four channels of pre-amplifiers and CR-(RC) 2 shapers with adjustable input impedance. ALFE2 features two separate gain outputs to provide 16-bit dynamic-range coverage and an optimum resolution. ALFE2 is characterized using a Front-End Test Board (FETB) based on a Zynq UltraScale+ MPSoC and two octal-channel 16-bit high-speed ADCs. The test results indicate that ALFE2 fulfills or greatly exceeds all specifications on gain, noise, linearity, uniformity, and radiation tolerance.

47 OTHER INSTRUMENTATION↗

CWDM transmit module for wavelength tuning and tracking

A photonic integrated circuit (PIC) includes a semiconductor substrate with a main bus waveguide disposed within the substrate. Two or more ring lasers are disposed within the substrate and are optically coupled to the main bus waveguide. The ring lasers have a wavelength control mechanism allowing change of a lasers emitted wavelength. A wavelength selective filter is optically coupled to the bus waveguide. A control circuit is electronically coupled to each wavelength control mechanism, and the wavelength selective filter. The control circuit in conjunction with the selective filter allows monitoring of a ring laser's wavelength on the main bus waveguide. Based on a determined wavelength, the control circuit may change a ring laser wavelength to a desired wavelength to achieve a desired wavelength spacing for each of the ring lasers. The PIC may be integrated as a coarse wave-length division multiplexing (CWDM) transmit module.

42 ENGINEERING↗

ETROC1: the first full chain precision timing prototype ASIC for CMS MTD endcap timing layer upgrade

We present the design and characterization of the first fullchain precision timing prototype ASIC, named ETL Readout Chipversion 1 (ETROC1) for the CMS MTD endcap timing layer (ETL)upgrade. The ETL utilizes Low Gain Avalanche Diode (LGAD) sensors todetect charged particles, with the goal to achieve a time resolutionof 40–50 ps per hit, and 30–40 ps per track with hits from twodetector layers. The ETROC1 is composed of a 5 × 5 pixelarray and peripheral circuits. The pixel array includes a4 × 4 active pixel array with an H-tree shaped networkdelivering clock and charge injection signals. Each active pixel iscomposed of various components, including a bump pad, a chargeinjection circuit, a pre-amplifier, a discriminator, adigital-to-analog converter, and a time-to-digital converter. Thesecomponents play essential roles as the front-end link in processingLGAD signals and measuring timing-related information. Theperipheral circuits provide clock signals and readoutfunctionalities. The size of the ETROC1 chip is7 mm× 9 mm. ETROC1 has been fabricated in a 65 nmCMOS process, and extensively tested under stimuli of chargeinjection, infrared laser, and proton beam. The time resolution ofbump-bonded ETROC1 + LGAD chipsets reaches 42–46 ps per hit in thebeam test.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

All 2D Material Printed Diodes and Circuits on Paper for Sustainable Electronics

Sustainable electronics aim to reduce environmental impact by using ecofriendly materials, energy-efficient manufacturing, and recyclable components. However, existing approaches rely on complex, resource-intensive methods, rare metals, or nanomaterials with limited stability as well as plastic substrates, raising sustainability issues. Solution-processed two-dimensional (2D) materials offer a promising alternative: water-based and biocompatible conductive, semiconductive, and insulating 2D material inks can be produced with scalable techniques and are suitable for the fabrication of fully printed devices on low-cost and biodegradable paper substrates. However, 2D material only and fully printed diodes on paper have not yet been reported. Here, we demonstrate fully inkjet-printed 2D material-based diodes on paper using metal-insulator-semiconductor and metal-insulator-metal-semiconductor architectures. Water-based graphene and MoS2 inks, prepared by liquid-phase exfoliation, are used for the metallic and insulating films, while electrochemical exfoliation is used to produce the semiconducting MoS2 ink. The highest forward-to-reverse current ratio obtained is 330 (at ±2 V), while the forward current density is 1 mA/cm2 (at 1 V), making the diode performance comparable to the best solution-processed diodes reported so far. However, in contrast to previous works, fabrication occurs entirely at room temperature and ambient pressure, without using high-pressure sputtering, thermal evaporation, and any precious metal ink. The devices maintain stable performance under bending up to strain of 4% over 10,000 cycles. Finally, the diodes are successfully integrated with other 2D-material based electrical components to realize fully printed RC circuits, differentiators, integrators, and AC-to-DC converters onto paper, hence demonstrating the suitability of our approach for sustainable and disposable integrated circuits.

2D materials↗

Two-Stage Cryogenic HEMT-Based Amplifier for Low-Temperature Detectors

To search for dark matter candidates with masses below $\mathcal{O}$ (MeV), the SPLENDOR (Search for Particles of Light dark mattEr with Narrow-gap semiconDuctORs) experiment is developing novel narrow-bandgap semiconductors with electronic bandgaps on the order of 1–100 meV. In order to detect the charge signal produced by scattering or absorption events, SPLENDOR has designed a two-stage cryogenic HEMT-based amplifier with an estimated charge resolution approaching the single-electron level. A low-capacitance (~ 1.6 pF) HEMT is used as a buffer stage at T = 10 mK to mitigate effects of stray capacitance at the input. The buffered signal is then amplified by a higher-capacitance (~ 200 pF) HEMT amplifier stage at T = 4 K. Importantly, the design of this amplifier makes it usable with any insulating material—allowing for rapid prototyping of a variety of novel detector materials. Here, we present the two-stage cryogenic amplifier design, preliminary voltage noise performance, and estimated charge resolution of 7.2 electrons.

47 OTHER INSTRUMENTATION↗

Changing Directions: Influence of Ligand Electronics on the Directionality and Kinetics of Photoinduced Charge Transfer in Cu(I)Diimine Complexes

A key challenge to the effective utilization of solar energy is to promote efficient photoinduced charge transfer, specifically avoiding unproductive, circuitous electron-transfer pathways and optimizing the kinetics of charge separation and recombination. We hypothesize that one way to address this challenge is to develop a fundamental understanding of how to initiate and control directional photoinduced charge transfer, particularly for earth-abundant first-row transition-metal coordination complexes, which typically suffer from relatively short excited-state lifetimes. Here, in this paper, we report a series of functionalized heteroleptic copper(I)bis(phenanthroline) complexes, which have allowed us to investigate the directionality of intramolecular photoinduced metal-to-ligand charge transfer (MLCT) as a function of the substituent Hammett parameter. Ultrafast transient absorption suggests a complicated interplay of MLCT localization and solvent interaction with the Cu(II) center of the MLCT state. This work provides a set of design principles for directional charge transfer in earth-abundant complexes and can be used to efficiently design pathways for connecting the molecular modules to catalysts or electrodes and integration into systems for light-driven catalysis.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗