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The design, fabrication and performance of a TTL compatible 4-bit GaAs integrated digital-to-analog convertor with an output voltage between -2.8 V and +2.8 V are reported. This circuit has been especially designed to control the gain of power dual-gate FETs by applying a voltage on the capacitively terminated second gate.
Sixteen 30 dB 0.5 W amplifier modules were combined to satisfy the requirement for a graceful degradation. If one module fails, the output power drops by only 0.43 dB. Also, by incorporating all the gain stages within the combiner the overall combining efficiency is maximized. A 16 way waveguide divider combiner was developed to minimize the insertion loss associated with such a large corporate feed structure. Tests showed that the 16 way insertion loss was less than 0.5 dB. To minimize loss, a direct transition from waveguide to microstrip, using a finline on duroid substrate, was developed. The FETs fabricated on MBE grown material, demonstrated superior performances. For example, a 600 micrometer device was capable of 320 mW output power with 5 dB gain and 26.6% efficiency at 21 GHz. The 16 module amplifier gave 8.95 W saturated output power with 30 dB gain. The overall efficiency was 9%. The 3 dB bandwidth was 2.5 GHz. At 17.7 GHz the amplifier had 5 W output power and at 20.2 GHz it still had 4.4 W.
An 8.2-W GaAs FET amplifier with 38.6 + or - 0.5-dB gain over a 17.7-19.1-GHz frequency band has been developed. This amplifier combines the outputs of eight multistage amplifier modules utilizing a radial combiner. This state-of-the art power level has been achieved with AM/PM of less than 2 deg/dB. The third-order intermodulation products at 1-dB gain compression were 20 dBc, and variation in group delay over the frequency band was less than + or - 0.25 ns. Tests show that the amplifier is unconditionally stable and follows the graceful-degradation principle.
A novel FET-BJT combinational transistor configuration is proposed and demonstrated using discrete devices. This new transistor features fast switching, very simple drive requirement, elimination of reverse bias second breakdown, and good utilization of semiconductor chip area. Initial results indicate that power hybrid construction of the device is essential to enhance the current rating of the device.
Equivalent gate noise voltage spectra of 1-micron gate-length modulation-doped FET's with pseudomorphic InGaAs quantum-well structure have been measured for the frequency range of 0.01 Hz to 100 MHz and commpared with the noise spectra of conventional AlGaAs/GaAs MODFET's and GaAs MESFET's. The prominent generation-recombination (g-r) noise bulge commonly observed in the vicinity of 10 kHz in conventional MODFET's at 300 K does not appear in the case of the new InGaAs quantum-well MODFET. Instead, its noise spectra indicate the presence of low-intensity multiple g-r noise components superimposed on a reduced 1/f noise. The LF noise intensity in the new device appears to be the lowest among those observed in any MODFET or MESFET. The noise spectra at 82 K in the new device represent nearly true 1/f noise. This unusual low-noise behavior of the new structure suggests the effectiveness of electron confinement in the quantum well that significantaly reduces electron trapping in the n-AlGaAs, and thus eliminates the g-r noise bulge observed in conventional MODFET's.
A high-performance MODFET structure grown by MBE with the incorporation of a single quantum well In(0.15)Ga(0.85)As layer for the transport of two-dimensional electron gas has been critically examined for its thermal stability at 80 K and low-frequency noise form 0.01 to 10 to the 8th Hz. Experimental results indicate that the behavior of this device in both these respects is much superior when compared with the same behavior of conventional MODFETs. A maximum low-field carrier mobility of 29,000 sq cm/s at 80 K and an average carrier saturation velocity of 2 x 10 to the 7th cm/s at 300 K in a 1-micron gate device clearly indicate that the quality of the pseudomorphic quantum well (InGaAs) layer is either comparable or better than that of the usual GaAs buffer layer. The deep level spectra, obtained through photo-FET measurements, and the low-frequency noise spectra at different temperatures obtained for the new pseudomorphic and conventional MODFET's have clearly indicated that contributions from various deep levels present in the new structure are significantly reduced.
An all ion-implanted Schottky barrier mixer diode which has a cutoff frequency greater than 1000 GHz has been developed. This new device is planar and FET-compatible and employs a projection lithography 3-inch wafer process. A Ka-band monolithic balanced mixer based on this device has been designed, fabricated and tested. A conversion loss of 8 dB has been measured with a LO drive of 10 dBm at 30 GHz.
A voltage-controlled 8415 MHz FET oscillator stabilized by a dielectric resonator is described. The oscillator provides a linear electronic tuning range of over 3.2 MHz with a flat power output equal to +1.8 dBm (27 C nominal), a single-sideband noise to carrier ratio of -68 dBc/Hz at 1 kHz off carrier, and a frequency temperature coefficient of 0.54 part per million/C over a -24 to 75 C range. The oscillator withstood 150 krads(Si) of gamma radiation with no significant performance degradation. The overall performance of the oscillator is in many ways far superior to that of an equivalent bipolar oscillator for space applications.
This paper presents a method of modeling a solar array circuit controlled by a hexfet switch on HSPICE. HSPICE models are developed for the solar array current voltage (IV) characteristic and the IRF150 hexfet. Computer simulations are made to verify rate of current change at the load. The equivalent LC circuit for the same current control is modeled to show savings in weight and power in choosing the fet switch over an LC circuit.
Coherent mixing of optical radiation from a tunable continuous-wave dye laser and a stabilized He-Ne laser was used to generate millimeter-wave signals in GaAs FETs attached to printed-circuit millimeter-wave antennas. The generated signal was further down-converted to a 2-GHz IF by an antenna-coupled millimeter-wave local oscillator at 62 GHz. Detailed characterizations of power and S/N under different bias conditions have been performed. This technique is expected to allow signal generation and frequency-response evaluation of millimeter-wave devices at frequencies as high as 100 GHz.
A three-stage heterostructure FET monolithic amplifier has achieved a power-added efficiency of 36 percent with 200 mW output and 18 dB gain at 31 GHz. At a higher drain voltage, the output power increases to 280 mW (with 17.5 dB gain and 31 percent PAE) at a power density of 0.7 W/mm. The MMIC chip measures 2.63 x 1.35 sq mm and requires only a single drain bias and a single gate bias.
A 32-bit serial integer multiplier was designed to investigate the yield and performance of complementary heterojunction FET (CHFET) technology. This is the largest reported CHFET logic circuit. The maximum operating frequency was 500 MHz. Very low power dissipation of 3 mW was obtained at 5 MHz operation. Single-event upset (SEU) characteristics of CHFET devices and latches were also measured and indicates the potential for SEU hard circuits for space and military applications.
This viewgraph presentation provides an analysis of long-channel nanotube (NT) field effect transistors (FET) from NASA's Ames Research Center. The structure of such a transistor including the electrode contact, 1D junction, and the planar junction is outlined. Also mentioned are various characteristics of a nanotube tip-equipped scanning tunnel microscope (STM).
A new saturation current model is presented for the n-channel G4-FET, a novel 4-gate transistor.
Heavy ion testing of newly available GaN FETs from EPC were tested in March of 2012 at TAM. The EPC1010, EPC1001, EPC1012, and EPC1014 were tested for general radiation response from gold and xenon ions. Overall the devices showed radiation degradation commensurate with breakdown in isolation oxides, and similar testing by EPC and Microsemi agrees with these data. These devices were the first generation production of the device called Gen1. Gen2 parts are scheduled for later in the third quarter of FY2012
Recent testing of Enhanced Power Conversion (EPC) eGaN FET devices design for power use has shown that the devices are susceptible to Single-Event Effects (SEE) that degrade or destroy the device. The exact mechanism of the SEE is not known. The testing so far has been in the static condition, in the fully off condition, and with minimal load conditions. These conditions may not be worst case. This report presents the results of a study that tests some of the load conditions for SEE. The EPC2012 and EPC1012 were chosen for the test. The tests were performed the TAMU radiation effects facility in May and June of 2013.
Recent testing of the EPC1000 series eGaN FETs has shown sensitivity to Single Event Effects (SEE) that are destructive. These effects are most likely the failure of the very thin gate structure in HEMT architecture. EPC has recently changed the doping of the substrate to improve the performance and the SEE response. This testing compares the SEE response of both devices.
Previous testing of the Enhanced Power Conversion (EPC) eGaN FETs showed sensitivity to destructive single-event effects (SEE) effects to heavy ions. The presence of tungsten plugs in the gate area raises concerns that the device may be vulnerable to SEE from protons. Irradiation of biased and unbiased devices with heavy ion has results in some damage suspected of being due to total non-ionizing dose (TNID). Proton irradiation is a better radiation type to study this effect. This study presents the results of testing device with protons for SEE and TNID. No SEE in the EPC2012 device, the most sensitive device to SEE, were seen with 53 MeV protons at several angles. The devices continued to function after 1.5 Mrad (Si) of proton dose with only a slight shift in parameters. These results suggest that gross TNID will not be a factor in using these devices nor suffer from SEE due to protons. However, the device should be tested at with 500 MeV protons to guarantee to immunity proton SEE.