Results for “Power electronic substrate” — Page 4

NASA NTRS2000

Laser Brazing of High Temperature Braze Alloy

The Space Shuttle Main Engine (SSME) consists of 1080 conical tubes, which are furnace brazed themselves, manifolds, and surrounding structural jacket making almost four miles of braze joints. Subsequent furnace braze cycles are performed due to localized braze voids between the coolant tubes. SSME nozzle experiences extremely high heat flux (180 mW/sq m) during hot fire. Braze voids between coolant tubes may result in hot combustion gas escape causing jacket bulges. The nozzle can be disqualified for flight or result in mission failure if the braze voids exceed the limits. Localized braze processes were considered to eliminate braze voids, however, damage to the parent materials often prohibited use of such process. Being the only manned flight reusable rocket engine, it has stringent requirement on the braze process. Poor braze quality or damage to the parent materials limits the nozzle service life. The objective of this study was to develop a laser brazing process to provide quality, localized braze joints without adverse affect on the parent materials. Gold (Au-Cu-Ni-Pd-Mn) based high temperature braze alloys were used in both powder and wire form. Thin section iron base superalloy A286 tube was used as substrate materials. Different Laser Systems including CO2 (10.6 micrometers, 1kW), ND:YAG (1.06 micrometers, 4kW). and direct diode laser (808nm. 150W) were investigated for brazing process. The laser process variables including wavelength. laser power, travel speed and angle of inclination were optimized according to bead geometry and braze alloy wetting at minimum heat input level, The properties of laser brazing were compared to that of furnace brazing. Microhardness profiles were used for braze joint property comparison between laser and furnace brazing. The cooling rate of laser brazing was compared to furnace brazing based on secondary dendritic arm spacing, Both optical and Scanning Electron Microscope (SEM) were used to evaluate the microstructures of the braze materials and tube substrate. Metallography of the laser braze joint was compared to the furnace braze. SEM Energy Disperse X-Ray Spectra (EDX) and back scattered imaging were used to analyze braze alloy segregation. Although all of the laser systems, CO2, ND:YAG, and direct diode laser produced good braze joint, the direct diode laser was selected for its system simplicity, compactness and portability. Excellent laser and braze alloy coupling is observed with powder alloy compared to braze alloy wire. Good wetting is found with different gold based braze alloys. The laser brazing process can be optimized so that the adverse affect on the parent materials can be eliminated. Metallography of the laser braze joint has shown that quality braze joint was produced with laser brazing process. Penetration of the laser braze to the substrate is at neglectable level. Zero penetration is observed. Microstructure examinations shown that no observable changes of the microstructure (grain structure and precipitation) in the HAZ area between laser braze and furnace braze. Wide gaps can be laser brazed with single pass for up to 0.024 inches. Finer dendritic structure is observed in laser brazing compared with equiaxial and coarser grain of the furnace brazing microstructure. Greater segregation is also found in the furnace braze. Higher hardness of the laser braze joint comparing to furnace braze is observed due to the fast cooling rate and Finer microstructure in the laser brazing. Laser braze joint properties meet or exceed the furnace joint properties. Direct diode laser for thin section tube brazing with high temperature braze alloys have been successfully demonstrated. The laser's high energy density and precise control has shown significant advantages in reducing process heat input to the substrates and provide high quality braze joints comparing to other localized braze process such as torch, TIG, and MPTA processes. Significant cost savings can be realized particularly with localized braze comparing to a full furnace braze cycle.

Gao, Y. P.↗

NASA NTRS2011

High-Throughput Processes and Structural Characterization of Single-Nanotube Based Devices for 3D Electronics

We have developed manufacturable approaches to form single, vertically aligned carbon nanotubes, where the tubes are centered precisely, and placed within a few hundred nm of 1-1.5 micron deep trenches. These wafer-scale approaches were enabled by chemically amplified resists and inductively coupled Cryo-etchers to form the 3D nanoscale architectures. The tube growth was performed using dc plasmaenhanced chemical vapor deposition (PECVD), and the materials used for the pre-fabricated 3D architectures were chemically and structurally compatible with the high temperature (700 C) PECVD synthesis of our tubes, in an ammonia and acetylene ambient. The TEM analysis of our tubes revealed graphitic basal planes inclined to the central or fiber axis, with cone angles up to 30 deg. for the particular growth conditions used. In addition, bending tests performed using a custom nanoindentor, suggest that the tubes are well adhered to the Si substrate. Tube characteristics were also engineered to some extent, by adjusting growth parameters, such as Ni catalyst thickness, pressure and plasma power during growth.

top-down fabrication↗

NASA NTRS1990

GaAs VLSI for aerospace electronics

Advanced aerospace electronics systems require high-speed, low-power, radiation-hard, digital components for signal processing, control, and communication applications. GaAs VLSI devices provide a number of advantages over silicon devices including higher carrier velocities, ability to integrate with high performance optical devices, and high-resistivity substrates that provide very short gate delays, good isolation, and tolerance to many forms of radiation. However, III-V technologies also have disadvantages, such as lower yield compared to silicon MOS technology. Achieving very large scale integration (VLSI) is particularly important for fast complex systems. At very short gate delays (less than 100 ps), chip-to-chip interconnects severely degrade circuit clock rates. Complex systems, therefore, benefit greatly when as many gates as possible are placed on a single chip. To fully exploit the advantages of GaAs circuits, attention must be focused on achieving high integration levels by reducing power dissipation, reducing the number of devices per logic function, and providing circuit designs that are more tolerant to process and environmental variations. In addition, adequate noise margin must be maintained to ensure a practical yield.

Larue, G.↗

NASA NTRS2000

Displacement Damage in Bipolar Linear Integrated Circuits

Although many different processes can be used to manufacture linear integrated circuits, the process that is used for most circuits is optimized for high voltage -- a total power supply voltage of about 40 V -- and low cost. This process, which has changed little during the last twenty years, uses lateral and substrate p-n-p transistors. These p-n-p transistors have very wide base regions, increasing their sensitivity to displacement damage from electrons and protons. Although displacement damage effects can be easily treated for individual transistors, the net effect on linear circuits can be far more complex because circuit operation often depends on the interaction of several internal transistors. Note also that some circuits are made with more advanced processes with much narrower base widths. Devices fabricated with these newer processes are not expected to be significantly affected by displacement damage for proton fluences below 1 x 10(exp 12) p/sq cm. This paper discusses displacement damage in linear integrated circuits with more complex failure modes than those exhibited by simpler devices, such as the LM111 comparator, where the dominant response mode is gain degradation of the input transistor. Some circuits fail catastrophically at much lower equivalent total dose levels compared to tests with gamma rays. The device works satisfactorily up to nearly 1 Mrad(Si) when it is irradiated with gamma rays, but fails catastrophically between 50 and 70 krad(Si) when it is irradiated with protons.

Rax, B. G.↗

NASA NTRS2012

Finite Element Models for Electron Beam Freeform Fabrication Process

Electron beam freeform fabrication (EBF3) is a member of an emerging class of direct manufacturing processes known as solid freeform fabrication (SFF); another member of the class is the laser deposition process. Successful application of the EBF3 process requires precise control of a number of process parameters such as the EB power, speed, and metal feed rate in order to ensure thermal management; good fusion between the substrate and the first layer and between successive layers; minimize part distortion and residual stresses; and control the microstructure of the finished product. This is the only effort thus far that has addressed computer simulation of the EBF3 process. The models developed in this effort can assist in reducing the number of trials in the laboratory or on the shop floor while making high-quality parts. With some modifications, their use can be further extended to the simulation of laser, TIG (tungsten inert gas), and other deposition processes. A solid mechanics-based finite element code, ABAQUS, was chosen as the primary engine in developing these models whereas a computational fluid dynamics (CFD) code, Fluent, was used in a support role. Several innovative concepts were developed, some of which are highlighted below. These concepts were implemented in a number of new computer models either in the form of stand-alone programs or as user subroutines for ABAQUS and Fluent codes. A database of thermo-physical, mechanical, fluid, and metallurgical properties of stainless steel 304 was developed. Computing models for Gaussian and raster modes of the electron beam heat input were developed. Also, new schemes were devised to account for the heat sink effect during the deposition process. These innovations, and others, lead to improved models for thermal management and prediction of transient/residual stresses and distortions. Two approaches for the prediction of microstructure were pursued. The first was an empirical approach involving the computation of thermal gradient, solidification rate, and velocity (G,R,V) coupled with the use of a solidification map that should be known a priori. The second approach relies completely on computer simulation. For this purpose a criterion for the prediction of morphology was proposed, which was combined with three alternative models for the prediction of microstructure; one based on solidification kinetics, the second on phase diagram, and the third on differential scanning calorimetry data. The last was found to be the simplest and the most versatile; it can be used with multicomponent alloys and rapid solidification without any additional difficulty. For the purpose of (limited) experimental validation, finite element models developed in this effort were applied to three different shapes made of stainless steel 304 material, designed expressly for this effort with an increasing level of complexity. These finite element models require large computation time, especially when applied to deposits with multiple adjacent beads and layers. This problem can be overcome, to some extent, by the use of fast, multi-core computers. Also, due to their numerical nature coupled with the fact that solid mechanics- based models are being used to represent the material behavior in liquid and vapor phases as well, the models have some inherent approximations that become more pronounced when dealing with multi-bead and multi-layer deposits.

Chandra, Umesh↗

NASA NTRS1975

Exploratory study on microanalysis of thin films by backscattering techniques

Solid phase epitaxial growth of Si layers was studied by backscattering spectrometry for controllable electrical characteristics. Samples were fabricated by vacuum deposition on a thin layer of Sb before deposition of the amorphous Si layer. Analysis of the resulting SPEG layer showed that Sb was present in the SPEG layer of Si. The characteristic of the SPEG layer against the Si substrate was rectifying. A scanning microprobe picture of a cleaved sample established the presence of a depletion region more than 1 micron below the surface. Hall effect data indicated that the SPEG layer was n-type, with average free carrier concentration of about 10 to the 19th power cm/3 and average electron mobility of about 40 sq cm/Vs. SPEG with Pd silicide or Ni silicide transport layers showed fast initial transient growth regimes with slower growth in the steady state regimes.

Mayer, J. W.↗

NASA NTRSDate not supplied

A 96% Alumina based Packaging System for 500°C Test of SiC Integrated Circuits

With the development of silicon carbide (SiC) sensors and electronic devices for operation at 500°C, compatible packaging technologies are needed for long term high temperature test and deployment of these sensors and electronic devices. 96% Al2O3ceramic is an excellent electrically insulating material with acceptable dielectric constant and low dielectric loss over wide temperature and frequency ranges. This paper presents a packaging system for low power integrated circuits including a prototype 8-I/O chip-level package and printed circuit board (PCB) based on 96% Al2O3ceramic substrates and Au thick-film metallization for 500°C applications. The details related to designs of packages and PCBs, packaging materials, and specific packaging step recipes including wire -bonding and die-attach, are presented. Some test results of this prototype packaging approach applied to SiC integrated circuits at 500°C are reviewed.

High Temperature, Packaging, Alumina, Thick Film↗

NASA NTRS1987

Processing and characterization of high-efficiency

Silicon solar cells with efficiencies ranging from 17 to 17.7 percent are described. These cells were processed on low-resistivity FZ substrates using techniques recently developed for high efficiency terrestrial solar cells. Preliminary results indicate that the high efficiency cell is more susceptible to radiation damage in that it retains a smaller proportion of its original power output when compared to conventional space cells after exposure to 5 times 10 to the 14th power 1 MeV electrons. However, the cell does maintain a greater overall power output than the conventional cells to which it was compared. Furthermore, this cell does not demonstrate post-electron irradiation photon decay as has been described for cells processed on 1-10 ohm-cm float zone silicon.

Crotty, G. T.↗

NASA NTRS2012

Method of manufacturing a light emitting, photovoltaic or other electronic apparatus and system

The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.

Ray, William Johnstone↗

NASA NTRS2014

Method of Manufacturing a Light Emitting, Photovoltaic or Other Electronic Apparatus and System

The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.

Ray, William Johnstone↗

NASA NTRS2014

Method of Manufacturing a Light Emitting, Photovoltaic or Other Electronic Apparatus and System

The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.

Ray, William Johnstone↗

NASA NTRSDate not supplied

A 96% Alumina based Packaging System for 500°C Test of SiC Integrated Circuits

With the development of silicon carbide (SiC) sensors and electronic devices for operation at 500°C, compatible packaging technologies are needed for long term high temperature test and deployment of these sensors and electronic devices. 96% Al2O3 ceramic is an excellent electrically insulating material with acceptable dielectric constant and low dielectric loss over wide temperature and frequency ranges. This paper presents a packaging system for low power integrated circuits including a prototype 8-I/O chip-level package and printed circuit board (PCB) based on 96% Al2O3 ceramic substrates and Au thick-film metallization for 500°C applications. The details related to designs of packages and PCBs, packaging materials, and specific packaging step recipes including wire - bonding and die-attach, are presented. Some test results of this prototype packaging approach applied to SiC integrated circuits at 500oC are reviewed.

high temperature↗

NASA NTRS1994

Nucleation, Growth, and Strain Relaxation of Lattice-Mismatched III-V Semiconductor Epitaxial Layers

We have investigated the early stages of evolution of highly strained 2-D InAs layers and 3-D InAs islands grown by metal-organic chemical vapor deposition (MOCVD) on (100) and (111) B GaAs substrates. The InAs epilayer / GaAs substrate combination has been chosen because the lattice-mismatch is severe (approx. 7.20%), yet these materials are otherwise very similar. By examining InAs-on-GaAs composites Instead of the more common In(x)Ga(1-x)As alloy, we remove an additional degree of freedom (x) and thereby simplify data interpretation. A matrix of experiments is described in which the MOCVD growth parameters -- susceptor temperature, TMIn flux, and AsH3 flux -- have been varied over a wide range. Scanning electron microscopy, atomic force microscopy, transmission electron microscopy, and electron microprobe analysis have been employed to observe the thin film surface morphology. In the case of 3-D growth, we have extracted activation energies and power-dependent exponents that characterize the nucleation process. As a consequence, optimized growth conditions have been identified for depositing approx. 250 A thick (100) and (111)B oriented InAs layers with relatively smooth surfaces. Together with preliminary data on the strain relaxation of these layers, the above results on the evolution of thin InAs films indicate that the (111)B orientation is particularly promising for yielding lattice-mismatched films that are fully relaxed with only misfit dislocations at the epilayer / substrate interface.

Welser, R. E.↗

NASA NTRS1984

Free-standing thin film Ge single crystals grown by plasma-enhanced chemical vapor deposition

The films, which are approximately 10 microns in thickness, are grown epitaxially on polished (100) NaCl substrates at 450 C by plasma enhanced chemical vapor deposition. Upon cooling, the films are separated from the substrate by differential shear stress, leaving free-standing films of Ge which can be handled. Growths are attained by nucleating at minimum plasma power for very brief intervals and then raising the power to 65 W to increase the growth rate to approximately 10 microns/h. It is found that substrate exposure to the plasma at too high a power for too long a time sputters and erodes the surface, thereby substantially degrading the nucleation process and the ultimate growths. It is noted that the free-standing films are visually specular and exhibit a high degree of crystalline order when examined by X-ray diffraction. Auger electron spectroscopy and energy dispersive analysis of X-rays reveal no detectable bulk contamination.

Outlaw, R. A.↗

NASA NTRS1986

Effect of hard particle impacts on the atomic oxygen survivability of reflector surfaces with transparent protective overcoats

Silver mirror samples with protective coatings were subjected to a stream of 27 microns alumina particles to induce pinhole defects. The protective coating consisted of a layer of aluminum dioxide over silver followed by a layer of silicon dioxide over the alumina. Samples were prepared on both graphite-epoxy composite and fused quartz substrates. After exposure to the hard particle stream, the samples were exposed to an oxygen plasma environment in a laboratory plasma asher. The effects of both the hard particles and the oxygen plasma were documented by both reflectance measurements and scanning electron microscopy. The results indicated that oxidative damage to the silver reflecting layer continues beyond that of the erosively exposed silver. Oxidative undercutting of the silver layer and graphite-epoxy substrate continues in undamaged areas through adjacent, particle damaged defect sites. This may have implications for the use of such mirrors in a space station solar dynamic power system.

Gulino, D. A.↗

NASA NTRS1987

Effect of hard particle impacts on the atomic oxygen survivability of reflector surfaces with transparent protective overcoats

Silver mirror samples with protective coatings were subjected to a stream of 27 microns alumina particles to induce pinhole defects. The protective coating consisted of a layer of aluminum dioxide over silver followed by a layer of silicon dioxide over the alumina. Samples were prepared on both graphite-epoxy composite and fused quartz substrates. After exposure to the hard particle stream, the samples were exposed to an oxygen plasma environment in a laboratory plasma asher. The effects of both the hard particles and the oxygen plasma were documented by both reflectance measurements and scanning electron microscopy. The results indicated that oxidative damage to the silver reflecting layer continues beyond that of the erosively exposed silver. Oxidative undercutting of the silver layer and graphite-epoxy substrate continues in undamaged areas through adjacent, particle damaged defect sites. This may have implications for the use of such mirrors in a space station solar dynamic power system.

Gulino, Daniel A.↗

NASA NTRS2007

Synthesis of Poly-Silicon Thin Films on Glass Substrate Using Laser Initiated Metal Induced Crystallization of Amorphous Silicon for Space Power Application

Poly-silicon thin films on glass substrates are synthesized using laser initiated metal induced crystallization of hydrogenated amorphous silicon films. These films can be used to fabricate solar cells on low cost glass and flexible substrates. The process starts by depositing 200 nm amorphous silicon films on the glass substrates. Following this, 200 nm of sputtered aluminum films were deposited on top of the silicon layers. The samples are irradiated with an argon ion cw laser beam for annealing. Laser power densities ranging from 4 to 9 W/cm2 were used in the annealing process. Each area on the sample is irradiated for a different exposure time. Optical microscopy was used to examine any cracks in the films and loss of adhesion to the substrates. X-Ray diffraction patterns from the initial results indicated the crystallization in the films. Scanning electron microscopy shows dendritic growth. The composition analysis of the crystallized films was conducted using Energy Dispersive x-ray Spectroscopy. The results of poly-silicon films synthesis on space qualified flexible substrates such as Kapton are also presented.

Abu-Safe, Husam H.↗

NASA NTRS2011

Carbon Nanotube-Based Structural Health Monitoring Sensors

Carbon nanotube (CNT)-based sensors for structural health monitoring (SHM) can be embedded in structures of all geometries to monitor conditions both inside and at the surface of the structure to continuously sense changes. These CNTs can be manipulated into specific orientations to create small, powerful, and flexible sensors. One of the sensors is a highly flexible sensor for crack growth detection and strain field mapping that features a very dense and highly ordered array of single-walled CNTs. CNT structural health sensors can be mass-produced, are inexpensive, can be packaged in small sizes (0.5 micron(sup 2)), require less power than electronic or piezoelectric transducers, and produce less waste heat per square centimeter than electronic or piezoelectric transducers. Chemically functionalized lithographic patterns are used to deposit and align the CNTs onto metallic electrodes. This method consistently produces aligned CNTs in the defined locations. Using photo- and electron-beam lithography, simple Cr/Au thin-film circuits are patterned onto oxidized silicon substrates. The samples are then re-patterned with a CNT-attracting, self-assembled monolayer of 3-aminopropyltriethoxysilane (APTES) to delineate the desired CNT locations between electrodes. During the deposition of the solution-suspended single- wall CNTs, the application of an electric field to the metallic contacts causes alignment of the CNTs along the field direction. This innovation is a prime candidate for smart skin technologies with applications ranging from military, to aerospace, to private industry.

Wincheski, Russell↗