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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 73 records · Page 4

A scalable superconducting nanowire memory array with row–column addressing

Scalable superconducting memory is required for the development of low-energy superconducting computers and fault-tolerant quantum computers. Conventional superconducting logic-based memory cells possess a large footprint that limits scaling; nanowire-based superconducting memory cells, although more compact, have high error rates, which hinders integration into large arrays. Here we report a 4 × 4 superconducting nanowire memory array that is designed for scalable row–column operations and has a functional density of 2.6 Mbit cm −2 . Each memory cell is based on a nanowire loop consisting of two temperature-dependent superconducting switches and a variable kinetic inductor. The arrays operate at 1.3 K, where we implement and characterize multiflux quanta state storage and destructive read-out. By optimizing the write- and read-pulse sequences, we minimize bit errors and maximize operating margins. We achieve a minimum bit error rate of 10 −5 . Here, we also use circuit-level simulations to understand the memory cell’s dynamics, performance limits and stability under varying pulse amplitudes.

Electrical and electronic engineering↗

A Two-Stage Quantum Reinforcement Learning Method for Multi-Objective Transmission Switching

Multi-objective transmission switching (MO-TS) problems involve the strategic reconfiguration of network topology to simultaneously optimize multiple objectives. As the system scale increases, finding feasible solutions becomes increasingly challenging due to the problem's nonlinearity and high computational complexity. To address these challenges, this paper proposes a two-stage quantum reinforcement learning method that leverages potential quantum advantages for MO-TS. In the first stage, candidate switching lines are identified using a graph-theoretical approach to reduce the problem's dimensionality. The second stage introduces a quantum-classical reinforcement learning framework, where a learnable measurement-based CNN-ResVQC architecture is developed to effectively reduce the input dimension for quantum processing, mitigate vanishing gradients, and enhance trainability while improving the quantum circuit's flexibility in modeling complex decision policies for MO-TS. Numerical studies on IEEE 14-bus, 57-bus, and 118-bus systems demonstrate that the proposed algorithm achieves superior training stability and faster convergence with approximately 1% of the network parameters required by classical algorithms, highlighting its effectiveness, efficiency, and scalability. Furthermore, the practicality is validated through its stable convergence under three common quantum noise channels.

99 GENERAL AND MISCELLANEOUS↗

Low‐Volume Cores for Fabrication of Compact, Versatile, and Intelligent Soft Systems

Abstract This study introduces the low‐volume core (LVC) fabrication method, which enables the monolithic molding of compact, complex, versatile, and intelligent soft robotic systems. This method uses thin and flexible thermoplastic sheets to mold internal chambers in soft fluidic actuators, valves, and circuits. The LVC fabrication method creates low‐volume networks in soft actuators (LV‐net actuators) that can be made with compact and complex geometries, enabling both low actuation volume input and multi‐degree‐of‐freedom actuators. LVC fabrication can also be used for compact, completely soft, and monolithic logic components (valves with low‐volume core, also called as LV valves) to provide directional resistance as well as a switching mechanism that enables fluidic logic in soft systems. The compatibility of the fabrication methods for both soft actuators and valves facilitates the creation of compact, integrated, and versatile soft robotic systems with embodied intelligence. This study introduces two examples of such intelligent soft robotic systems that integrate both LV‐net actuators and LV valves to demonstrate capability for complex system fabrication.

Yu, Qifan↗

SMART SiC Power ICs: Scalable, Manufacturable, and Robust Technology for SiC Power Integrated Circuits (Final Technical Report)

This collaborative project was initiated with the goal of developing Scalable, Manufacturable, and Robust Technology for SiC Power Integrated Circuits (SMART SiC Power ICs). In pursuit of this objective, innovative designs and fabrication processes were implemented, enabling the development of large-scale (>1 cm²) SiC Complementary Metal-Oxide-Semiconductor (CMOS) integrated circuits and high-voltage (400–600 V) lateral power MOSFETs (HV-LDMOS) on 150 mm 4H-SiC substrates. The resulting SMART SiC Power ICs are tailored to support a wide range of applications requiring diverse voltage and power levels, including automotive systems, industrial equipment, electronic data processing, energy harvesting, and power conditioning. To achieve the proposed ‘SMART’ technology for SiC ICs, the team focused on 1) the Development of highly scalable CMOS (with high channel mobilities for n-type and p-type MOSFETs), LDMOS (~600V, 10A rated), and IC technologies, 2) Establishment of a manufacturable process baseline in a production-grade-, 150mm, SiC fabrication facility, and 3) Demonstration of SMART SiC ICs. The project initially comprised of fabricating 5 lots. In lot 1 monolithic integration using a single process was achieved. Here, we were able to successfully accomplish Integrated HV NMOSFET with LV CMOS on N-epi/N+ Substrate. The HV NMOS demonstrated a Breakdown Voltage (BV) more than 600V. Circuit demonstration of CMOS was also another achievement from this lot. In lot 2, priority was in place for isolation and integration. Here we addressed the isolation concerns and integrated the HV NMOS and LV CMOS using the N-epi/P-epi/N+ substrate. Similar to the lot 1, we were able to achieve a BV of 600 V for HV NMOS. Optimized gate oxide process with high channel mobilities, better gate oxide reliability, development of SPICE models, successful ohmic process development, novel wafer area saving design layouts, P+ isolation schemes with channeling implantations and high temperature operational circuits demonstrations are some of the key highlights from lot 1 and lot2. In lot 3, discrete device performances of HV NMOS with a BV ~700V and reliable LV CMOS performances were achieved. Also, novel architectural solutions were successfully implemented to suppress the electric field crowding at the gate oxide for reliable operations. In lot 4, half bridge power driver ICs with a conversion efficiency of (target 90% to 95%) in the 1-5MHz switching frequency range for output power between 25 W to 3 kW have been included in. However, due to the unfortunate events of sudden foundry shutdown (SiCamore Semi) the processing of lot 4 wafers came to a complete stop (January 2024). Arrangements have recently been made to shift the fabrication to another foundry, General Electric Aerospace. The fabrication process now on course (as of December 2024). Characterizations are delayed due to this unfortunate circumstance. The proposed trench architectural-based devices and ICs (lot 5) underwent modifications from the original project proposal. This change was necessitated by limitations in the availability of trench-based processes at commercial production-grade fabrication facilities in the US. Apart from above achievements, a Process Development Kit (PDK) was successfully developed for planar type SiC CMOS/LDMOS.

42 ENGINEERING↗

A Sensitivity-driven Wide Area Protection (SWAP) Coordination Tool for High Penetration of Inverter-based Resources (IBR)

Traditionally, power system generation sources have been composed of synchronous generators, of which the fault current behavior is understood with minimal differences between generation size and types due to the physics of their construction. Present protection schemes and modeling methods are based upon these understood characteristics. Most renewable generation is composed of inverter-based resources (IBR), in which fault current is determined by switching control software and hardware limitations, each of which can vary between manufacturers and even between models of the same manufacturer. The resulting fault current is low in magnitude, low in negative-sequence current, unpredictable phase angles, and is a challenge to model. These characteristics also result in a challenge to traditional protection schemes and fault simulation software. To address several of these concerns, the project has the following goals: 1. Improve IBR models: Improve IBR models used in short circuit (SC) programs to accurately capture the response of IBRs at the bulk power system (BPS) level for fault and protection studies. 2. Develop automation tool: Develop an automation tool that allows engineers to identify protection coordination and sensitivity issues by performing SC and protection coordination studies in a high IBR-penetrated grid by applying variations to the IBR models, faults, contingencies, etc. 3. Develop schemes: Develop new protection mitigation solution schemes that complement the existing protection systems to ensure safe operation of the BPS with higher IBR penetration levels. The project team did not achieve this final goal, as the Department of Energy (DOE) stopped the project early due to changes in DOE funding priorities. The termination notice came at the beginning of the final project phase, while the team was identifying and beginning to investigate protection issues. It should be noted that the team discussed a 100% penetration scenario. However, this scenario would require the use of grid-forming IBR models that are not presently available. Since developing these models requires additional effort, the 100% penetration scenario was not pursued during this project. In the future, developing the methodology and models for the 100% scenario could benefit the industry.

14 SOLAR ENERGY↗

A Unified Wireless Charger, On-Board Charger, and Auxiliary Power Module for Electric Vehicle Charging Systems

This paper proposes a unified electric vehicle (EV) charging architecture that integrates wireless power transfer (WPT), an on-board charger (OBC), and an auxiliary power module (APM) within a single architecture. By sharing a multi-functional magnetic structure and active switch bridges, the proposed topology eliminates additional transformers and converter stages, reducing hardware complexity and improving power density. A multipurpose magnetic design achieves magnetic decoupling among the WPT, OBC, and APM functions while maintaining the required coupling for each mode. Through electrical reconfiguration, the WPT operates as an LCC-S converter, whereas the OBC and APM operate as dual-active-bridge (DAB) converters. The system supports multiple operating modes, including simultaneous high-voltage and lowvoltage battery charging. Finite-element and circuit simulations verify the magnetic characteristics and system operation, demonstrating the feasibility of the proposed unified architecture for EV charging applications.

Jo, Cheolhui [ORNL] (ORCID:0000000322692434)↗

Surface-Functionalized, Two-Dimensional Polymer Electrochromic Layers as Ultrafast, Multi-State Infrared Optical Gates

Electrochromic devices have widespread application potential, but the currently available switching speeds limit broad real-world implementation of this technology. Here, we report surface-engineered two-dimensional polymers with ionophilic pores that offer unprecedented switching speeds in solid-state, two-terminal, electrochromic devices. In particular, we demonstrate that a crystalline donor–acceptor 2DP functionalized with ethylene glycol oligomers exhibits multistate infrared absorption that is 4× faster (t c = 320 ms) with 3× coloration efficiency (491 cm 2 C –1 ) compared to an alkyl functionalized 2DP constructed from the same chromophores. The functionalized nanoporous surfaces enable rapid switching in these materials under either oxidative or reductive conditions, allowing us to access a range of robust, stable optical responses in a single electrochromic layer. These attributes led us to leverage surface-functionalized 2DPs as multistate infrared logic gates. Collectively, this work demonstrates that surface engineering of nanoporous crystalline lattices is a promising approach to co-optimize the electronic and ionic conductivities required to achieve rapidly switchable electrochromic layers. Beyond speed and efficiency, the demonstration of multistate infrared characteristics shows that electrochromic frameworks are useful in integrated optoelectronic circuits. This positions surface-engineered 2DPs as improved electrochromic coatings and a new material platform for photonic information processing and adaptive devices.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Enhancement-Mode GaN Monolithic Bidirectional Switch With Breakdown Voltage Over 3.3 kV

Here, this work demonstrates a GaN enhancement-mode monolithic bidirectional switch (MBDS) with breakdown voltage (BV) higher than 3.3 kV in both polarities. This MBDS is realized on a dual p-GaN gate high electron mobility transistor (HEMT) platform on sapphire substrate. It features a novel dual junction termination extension design for electric field management, which is built on the p-GaN layer in the gate stack and does not require epitaxial regrowth. The GaN MBDS exhibits symmetric on-state characteristics in both directions with a threshold voltage (V th ) of 0.6 V and a low specific on-resistance (R on,sp ) of 5.6 m Ω · cm2. This device presents the highest BV, as well as one of the best BV and R on,sp trade-offs, in all the reported MBDS devices. The R on,sp is lower than the performance limit of conventional BDS realized by two discrete devices. This 3.3 kV GaN MBDS opens the door for developing new circuit topologies and advancing system performance in medium-voltage power electronics.

42 ENGINEERING↗

Materials Selection Principles for Designing Electro‐Thermal Neurons

Artificial neurons exhibiting volatile threshold switching and action potential‐like oscillations are crucial for brain‐inspired computing. While Complimentary Metal‐Oxide‐Semiconductor (CMOS)‐based strategies require hundreds of transistors to simulate each neuron, neuronal oscillations arise spontaneously in individual electro‐thermal devices due to nonlinearities like the Mott transition in VO 2 . Despite improved understanding of the physics, quantitative connections between neuronal performance and material properties remain under‐explored, preventing predictive neuron design and rational materials selection. In this work, a physics‐aware forward design methodology is developed for interrogating a wide palette of materials with properties varying by orders of magnitude, and their performance (high frequency, high dynamical reconfigurability and low power) under external circuit and device geometry constraints is assessed. The space of viable materials is identified to be much larger than previously recognized, with candidates from a range of materials classes, including Ge, GaP and MoS 2 . CMOS‐compatible performance (such as 100 GHz oscillating frequencies) can be achieved with CMOS‐compatible node sizes (≈10 nm). Finally, combinations of material properties yielding desired neuronal performance under uncertain design constraints are considered. This work solidifies forward design principles for electro‐thermal neuron devices, a necessary pre‐condition for inverse design from desired neuronal performance to required materials properties.

compact model↗

Low loss fiber-coupled volumetric interconnects fabricated via direct laser writing

Photonic integrated circuits (PICs) are vital for high-speed data transmission. However, optical routing is limited in PICs composed of only one or a few stacked planes. Further, coupling losses must be low in deployed systems. Previously, we developed the subsurface controllable refractive index via beam exposure (SCRIBE) technique to write accurate 3D gradient refractive index (GRIN) profiles within a mesoporous silica scaffold. Here, we apply SCRIBE to fabricate low loss, broadband, polarization insensitive, fiber-coupled, single-mode volumetric interconnects that include waveguides traversing arbitrary 3D paths. By seamlessly integrating mode-matching subsurface lenses and GRIN waveguide tapers, calibrating for positional writing errors, implementing multipass exposure, automating alignment, and switching to antireflection coated fibers, we reduced the insertion loss for a fiber-PIC-fiber interconnect from 50 to 2.14 dB, or 1.47 dB, excluding the fiber array’s loss. Further, we establish an upper bound of 0.45 dB loss per coupler. We report quality factors of 27,000 and 77,000 and bending losses of 6 and 3 dB/cm for 15 and 30 µm radii microrings, respectively. We also demonstrate Bézier escalators, polarization-rotating and polarization-splitting interconnects, and a seven-channel 25 µm pitch volumetric interconnect. The SCRIBE platform presents a clear path toward realizing 3D PICs with unique functionality.

Optics↗

A Generic and Multifunctional Electromagnetic Transient Model for Grid-Following Inverters

This article presents a generic and multi-functional electromagnetic transient (EMT) dynamic model of grid following (GFL) inverter-based resource (IBR) using the PSCAD software platform. The features of the developed model includes the flexibility in selecting various types and combinations of DC sources covering PV modules, battery modules, ideal DC source module, as well as flexibility in selecting either switched or averaged model of inverter. This model also covers exhaustive lists of controller logic covering open-loop/closed-loop PQ dispatch control, DC voltage and AC terminal voltage control along with the conventional current control designed in dq-domain, ate- domain and positive-negative sequence domain. Moreover, this model is equipped with the flexibility in selecting various types of current limiting schemes that includes saturation-based as well as latching-based current limiter, anti-windup protection. Moreover, the EMT model is agnostic to the MVA rating and is suitable for interfacing transmission systems by being complaint with the IEEE Std. 2800. The generality in the power circuits and the multi-functional options in operation and control of the developed EMT model makes it suitable for both academia and industry to study various power system aspects not limited to but such as fault behavior of GFL IBR and impacts on protection system, transient stability of a system interfaced with large number of GFL IBRs etc.

14 SOLAR ENERGY↗

A Generic and Multi-Functional Electromagnetic Transient Model for Grid-Following Inverter: Preprint

This article presents a generic and multi-functional electromagnetic transient (EMT) dynamic model of grid following (GFL) inverter-based resource (IBR) using the PSCAD TM software platform. The features of the developed model includes the flexibility in selecting various types and combinations of DC sources covering PV modules, battery modules, ideal DC source module, as well as flexibility in selecting either switched or averaged model of inverter. This model also covers exhaustive lists of controller logic covering open-loop/closed-loop PQ dispatch control, DC voltage and AC terminal voltage control along with the conventional current control designed in dq-domain, aB- domain and positive-negative sequence domain. Moreover, this model is equipped with the flexibility in selecting various types of current limiting schemes that includes saturation-based as well as latching-based current limiter, anti-windup protection. Moreover, the EMT model is agnostic to the MVA rating and is suitable for interfacing transmission systems by being complaint with the IEEE Std. 2800. The generality in the power circuits and the multi-functional options in operation and control of the developed EMT model makes it suitable for both academia and industry to study various power system aspects not limited to but such as fault behavior of GFL IBR and impacts on protection system, transient stability of a system interfaced with large number of GFL IBRs etc.

grid following inverter↗

Aluminum Boron Nitride Ferroelectric Field-Effect Transistors With ZnO Semiconductor Channel

The discovery of ferroelectricity in hafnium zirconium oxide (HfxZr 1−x O2) and related fluorite materials has spurred interest in ferroelectric devices suitable for integration with silicon integrated circuits (ICs), especially those that can be embedded in the back-end-of-line (BEOL) process. More recently, ferroelectricity has been found in wurtzite aluminum nitride-based materials, such as scandium and boron-doped aluminum nitride (Al 1−x ScxN and Al 1−x BxN). Although these materials currently have undesirably large coercive electric fields, and small breakdown electric field-to-coercive electric field ratio, their low processing temperatures and large remanent polarization offer intriguing possibilities for device applications. Furthermore, we report ferroelectric field-effect transistors (FeFETs) with a 15 nm thick Al0.88B0.12N layer and an 11 nm ZnO semiconductor channel, achieving a memory window >1 V and switching voltages ( V switch ) <±10 V.

42 ENGINEERING↗

On-demand nanoengineering of in-plane ferroelectric topologies

Hierarchical assemblies of ferroelectric nanodomains, so-called super-domains, can exhibit exotic morphologies that lead to distinct behaviours. Controlling these super-domains reliably is critical for realizing states with desired functional properties. Here we reveal the super-switching mechanism by using a biased atomic force microscopy tip, that is, the switching of the in-plane super-domains, of a model ferroelectric Pb 0.6 Sr 0.4 TiO 3 . We demonstrate that the writing process is dominated by a super-domain nucleation and stabilization process. A complex scanning-probe trajectory enables on-demand formation of intricate centre-divergent, centre-convergent and flux-closure polar structures. Correlative piezoresponse force microscopy and optical spectroscopy confirm the topological nature and tunability of the emergent structures. The precise and versatile nanolithography in a ferroic material and the stability of the generated structures, also validated by phase-field modelling, suggests potential for reliable multi-state nanodevice architectures and, thereby, an alternative route for the creation of tunable topological structures for applications in neuromorphic circuits.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

Electric Drive Technologies Consortium (EDTC)/ Cost competitive, high-Performance, highly Reliable (CPR) Power Devices on 4H-SiC (Final Report)

4H-Silicon carbide (4H-SiC) is a wide bandgap semiconductor that offers superior material properties over silicon, including higher critical electric field, thermal conductivity, and electron saturation velocity. These advantages make 4H-SiC highly attractive for high-voltage, high-efficiency power electronics. However, realizing the full potential of SiC requires device technologies that are not only high-performing but also manufacturable and reliable under real-world operating conditions. This report summarizes the outcomes of a five-year R&D effort funded by the U.S. Department of Energy (DOE) under the Electric Drive Technologies Consortium (EDTC), focused on developing cost-competitive, high-performance, and highly reliable (CPR) power devices on 4H-SiC substrates. The program targeted scalable and manufacturable 1.2 kV-class SiC MOSFETs optimized for next-generation electric vehicles, renewable energy systems, and industrial power conversion. The project delivered transformative advancements in SiC power device performance and ruggedness. Particularly, Specific on-resistance (R on,sp ) was reduced by up to 37%, from ~4.0 m$\Omega \cdot$cm 2 in earlier designs to an industry-leading 2.40 m$\Omega \cdot$cm 2 , driven by optimized doping, refined JFET widths, and layout engineering. Breakdown voltages (BV) exceeded 1600 V, marking improvement over legacy baselines, and demonstrating the robustness of newly implemented junction profiles and edge terminations. Short-circuit withstand time (SCWT) saw a remarkable 4$\times$ increase, from ~2 $\mu$s to over 8 $\mu$s, achieved through the successful deployment of deep P-well structures (~1.8–2.0 $\mu$m) via channeling implantation. This innovative process breakthrough enabled precise junction formation without MeV-class implantation tools, reduced leakage under high field stress, and allowed even the shortest-channel devices (down to 0.3 $\mu$m) to achieve both high BV and excellent ruggedness—breaking the traditional trade-off between conduction efficiency and blocking capability. Several novel architectures pushed the performance envelope further. JBSFETs—featuring embedded Schottky portions—eliminated bipolar degradation and drastically reduced third-quadrant leakage, while Ladder MOSFETs introduced a clever orthogonal conduction path that achieved a 15.4% reduction in R on,sp over standard linear designs. Switching performance reached new benchmarks: short-channel devices showed a 31% reduction in total switching energy compared to 0.5 $\mu$m counterparts, while maintaining manageable gate drive requirements. Layout-optimized structures not only improved transconductance but also accelerated switching transitions, pointing to real-world benefits in converter-level efficiency. The devices also passed rigorous reliability validation. Stress-tested across TDDB, HTGB, HTRB, HVP, and burn-in, the devices screened under 30 V/10 hr and 43 V/1 s protocols consistently exhibited tighter lifetime distributions and long-term oxide robustness. These screening techniques proved effective in identifying latent defects and ensuring deployment-grade reliability. Meanwhile, advanced 3D TCAD simulations revealed and resolved electric field hotspots—particularly in HEXFET corners—where fields exceeding 4.8 MV/cm were mitigated through geometry-aware layout corrections. Overall, the results of this project demonstrate a manufacturable and scalable SiC power device platform that addresses key DOE performance targets for efficient, robust, and reliable 1.2kV 4H-SiC Power Devices. The developed technologies represent a meaningful step forward in the commercial readiness of high-voltage SiC solutions and provide a strong foundation for continued advancement in wide bandgap power electronics.

42 ENGINEERING↗

Electrical Control of Magnetic Resonance in Phase Change Materials

Metal–insulator transitions (MITs) in resistive switching materials can be triggered by an electric stimulus that produces significant changes in the electrical response. When these phases have distinct magnetic characteristics, dramatic changes in the spin excitations are also expected. The transition metal oxide La 0.7 Sr 0.3 MnO 3 (LSMO) is a ferromagnetic metal at low temperatures and a paramagnetic insulator above room temperature. When LSMO is in its metallic phase, a critical electrical bias has been shown to lead to an MIT that results in the formation of a paramagnetic resistive barrier transverse to the applied electric field. Using spin-transfer ferromagnetic resonance spectroscopy, we show that even for electrical biases less than the critical value that triggers the MIT, there is magnetic phase separation, with the spin-excitation resonances varying systematically with applied bias. Therefore, voltage-triggered MITs in LSMO can alter magnetic resonance characteristics, offering an effective method for tuning synaptic weights in neuromorphic circuits.

36 MATERIALS SCIENCE↗

Spatial quantum-interference landscapes of multi-site-controlled quantum dots coupled to extended photonic cavity modes

Abstract A compact platform to integrate emitters in a cavity-like support is to embed quantum dots (QDs) in a photonic crystal (PhC) structure, making them promising candidates for integrated quantum photonic circuits. The emission properties of QDs can be modified by tailored photonic structures, relying on the Purcell effect or strong light-matter interactions. However, the effects of photonic states on spatial features of exciton emissions in these systems are rarely explored. Such effect is difficult to access due to random positions of self-assembled QDs in PhC structures, and the fact that quantum well excitons’ wavefunctions resemble photonic states in a conventional distributed Bragg reflector cavity system. In this work, we instead observe a spatial signature of exciton emission using site-controlled QDs embedded in PhC cavities. In particular, we observe the detuning-dependent spatial repulsion of the QD exciton emissions by polarized imaging of the micro-photoluminescence, dependent on the controlled QD’s position in a spatially extended photonic pattern. The observed effect arises due to the quantum interference between QD decay channel in a spatially-extended cavity mode. Our findings suggest that integration of site-controlled QDs in tailored photonic structures can enable spatially distributed single-photon sources and photon switches.

Physics↗

Exploring Domain-Wall Pinning in Ferroelectrics via Automated High-Throughput Atomic Force Microscopy

Domain-wall dynamics in ferroelectric materials are strongly position-dependent, since each polar interface is locked into a unique local microstructure. This necessitates spatially resolved studies of wall pinning using scanning-probe microscopy techniques. The pinning centers and pre-existing domain walls are usually sparse within the image plane, precluding the use of dense hyperspectral imaging modes and requiring time-consuming human experimentation. Here, a large-area epitaxial PbTiO 3 film on cubic KTaO 3 was investigated to quantify the electric-field-driven dynamics of the polar–strain domain structures using ML-controlled automated piezoresponse force microscopy. Analysis of 1500 switching events reveals that domain-wall displacement depends not only on field parameters but also on the local ferroelectric–ferroelastic configuration. For example, twin boundaries in polydomains regions, like a 1 – /c+ ∥ a 2 – /c – , stay pinned up to a certain level of bias magnitude and change only marginally as the bias increases from 20 to 30 V, whereas single-variant boundaries, like the a 2 + /c + ∥ a 2 – /c – stack, are already activated at 20 V. These statistics on the possible ferroelectric and ferroelastic wall orientations, together with the automated high-throughput AFM workflow, can be distilled into a predictive map that links domain configurations to pulse parameters. Here, this microstructure-specific rule set forms the foundation for the design of ferroelectric memories.

automated scanning probe microscopy↗