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Are Current SEE Test Procedures Adequate for Modern Devices and Electronics Technologies?

Believe it or not, this has been a simplistic look at starting a checklist for SEE testing. Given a memory that has 68 operating modes, when a SEU occurs that changes the mode, just how do you determine what's going on? Laser and microbeam tests can help, but not easily for modern packaged devices. Expanding this approach to other more complex devices such as ADCs or processors as well as analog devices should be considered. The recommendation is to use the existing text standards as the starting point. Just make your own checklist for the device/technology/issues being considered. At HEART 2007, we presented some of the burgeoning challenges associated with single event effect(SEE) testing of modern commercial memories: a) Package, device complexity, test fixture, and data analysis issues were discussed; b) "Complete" SEE Characterization would take 15 years; c) Qualification test costs have a greater than 4 times increase over the last decade. In this talk, we continue to explore the roles of technology with an emphasis on the existing SEE Test Procedures and some of the concerns related to modern devices. The primary objective of the briefing is to provide some overarching guidance concerning the many considerations involved in the formulation of a SEE test plan provided in a " Checklist" format.we note that there is no such thing as a complete check list and that the best approach is to develop a flexible test plan that takes into account the device type and functions, the device technology, circuit and package design, and, of course, test facility and beam characteristics.

LaBel, Kenneth A.

Mechanisms of Heavy Ion-Induced Single Event Burnout in 4H-SiC Power MOSFETs

This describes the mechanisms behind the failure of 4H-SiC Power MOSFETs when struck by a heavy ion. The modeled device is designed to simulate a commercially available 1200 V power MOSFET and the ion simulated is a silver ion with a Linear Energy Transfer of 46 MeV-cm2/mg commonly used in single event effect (SEE) testing. The device is shown in simulation to fail near 500 V, which is in close agreement to experiments. These simulations go to show that the failure of SiC MOSFET occurs near the interface between the epi and substrate layers due to the rapid increase of the electric field in that region and destruction of the device from impact ionization. From this, two designs were proposed and investigated that would help to mitigate the electric field in these regions and improve the device's tolerance to single-event burnout (SEB). The new designs increased the voltage at which SEB occurs from 500 V to over 900 V and increased the Ron,sp by only 5%.

Mcpherson, Joseph A.

Update on parts SEE suspectibility from heavy ions

JPL and the Aerospace Corporation have collected a fourth set of heavy ion single event effects (SEE) test data. Trends in SEE susceptibility (including soft errors and latchup) for state-of-the-art parts are displayed. All data are conveniently divided into two tables: one for MOS devices, and one for a shorter list of recently tested bipolar devices. In addition, a new table of data for latchup tests only (invariably CMOS processes) is given.

Nichols, D. K.

Overview of Device SEE Susceptibility from Heavy Ions

A fifth set of heavy ion single event effects (SEE) test data have been collected since the last IEEE publications (1,2,3,4) in December issues for 1985, 1987, 1989, and 1991. Trends in SEE susceptibility (including soft errors and latchup) for state-of-the-art parts are evaluated.

Nichols, D. K.

Xilinx Kintex-UltraScale Field Programmable Gate Array Single Event Effects (SEE) Heavy-Ion Test Report

This is an independent investigation that evaluates the single event destructive and transient susceptibility of the Xilinx Kintex-UltraScale device. Design/Device susceptibility is determined by monitoring the device under test (DUT) for Single Event Transient (SET) and Single Event Upset (SEU) induced faults by exposing the DUT to a heavy ion beam. Potential Single Event Latch-up (SEL) is monitored throughout heavy-ion testing by examining device current. This device does not have embedded mitigation. Hence, user implemented mitigation is investigated using Synopsys mitigation tools.

Single Event Transient (SET)

Single-Event Effect (SEE) Survey of Advanced Reconfigurable Field Programmable Gate Arrays: NASA Electronic Parts and Packaging (NEPP) Program Office of Safety and Mission Assurance

The NEPP Reconfigurable Field-Programmable Gate Array (FPGA) task has been charged to evaluate reconfigurable FPGA technologies for use in space. Under this task, the Xilinx single-event-immune, reconfigurable FPGA (SIRF) XQR5VFX130 device was evaluated for SEE. Additionally, the Altera Stratix-IV and SiliconBlue iCE65 were screened for single-event latchup (SEL).

Xilinx Single-Event Effects (SEE) Test Consortium

Single Event Effect Testing of the Analog Devices ADV212

The Analog Devices ADV212 was initially tested for single event effects (SEE) at the Texas AM University Cyclotron Facility (TAMU) in July of 2013. Testing revealed a sensitivity to device hang-ups classified as single event functional interrupts (SEFI), soft data errors classified as single event upsets (SEU), and, of particular concern, single event latch-ups (SEL). All error types occurred so frequently as to make accurate measurements of the exposure time, and thus total particle fluence, challenging. To mitigate some of the risk posed by single event latch-ups, circuitry was added to the electrical design to detect a high current event and automatically recycle power and reboot the device. An additional heavy-ion test was scheduled to validate the operation of the recovery circuitry and the continuing functionality of the ADV212 after a substantial number of latch-up events. As a secondary goal, more precise data would be gathered by an improved test method, described in this test report.

single event latch-ups (SEL)

Single Event Effect Testing of the Micron MT46V128M8

The Micron MT46V128M8 was tested for single event effects (SEE) at the Texas AM University Cyclotron Facility (TAMU) in June of 2017. Testing revealed a sensitivity to device hang-ups classified as single event functional interrupts (SEFI) and possible soft data errors classified as single event upsets (SEU).

Single Event Functional Interrupts (SEFI)

Recent Radiation Test Results for Trench Power MOSFETs

Single-event effect (SEE) radiation test results are presented for various trench-gate power MOSFETs. The heavy-ion response of the first (and only) radiation-hardened trench-gate power MOSFET is evaluated: the manufacturer SEE response curve is verified and importantly, no localized dosing effects are measured, distinguishing it from other, non-hardened trench-gate power MOSFETs. Evaluations are made of n-type commercial and both n- and p-type automotive grade trench-gate device using ions comparable to of those on the low linear energy transfer (LET) side of the iron knee of the galactic cosmic ray spectrum, to explore suitability of these parts for missions with higher risk tolerance and shorter duration, such as CubeSats. Part-to-part variability of SEE threshold suggests testing with larger sample sizes and applying more aggressive derating to avoid on-orbit failures. The n-type devices yielded expected localized dosing effects including when irradiated in an unbiased (0-V) configuration, adding to the challenge of inserting these parts into space flight missions.

Schottky Diodes

Variable Depth Bragg Peak Method for Single Event Effects Testing

Traditionally, accelerator SEE testing is accomplished by removing the tops of packages so that the IC chips are accessible to heavy ions. However, ICs in some advanced packages cannot be de-lidded so a different approach is used that involves grinding and/or chemically etching away part of the package and the chip from the back side. The parts are then tested from the back side with ions having sufficient range to reach the sensitive volume. More recently, the entire silicon substrate in an SOI/SRAM was removed, making it possible to use low-energy ions with shorter ranges. Where removal of part of the package is not possible, facilities at Michigan State, NASA Space Radiation Laboratory, GANIL (France) and GSI (Germany) offer high-energy heavy ions with long ranges so that the ions can reach the devices' sensitive volumes without much change in the LET. Unfortunately, a run will typically involve only one ion species having a single energy and LET due to the long time it takes to tune a new energy. The Variable Depth Bragg Peak (VDBP) method is similar to the above method in that it involves the use of high-energy heavy ions that are able to pass through the packaging material and reach the device, obviating the need to remove the package. However, the method provides a broad range of LETs from a single ion by inserting degraders in the beam that modify the ion energy and, therefore, the LET. The crux of the method involves establishing a fiduciary point for degrader thickness, i.e., where the Bragg peak is located precisely at the sensitive volume in the device, for which the measured SEU cross-section and the ion LET are both also maxima and can be calculated using a Monte-Carlo program, TRIM. Once the fiduciary point has been established, calibrated high density polyethylene (HDPE) degraders are inserted into or removed from the beam to vary the ion LET at the device in a known manner. After each change of degrader thickness, the SEU cross-section is measured and the corresponding LET calculated from the change in degrader thickness. That information is used to generate a plot of cross-section as a function of ion LET. The advantages of this approach are that the part does not have to be de-lidded and a broad range of LETs is available from a single heavy ion without having to go to non-normal angles of incidence to change the "effective" LET. As we will show, it is possible to obtain an entire curve of cross-section versus LET using just two or three ions. Fig. 1 shows curves of cross-section vs LET for a Freescale 4 Mbit SOI/SRAM measured at the 88" Cyclotron at Berkeley and at NSRL. The open symbols are the data obtained from Berkeley for top-side and back-side irradiation. The solid data points are for the data obtained at NSRL using a device for which the package was intact. The data are for Iron and Gold and cover a range of LETs from 4 MeV.cm2/mg to 84 MeV.cm2/mg. The agreement between the data obtained from Berkeley and from NSRL is excellent, demonstrating that the VDBP method is capable of providing accurate values of cross-section versus LET, at least for the 4 Mbit SRAM. Details of the technique will be included in the final presentation.

Buchner, S.