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At least 73 records · Page 4

UMap: An application-oriented user level memory mapping library

Exploiting the prominent role of complex memories in exascale node architecture, the UMap page fault handler offers new capabilities to access large memory-mapped data sets directly. UMap provides flexible configuration options to customize page handling to each application, including analysis of massive observational and simulation data sets. The high-performance design features I/O decoupling, dynamic load balancing, and application-level controls. Page faults triggered by application threads and processes accessing data mapped to a UMapp’ed region are handled via the Linux userfaultfd protocol, an asynchronous message-oriented kernel-user communication mechanism that avoids the context switch penalty of traditional signal fault handlers. UMap is fully open source. In this paper, we give an overview of the UMap library architecture, its extensible plugin architecture, and the use/performance of UMap in emerging heterogeneous memory hierarchies such as near-node Non-volatile Memory (NVM) and network attached memories. We highlight new capabilities in two pagefault management plugins, the NetworkStore and SparseStore. We demonstrate the integration between UMap and multiple ECP products including Caliper, Metall, ZFP, Mochi, and Ripples.

97 MATHEMATICS AND COMPUTING

High-frequency Data Integration for Landscape Model Calibration of Carbon Fluxes Across Diverse Tidal Marshes

Terrestrial Aquatic Interfaces (TAIs), and tidal wetlands in particular, store large amounts of carbon yet are not well represented in Earth System Models (ESMs). Predictions of carbon cycling and greenhouse gas (GHG) emissions in tidal wetlands are highly uncertain. Eddy covariance (EC) towers provide ecosystem-scale GHG flux data at a temporal resolution (every 30min) that is helpful for parameterizing and improving mechanistic realism in ESMs. We propose to use a network of eddy covariance towers and standardized ancillary data streams, along with mesocosm experiments and statistical analyses, across diverse tidal wetlands of North America to develop and improve biogeochemical modeling at the TAI. Our overarching objective is to improve understanding and process-based modeling of gross primary productivity (GPP) and CH4 emission responses, both non-linear and asynchronous, to stressors including plant inundation, disturbance, salinity and nitrogen loading.

54 ENVIRONMENTAL SCIENCES

High-Performance, Multi-Node File Copies and Checksums for Clustered File Systems

Modern parallel file systems achieve high performance using a variety of techniques, such as striping files across multiple disks to increase aggregate I/O bandwidth and spreading disks across multiple servers to increase aggregate interconnect bandwidth. To achieve peak performance from such systems, it is typically necessary to utilize multiple concurrent readers/writers from multiple systems to overcome various singlesystem limitations, such as number of processors and network bandwidth. The standard cp and md5sum tools of GNU coreutils found on every modern Unix/Linux system, however, utilize a single execution thread on a single CPU core of a single system, and hence cannot take full advantage of the increased performance of clustered file systems. Mcp and msum are drop-in replacements for the standard cp and md5sum programs that utilize multiple types of parallelism and other optimizations to achieve maximum copy and checksum performance on clustered file systems. Multi-threading is used to ensure that nodes are kept as busy as possible. Read/write parallelism allows individual operations of a single copy to be overlapped using asynchronous I/O. Multinode cooperation allows different nodes to take part in the same copy/checksum. Split-file processing allows multiple threads to operate concurrently on the same file. Finally, hash trees allow inherently serial checksums to be performed in parallel. Mcp and msum provide significant performance improvements over standard cp and md5sum using multiple types of parallelism and other optimizations. The total speed-ups from all improvements are significant. Mcp improves cp performance over 27x, msum improves md5sum performance almost 19x, and the combination of mcp and msum improves verified copies via cp and md5sum by almost 22x. These improvements come in the form of drop-in replacements for cp and md5sum, so are easily used and are available for download as open source software at http://mutil.sourceforge.net.

Kolano, Paul Z.

Gigabit Ethernet Asynchronous Clock Compensation FIFO

Clock compensation for Gigabit Ethernet is necessary because the clock recovered from the 1.25 Gb/s serial data stream has the potential to be 200 ppm slower or faster than the system clock. The serial data is converted to 10-bit parallel data at a 125 MHz rate on a clock recovered from the serial data stream. This recovered data needs to be processed by a system clock that is also running at a nominal rate of 125 MHz, but not synchronous to the recovered clock. To cross clock domains, an asynchronous FIFO (first-in-first-out) is used, with the write pointer (wprt) in the recovered clock domain and the read pointer (rptr) in the system clock domain. Because the clocks are generated from separate sources, there is potential for FIFO overflow or underflow. Clock compensation in Gigabit Ethernet is possible by taking advantage of the protocol data stream features. There are two distinct data streams that occur in Gigabit Ethernet where identical data is transmitted for a period of time. The first is configuration, which happens during auto-negotiation. The second is idle, which occurs at the end of auto-negotiation and between every packet. The identical data in the FIFO can be repeated by decrementing the read pointer, thus compensating for a FIFO that is draining too fast. The identical data in the FIFO can also be skipped by incrementing the read pointer, which compensates for a FIFO draining too slowly. The unique and novel features of this FIFO are that it works in both the idle stream and the configuration streams. The increment or decrement of the read pointer is different in the idle and compensation streams to preserve disparity. Another unique feature is that the read pointer to write pointer difference range changes between compensation and idle to minimize FIFO latency during packet transmission.

Duhachek, Jeff

Asynchronous Communication Scheme For Hypercube Computer

Scheme devised for asynchronous-message communication system for Mark III hypercube concurrent-processor network. Network consists of up to 1,024 processing elements connected electrically as though were at corners of 10-dimensional cube. Each node contains two Motorola 68020 processors along with Motorola 68881 floating-point processor utilizing up to 4 megabytes of shared dynamic random-access memory. Scheme intended to support applications requiring passage of both polled or solicited and unsolicited messages.

Madan, Herb S.

Satellite B-ISDN traffic analysis

The impact of asynchronous transfer mode (ATM) traffic on the advanced satellite broadband integrated services digital network (B-ISDN) with onboard processing is reported. Simulation models were built to analyze the cell transfer performance through the statistical multiplexer at the earth station and the fast packet switch at the satellite. The effectiveness of ground ATM cell preprocessing was established, as well as the performance of several schemes for improving the down-link beam utilization when the space segment employs a fast packet switch.

Shyy, Dong-Jye

Multichannel Error Correction Code Decoder

NASA Lewis Research Center's Digital Systems Technology Branch has an ongoing program in modulation, coding, onboard processing, and switching. Recently, NASA completed a project to incorporate a time-shared decoder into the very-small-aperture terminal (VSAT) onboard-processing mesh architecture. The primary goal was to demonstrate a time-shared decoder for a regenerative satellite that uses asynchronous, frequency-division multiple access (FDMA) uplink channels, thereby identifying hardware and power requirements and fault-tolerant issues that would have to be addressed in a operational system. A secondary goal was to integrate and test, in a system environment, two NASA-sponsored, proof-of-concept hardware deliverables: the Harris Corp. high-speed Bose Chaudhuri-Hocquenghem (BCH) codec and the TRW multichannel demultiplexer/demodulator (MCDD). A beneficial byproduct of this project was the development of flexible, multichannel-uplink signal-generation equipment.

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Satellite-Terrestrial Network Interoperability

The developing national and global information infrastructures (NII/GII) are being built upon the asynchronous transfer mode (ATM) telecommunications protocol and associated protocol standards. These protocols are themselves under development through the telecommunications standards process defined by the International Telecommunications Union (ITU), which as a body is sanctioned by the United Nations. All telecommunications manufacturers use these standards to create products that can interoperate. The ITU has recognized the ATM Forum as the instrument for the development of ATM protocols. This forum is a consortium of industry, academia, and government entities formed to quickly develop standards for the ATM infrastructure. However, because the participants represent a predominately terrestrial network viewpoint, the use of satellites in the national and global information infrastructures could be severely compromised. Consequently, through an ongoing task order, the NASA Lewis Research Center asked Sterling Software, Inc., to communicate with the ATM Forum in support of the interoperability of satellite-terrestrial networks. This year, Dr. Raj Jain of the Ohio State University, under contract to Sterling, authored or coauthored 32 explanatory documents delivered to the ATM Forum in the areas of Guaranteed Frame Rate for Transmission Control Protocol/Internet Protocol (TCP/IP), Available Bit Rate, performance testing, Variable Bit Rate voice over ATM, TCP over Unspecified Bit Rate+, Virtual Source/Virtual Destination, and network management. These contributions have had a significant impact on the content of the standards that the ATM Forum is developing. Some of the more significant accomplishments have been: (1) The adoption by the ATM Forum of a new definition for Message-In, Message-Out latency; and (2) Improved text (clearer wording and newly defined terms) for measurement procedures, foreground and background traffic, and scalable configuration in the latency and throughput sections of the Performance Testing Baseline Text.

vonDeak, Thomas C.

Error recovery in asynchronous systems

Techniques for structuring forward error recovery measures in asynchronous systems are proposed, and recent ideas of atomic actions are generalized so as to support fault-tolerant interactions between processes. In particular, the proposal generalizes the form of simple recovery facilities supported by nested atomic actions in which the exception mechanisms only permit backward error recovery. It allows for construction of systems employing both forward and backward error recovery and thus allows for exploitation of the complementary benefits of the two schemes. Backward recovery, forward recovery, and normal processing activities can occur concurrently within the organization proposed.

Campbell, R. H.

Performance Evaluation in Network-Based Parallel Computing

Network-based parallel computing is emerging as a cost-effective alternative for solving many problems which require use of supercomputers or massively parallel computers. The primary objective of this project has been to conduct experimental research on performance evaluation for clustered parallel computing. First, a testbed was established by augmenting our existing SUNSPARCs' network with PVM (Parallel Virtual Machine) which is a software system for linking clusters of machines. Second, a set of three basic applications were selected. The applications consist of a parallel search, a parallel sort, a parallel matrix multiplication. These application programs were implemented in C programming language under PVM. Third, we conducted performance evaluation under various configurations and problem sizes. Alternative parallel computing models and workload allocations for application programs were explored. The performance metric was limited to elapsed time or response time which in the context of parallel computing can be expressed in terms of speedup. The results reveal that the overhead of communication latency between processes in many cases is the restricting factor to performance. That is, coarse-grain parallelism which requires less frequent communication between processes will result in higher performance in network-based computing. Finally, we are in the final stages of installing an Asynchronous Transfer Mode (ATM) switch and four ATM interfaces (each 155 Mbps) which will allow us to extend our study to newer applications, performance metrics, and configurations.

Dezhgosha, Kamyar

NASA Tech Briefs, December 2010

Topics include: Coherent Frequency Reference System for the NASA Deep Space Network; Diamond Heat-Spreader for Submillimeter-Wave Frequency Multipliers; 180-GHz I-Q Second Harmonic Resistive Mixer MMIC; Ultra-Low-Noise W-Band MMIC Detector Modules; 338-GHz Semiconductor Amplifier Module; Power Amplifier Module with 734-mW Continuous Wave Output Power; Multiple Differential-Amplifier MMICs Embedded in Waveguides; Rapid Corner Detection Using FPGAs; Special Component Designs for Differential-Amplifier MMICs; Multi-Stage System for Automatic Target Recognition; Single-Receiver GPS Phase Bias Resolution; Ultra-Wideband Angle-of-Arrival Tracking Systems; Update on Waveguide-Embedded Differential MMIC Amplifiers; Automation Framework for Flight Dynamics Products Generation; Product Operations Status Summary Metrics; Mars Terrain Generation; Application-Controlled Parallel Asynchronous Input/Output Utility; Planetary Image Geometry Library; Propulsion Design With Freeform Fabrication (PDFF); Economical Fabrication of Thick-Section Ceramic Matrix Composites; Process for Making a Noble Metal on Tin Oxide Catalyst; Stacked Corrugated Horn Rings; Refinements in an Mg/MgH2/H2O-Based Hydrogen Generator; Continuous/Batch Mg/MgH2/H2O-Based Hydrogen Generator; Strain System for the Motion Base Shuttle Mission Simulator; Ko Displacement Theory for Structural Shape Predictions; Pyrotechnic Actuator for Retracting Tubes Between MSL Subsystems; Surface-Enhanced X-Ray Fluorescence; Infrared Sensor on Unmanned Aircraft Transmits Time-Critical Wildfire Data; and Slopes To Prevent Trapping of Bubbles in Microfluidic Channels.

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NASA Tech Briefs, August 2011

Topics covered include: Miniature, Variable-Speed Control Moment Gyroscope; NBL Pistol Grip Tool for Underwater Training of Astronauts; HEXPANDO Expanding Head for Fastener-Retention Hexagonal Wrench; Diagonal-Axes Stage for Pointing an Optical Communications Transceiver; Improvements in Speed and Functionality of a 670-GHz Imaging Radar; IONAC-Lite; Large Ka-Band Slot Array for Digital Beam-Forming Applications; Development of a 150-GHz MMIC Module Prototype for Large-Scale CMB Radiation; Coupling Between Waveguide-Fed Slot Arrays; PCB-Based Break-Out Box; Multiple-Beam Detection of Fast Transient Radio Sources; Router Agent Technology for Policy-Based Network Management; Remote Asynchronous Message Service Gateway; Automatic Tie Pointer for In-Situ Pointing Correction; Jitter Correction; MSLICE Sequencing; EOS MLS Level 2 Data Processing Software Version 3; DspaceOgre 3D Graphics Visualization Tool; Metallization for Yb14MnSb11-Based Thermoelectric Materials; Solvent/Non-Solvent Sintering To Make Microsphere Scaffolds; Enhanced Fuel-Optimal Trajectory-Generation Algorithm for Planetary Pinpoint Landing; Self-Cleaning Coatings and Materials for Decontaminating Field-Deployable Land and Water-Based Optical Systems; Separation of Single-Walled Carbon Nanotubes with DEP-FFF; Li Anode Technology for Improved Performance; Post-Fragmentation Whole Genome Amplification-Based Method; Microwave Tissue Soldering for Immediate Wound Closure; Principles, Techniques, and Applications of Tissue Microfluidics; Robotic Scaffolds for Tissue Engineering and Organ Growth; Stress-Driven Selection of Novel Phenotypes; Method for Accurately Calibrating a Spectrometer Using Broadband Light; Catalytic Microtube Rocket Igniter; Stage Cylindrical Immersive Display; Vacuum Camera Cooler; Atomic Oxygen Fluence Monitor; Thermal Management Tools for Propulsion System Trade Studies and Analysis; Introduction to Physical Intelligence; Technique for Solving Electrically Small to Large Structures for Broadband Applications; Accelerated Adaptive MGS Phase Retrieval; Large Eddy Simulation Study for Fluid Disintegration and Mixing; Tropospheric Correction for InSAR Using Interpolated ECMWF Data and GPS Zenith Total Delay; Technique for Calculating Solution Derivatives With Respect to Geometry Parameters in a CFD Code; Acute Radiation Risk and BRYNTRN Organ Dose Projection Graphical User Interface; Probabilistic Path Planning of Montgolfier Balloons in Strong, Uncertain Wind Fields; Flight Simulation of ARES in the Mars Environment; Low-Outgassing Photogrammetry Targets for Use in Outer Space; Planning the FUSE Mission Using the SOVA Algorithm; Monitoring Spacecraft Telemetry Via Optical or RF Link; and Robust Thermal Control of Propulsion Lines for Space Missions.

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DAI-CLIPS: Distributed, Asynchronous, Interacting CLIPS

DAI-CLIPS is a distributed computational environment within which each CLIPS is an active independent computational entity with the ability to communicate freely with other CLIPS. Furthermore, new CLIPS can be created, others can be deleted or modify their expertise, all dynamically in an asynchronous and independent fashion during execution. The participating CLIPS are distributed over a network of heterogeneous processors taking full advantage of the available processing power. We present the general framework encompassing DAI-CLIPS and discuss some of its advantages and potential applications.

Gagne, Denis

Latency Hiding in Dynamic Partitioning and Load Balancing of Grid Computing Applications

The Information Power Grid (IPG) concept developed by NASA is aimed to provide a metacomputing platform for large-scale distributed computations, by hiding the intricacies of highly heterogeneous environment and yet maintaining adequate security. In this paper, we propose a latency-tolerant partitioning scheme that dynamically balances processor workloads on the.IPG, and minimizes data movement and runtime communication. By simulating an unsteady adaptive mesh application on a wide area network, we study the performance of our load balancer under the Globus environment. The number of IPG nodes, the number of processors per node, and the interconnected speeds are parameterized to derive conditions under which the IPG would be suitable for parallel distributed processing of such applications. Experimental results demonstrate that effective solution are achieved when the IPG nodes are connected by a high-speed asynchronous interconnection network.

Das, Sajal K.

Q-IRIS: The Evolution of the IRIS Task-Based Runtime to Enable Classical-Quantum Workflows

Extreme heterogeneity in emerging HPC systems are starting to include quantum accelerators, motivating runtimes that can coordinate between classical and quantum workloads. We present a proof-of-concept hybrid execution framework integrating the IRIS asynchronous task-based runtime with the XACC quantum programming framework via the Quantum Intermediate Representation Execution Engine (QIR-EE). IRIS orchestrates multiple programs written in the quantum intermediate representation (QIR) across heterogeneous backends (including multiple quantum simulators), enabling concurrent execution of classical and quantum tasks. Although not a performance study, we report measurable outcomes through the successful asynchronous scheduling and execution of multiple quantum workloads. To illustrate practical runtime implications, we decompose a four-qubit circuit into smaller subcircuits through a process known as quantum circuit cutting, reducing per-task quantum simulation load and demonstrating how task granularity can improve simulator throughput and reduce queueing behavior -- effects directly relevant to early quantum hardware environments. We conclude by outlining key challenges for scaling hybrid runtimes, including coordinated scheduling, classical-quantum interaction management, and support for diverse backend resources in heterogeneous systems.

Miniskar, Narasinga Rao [ORNL] (ORCID:000000018259

System Measures Errors Between Time-Code Signals

System measures timing errors between signals produced by three asynchronous time-code generators. Errors between 1-second clock pulses resolved to 2 microseconds. Basic principle of computation of timing errors as follows: central processing unit in microcontroller constantly monitors time data received from time-code generators for changes in 1-second time-code intervals. In response to any such change, microprocessor buffers count of 16-bit internal timer.

Cree, David

Advanced concepts for telemetry data systems

The Consultative Committee for Space Data Standards (CCSDS) has defined Advanced Orbiting System (AOS) standards for the overall architectural framework of future packet telemetry systems. The standards encompass a CCSDS principal network covering the onboard space-link and ground systems, and furnishes an asynchronous (telemetry/internetworking) and isochronous (audio and video) data-transport services employing CCSDS packets and virtual channels. Attention is given to changes envisioned in ground telemetry processing systems currently in use, as well as to the application of CCSDS standards to future systems.

Pritchard, James A.

Classic and Quantum Task-Based Intelligent Runtime for QIRs Running on Multiple QPUs

High-performance computing systems are rapidly evolving into heterogeneous platforms that fuse quantum accelerators with traditional classical processing units (CPUs) and graphical processing units (GPUs). This convergence calls for runtimes capable of managing both classical and quantum workloads in a unified manner. We introduce an intelligent, task-based runtime that marries the Intelligent RuntIme System (IRIS) asynchronous scheduler with a quantum programming stack through the Quantum Intermediate Representation Execution Engine (QIR-EE). Our design allows programs written in the quantum intermediate representation (QIR) to be dispatched concurrently to a variety of back-ends, including multiple quantum simulators and nascent quantum processors, enabling genuine hybrid execution on a single node. To illustrate its practicality, we partition a 4-qubit and 20-qubit circuit into three sub-circuits using quantum circuit cutting via the QCut library. Each sub-circuit is simulated independently by the QIR-EE driver within IRIS, after which a classical post-processing step merges the simulation results to recover the outcome of the original full-circuit computation. This case study demonstrates how finer task granularity can enable the parallel execution and lower the simulation burden per quantum task while preserving overall accuracy, highlighting the feasibility of our hybrid approach.

Miniskar, Narasinga Rao [ORNL] (ORCID:000000018259