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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 73 records · Page 4
All sourcesNASA NTRSDOE OSTI
NASA NTRS1997

Fundamental Hardware Design in PVS

The development of Programmable Logic Devices (PLDs) has introduced programming as a primary tool in the development of digital circuits. This work attempts to create a generic verification environment in which designs can be specified and verified using the Prototype Verification System (PVS). This is accomplished by providing library support for general hardware constructs. The environment is intended for use with any PLD and any PLD programming language. The goal of the environment is to allow the easy translation of digital designs to PVS and provide sufficient support to make verification possible without a great deal of effort.

Leathrum, James F., Jr.↗
NASA NTRS1984

VLBI System (BLK I) If-video down Conversion Design

The prototype intermediate frequency video down converter of the Deep Space Network (BLK 1) Very Long Base Interferometry system, a hybrid of analog and digital circuits, was completed and tested. The initial results met all design specifications, establishing a milestone in new design technology for such devices. This device has uses in other similar applications and can form the basis for expanded design and applications.

Ham, N. C.↗
NASA NTRS1972

A high-accuracy digital star tracker for advanced planetary missions.

The digital star tracker represents a novel departure from previous analog designs in terms of circuit implementation and operational capabilities. As an element of an all-digital spacecraft control system, it combines proven low-level analog signal processing with digital error control and command functions. Additional capabilities that are obtainable with the digital circuitry include programmable intensity threshold gates, commanded electronic pointing control, and an acquisition/control algorithm which minimizes the effects of straylight disturbances. The capabilities inherent in the implementation have been successfully demonstrated in a laboratory model of the instrument.

Salomon, P. M.↗
NASA NTRS1973

A high-accuracy digital star tracker for advanced planetary missions

The digital star tracker represents a novel departure from previous analog designs in terms of circuit implementation and operational capabilities. As an element of an all-digital spacecraft control system, it combines proven low-level analog signal processing with digital error control and command functions. Additional capabilities that are obtainable with the digital circuitry include programmable intensity threshold gates, commanded electronic pointing control, and an acquisition/control algorithm which minimizes the effects of straylight disturbances. The capabilities inherent in the implementation have been successfully demonstrated in a laboratory model of the instrument.

Salomon, P. M.↗
NASA NTRS2005

Integrated low power digital gyro control electronics

Embodiments of the invention generally encompass a digital, application specific integrated circuit (ASIC) has been designed to perform excitation of a selected mode within a vibratory rate gyroscope, damping, or force-rebalance, of other modes within the sensor, and signal demodulation of the in-phase and quadrature components of the signal containing the angular rate information. The ASIC filters dedicated to each channel may be individually programmed to accommodate different rate sensor designs/technology or variations within the same class of sensors. The ASIC architecture employs a low-power design, making the ASIC, particularly suitable for use in power-sensitive applications.

M'Closkey, Robert↗
NASA NTRS2011

Continuous-Integration Laser Energy Lidar Monitor

This circuit design implements an integrator intended to allow digitization of the energy output of a pulsed laser, or the energy of a received pulse of laser light. It integrates the output of a detector upon which the laser light is incident. The integration is performed constantly, either by means of an active integrator, or by passive components.

Karsh, Jeremy↗
NASA NTRS1995

Digital Pulse-Width-Modulation Circuit

Digital pulse-width-modulation circuit provides programmable duration from 1 microsecond to full on, at repetition rate of 1 kHz. Designed for use in controlling CO2 laser, also used in applications in which precision and flexibility of digital control of pulse durations needed. Circuit incorporates low-power Schottky transistor/transistor-logic (TTL) devices in critical high-speed parts. Designed in TTL to make it compatible with Pro-Log 7914 (or equivalent) decoder input/output (I/O) utility printed-circuit card.

Wenzler, Carl J.↗
NASA NTRSDate not supplied

Radiation-Hard Parallel Readout Circuit for Low-Frequency Voltage Signal Measurements

NASA Goddard Space Flight Center (GSFC) has successfully developed and tested a custom-designed low-noise multi-channel digitizer (MCD) application specific integrated circuit (ASIC) for operation in harsh radiation environments. The MCD-ASIC is optimized for low-frequency and low-voltage signal measurements from sensors and transducers. It has 20 input channels where each channel is comprised of auto-zeroed chopper variable-gain amplifier, post amplifier, and a second order ∑∆ modulator. ∑∆ analog-to-digital converter (ADC) relies on oversampling and noise shaping to achieve high-resolution conversion. However, the MCD-ASIC requires digital filtering and decimation to convert the output single bit streams from the ADC to useful data words. A parallel digital platform such as a field-programmable-gate-array (FPGA) is highly suitable to fully leverage the capabilities of the MCD-ASIC. The FPGA controls the MCD-ASIC via serial peripheral interface (SPI) protocol and acquires data from it. A Python-script communicates with the FPGA board through a USB interface on a cross operating platform. Using this architecture, the system is capable of monitoring up to 20 voltage readout channels simultaneously in a real-time manner. Each channel’s parameters can be programmed independently allowing maximum user versatility. In this paper, we present analysis of the analog front-end, the implementation of the digital processing unit on the FPGA, and provide noise performance results from the MCD-ASIC readout.

ASIC↗
NASA NTRS1982

Advanced digital SAR processing study

A highly programmable, land based, real time synthetic aperture radar (SAR) processor requiring a processed pixel rate of 2.75 MHz or more in a four look system was designed. Variations in range and azimuth compression, number of looks, range swath, range migration and SR mode were specified. Alternative range and azimuth processing algorithms were examined in conjunction with projected integrated circuit, digital architecture, and software technologies. The advaced digital SAR processor (ADSP) employs an FFT convolver algorithm for both range and azimuth processing in a parallel architecture configuration. Algorithm performace comparisons, design system design, implementation tradeoffs and the results of a supporting survey of integrated circuit and digital architecture technologies are reported. Cost tradeoffs and projections with alternate implementation plans are presented.

Martinson, L. W.↗
NASA NTRS1967

Advanced transducers Final report

Design of digital adapter with limit storage for transducers for use in multichannel digital data acquisition system

INTEGRATED CIRCUIT↗
NASA NTRS1993

Testing self-timed circuits using scan paths

Testing is an essential part of any digital system design and one that can be made much easier if testing is considered during the design process rather than after the system is complete. There are a number of techniques for integrating testability into system design, but many of these traditional testing methods used for synchronous circuits are not directly applicable to non-clocked asynchronous circuits. As a result, many asynchronous circuits do not employ design for testability techniques. A method of using the familiar model of scan paths modified to test self-timed systems are presented. Specifically, circuits designed using a library of self-timed modules to assemble systems with two-phase transition control and bundled data paths are considered. The method involves modifying these self-timed modules such that circuits designed from them have a built-in scan path.

Khoche, Ajay↗
NASA NTRS1983

An EPROM-based function generator

A circuit is described to produce arbitrary time-dependent voltage functions derived from digital information stored in EPROMs. While this circuit is designed to be used as a modulator of the microwave pump source or a solid state low noise maser, it can be readily adapted for other applications.

Fowler, L.↗
NASA NTRS2005

Multifunctional Logic Gate Controlled by Temperature

A complementary metal oxide/semiconductor (CMOS) electronic circuit has been designed to function as a NAND gate at a temperature between 0 and 80 deg C and as a NOR gate at temperatures from 120 to 200 C. In the intermediate temperature range of 80 to 120 C, this circuit is expected to perform a function intermediate between NAND and NOR with degraded noise margin. The process of designing the circuit and the planned fabrication and testing of the circuit are parts of demonstration of polymorphic electronics a technological discipline that emphasizes designing the same circuit to perform different analog and/or digital functions under different conditions. In this case, the different conditions are different temperatures.

Stoica, Adrian↗
NASA NTRS2005

Multifunctional Logic Gate Controlled by Supply Voltage

A complementary metal oxide/semiconductor (CMOS) electronic circuit functions as a NAND gate at a power-supply potential (V(sub dd)) of 3.3 V and as NOR gate for V(sub dd) = 1.8 V. In the intermediate V(sub dd) range of 1.8 to 3.3 V, this circuit performs a function intermediate between NAND and NOR with degraded noise margin. Like the circuit of the immediately preceding article, this circuit serves as a demonstration of the evolutionary approach to design of polymorphic electronics -- a technological discipline that emphasizes evolution of the design of a circuit to perform different analog and/or digital functions under different conditions. In this instance, the different conditions are different values of V(sub dd).

Stoica, Adrian↗
NASA NTRS1983

Flight test validation of a design procedure for digital autopilots

Commercially available general aviation autopilots are currently in transition from an analogue circuit system to a computer implemented digital flight control system. Well known advantages of the digital autopilot include enhanced modes, self-test capacity, fault detection, and greater computational capacity. A digital autopilot's computational capacity can be used to full advantage by increasing the sophistication of the digital autopilot's chief function, stability and control. NASA's Langley Research Center has been pursuing the development of direct digital design tools for aircraft stabilization systems for several years. This effort has most recently been directed towards the development and realization of multi-mode digital autopilots for GA aircraft, conducted under a SPIFR-related program called the General Aviation Terminal Operations Research (GATOR) Program. This presentation focuses on the implementation and testing of a candidate multi-mode autopilot designed using these newly developed tools.

Bryant, W. H.↗