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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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DOE OSTI2023

Navier: Dataflow Architecture for Computation Chemistry

Navier’s objectives were two evaluate the use of emerging technologies, especially dataflow accelerators, for high-performance computing (HPC) applications, specifically in the domain of chemistry, and to develop a prototype software stack to support such applications. Navier builds on capabilities previously developed by synergistic projects, such as PNNL Data Model Convergence (DMC) LDRD Hardware Advanced Workflows (HAW) and DuOMO, as well as DOE ARIAA. Throughout its 18 months, the Navier team developed new capabilities and artifacts at all levels of the HW/SW stack, provided a seamless way to integrate novel computing architectures (Sambanova SN10 and Xilinx Versal AI) into an existing software stack, developed chemistry workflows, data analytics tools, and HPC molecular dynamics workflows that leverage the developed stack and PNNL institutional investments in emerging architectures. Navier also explored the use of active learning to accelerate a computational chemistry workflow for organic molecules on PNNL Junction cluster (in collaboration with AMD/Xilinx). Navier developed tools, methodologies, and studies for hardware software co-design and (sparse) dataflow accelerators that are composable and can be used together or separately. These methodologies are now used in other projects, such as DOE AMAIS and HPDA. This report describes Navier’s achievement, the developed tools and methodologies, and the research findings and conclusions.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2018

Hardware Evaluation: Abstract Machine Models and Proxy Architectures for Exascale Computing

The strategic and economic impacts of high performance computing (HPC) systems, over the last several decades, have enabled dramatic improvements in manufacturing, design, development, and research, across almost every sector of the U.S. economy, including genetic analysis for agriculture and medicine, oil exploration, electronics, aircraft, and automotive design, and of course national defense technologies. HPC has repeatedly compounded reductions in time-to-solution and time-to-market in each of these areas. In recognition of these strategic and economic impacts, the Department of Energy (DOE) created the Exascale Computing Project (ECP) as a broad-based technology project focusing on simultaneously co-evolving high-performance computing architecture, system software, and application software. While many details of the exascale architectures are undefined, communicating the form and direction of this co-evolution of advances, in each of these three components, across the project, presents a need for a common language through which these advances can be shared. In this document we present a series of abstract representations designed to allow application developers to focus on the aspects of the machine that are important or relevant to performance and code structure. These abstract machine models (AMMs) describe the proposed architectures at the component and system level and are intended as communication aids between application developers and hardware architects during the co-design process. In addition to providing a common language for communication, the constraints of protecting the intellectual property of ECP’s vendor partners requires that the architectural advances be presented in an abstract sense, rather than exposing the specifics of an individual vendor’s designs, while still providing enough detail such that application developers will be able to reason about the performance trade-offs in the design space of their applications.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2025

UltraLiM: In-Memory Boolean Logic Architecture Using UltraRAM

Conventional computing architectures encounter ‘von Neumann’ and ‘memory wall’ bottlenecks which arise due to the back-and-forth data movement between the physically separate memory and processing units and the speed mismatch between them, respectively. These bottlenecks hurt both energy efficiency and the throughput of computing systems. To address these challenges, in-memory computing architectures have emerged as a promising alternative. They reduce the need for frequent data movement by executing different computing tasks inside the memory system. Here, we present UltraLiM, a logic-in-memory architecture using the UltraRAM-based memory system. UltraRAM holds the promise of developing a ‘universal memory’, overcoming the limitations of charge-based memories thanks to their non-volatile behavior with lower operating voltage. This work presents an in-memory computing architecture that integrates an UltraRAM-based memory array with a custom-designed peripheral circuitry. With this architecture, we can perform various in-memory Boolean logic operations (such as NOT, NAND, NOR, and XOR) in a single cycle. Leveraging the separate read-write paths in the UltraRAM-based memory array, we optimize read operations without encountering design conflicts. This optimization enhances the sense margin, enabling the use of simpler peripheral circuitry for in-memory logic operations.

Alam, Shamiul [University of Tennessee, Knoxville ↗
DOE OSTI2016

Investigation of Portable Event-Based Monte Carlo Transport Using the NVIDIA Thrust Library

Power consumption considerations are driving future high performance computing platforms toward many-core computing architectures. Los Alamos National Laboratory's Trinity machine, available in 2016, will use both Intel Xeon Haswell processors and Intel Xeon Phi Knights Landing many integrated core (MIC) architecture coprocessors. Lawrence Livermore National Laboratory's Sierra machine, available in 2018, will use an IBM PowerPC architecture along with Nvidia graphics processing unit (GPU) architecture accelerators. These different advanced architectures make the computing landscape in upcoming years complex. Traditional approaches to Monte Carlo transport do not work efficiently on these new computing platforms. MIC architectures require vectorization to operate efficiently, and vectorization is difficult to achieve in Monte Carlo transport. GPU architectures require additional code to explicitly use the hardware, requiring significant code changes or hardware specific branches in the source code. A significant challenge for Monte Carlo transport projects is to simultaneously support within a single source code base efficient simulations for both the current generation of architectures and the different advanced computing architectures. In order to address these challenges, two important changes are typically required: a new algorithmic approach for solving Monte Carlo transport, and explicit use of hardware specific software. In this paper, we describe initial research investigations of an event-based Monte Carlo transport algorithm implemented using the Nvidia Thrust library on a GPU for a Monte Carlo test code. The event-based algorithm targets many-core architectures by increasing SIMD (single instruction multiple data) parallelism, while Thrust potentially provides portable performance by allowing one source code base to compile code targeted for both CPUs and GPUs. We described preliminary investigations of portable event-based Monte Carlo algorithms implemented using the Nvidia Thrust library in a research Monte Carlo test code. We found that an explicit CUDA implementation of an event-based Monte Carlo algorithm performed significantly more efficiently than a Thrust implementation on GPU platforms, most likely as a result of additional flexibility in access to different memory spaces on the GPU. Additionally, we showed that on GPU platforms and at large enough problem sizes the event-based implementations perform more efficiently than the serial history-based implementation running on the host CPU. While investigating this problem, we also discovered that the performance of the event-based algorithm is affected by what tallies are being used. A zonal scalar flux tally requires atomic operations that significantly impacted the performance of the code, in some cases producing slowdowns instead of speedups. We decided to remove the tally in order to focus on the effectiveness of the event-based algorithm. Future work will be required to research more effective ways of handling such tallies. Additionally, we would like to consider new ways for optimizing both the Thrust and CUDA versions, in order to see how much performance we have yet to achieve. The potential trade-off between portability and performance was demonstrated in this investigation. Thrust provides both CPU and GPU versions of the code in one code base, but it does so at a cost. We discovered approximately a factor of 2-5 performance difference between Thrust and CUDA on each GPU platform we tested. Thrust provides a tool to access the GPUs with less effort and specialization, but it does so by giving up fine grained control where extra performance can be found for this application. Future work will be required to determine whether this performance differential between Thrust and CUDA can be reduced for event-based Monte Carlo transport. (authors)

73 NUCLEAR PHYSICS AND RADIATION PHYSICS↗
DOE OSTI2018

A Positive-Definite, WENO-Limited, High-Order Finite Volume Solver for 2-D Transport on the Cubed Sphere Using an ADER Time Discretization

Modern computer architectures reward added computation if it reduces algorithmic dependence, reduces data movement, increases accuracy/robustness, and improves memory accesses. The driving motive for this study is to develop a numerical algorithm that respects these constraints while improving accuracy and robustness. This study introduces the ADER-DT (Arbitrary DERivatives in time and space-differential transform) time discretization to positive-definite, weighted essentially nonoscillatory (WENO)-limited, finite volume transport on the cubed sphere in lieu of semidiscrete integrators. The cost of the ADER-DT algorithm is significantly improved from previous implementations without affecting accuracy. A new function-based WENO implementation is also detailed for use with the ADER-DT time discretization. While ADER-DT costs about 1.5 times more than a fourth-order, five-stage strong stability preserving Runge-Kutta (SSPRK4) method, it is far more computationally dense (which is advantageous on accelerators such as graphics processing units), and it has a larger effective maximum stable time step. ADER-DT errors converge more quickly with grid refinement than SSPRK4, giving 6.5 times less error in the L ∞ norm than SSPRK4 at the highest refinement level for smooth data. For nonsmooth data, ADER-DT resolves C 0 discontinuities more sharply. For a complex flow field, ADER exhibits less phase error than SSPRK4. In conclusion, improving both accuracy and robustness as well as better respecting modern computational efficiency requirements, we believe the method presented herein is competitive for efficiently transporting tracers over the sphere for applications targeting modern computing architectures.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2014

Evaluation of Low Power ARM Processors for Monte Carlo Particle Transport: MCNP6 on the ARM Cortex-A8 - Paper 83

In the push towards exascale computing, the limiting factors are power requirements and heat dissipation. Using current technology, the power required to drive an exascale supercomputer would near 400-MW. Clearly, future computing hardware will have to be more energy efficient in order to achieve exascale performance. Most of the current research in advanced computing architectures is in the use of standard CPUs with accelerators. However, these accelerators are not generally supported by the traditional scientific programming languages (C, C++, and Fortran) and the scientific software must be tailored specifically to take advantage of the accelerators. Large scale scientific software (hundreds-of-thousand to millions of lines of code) can not be easily ported to the computing platform du jour. The widespread use of low power ARM based processors in the mobile computing market offer a low power alternative to accelerators that are also supported by the traditional scientific programming languages and programming paradigms such as MPI and OpenMP. Computing architectures for scientific computing are often assessed using standard benchmarks such as LINPACK benchmark or using suites of mini-applications that are greatly simplified stand-ins for scientific software. Often the real applications that will deployed on the scientific supercomputers are not ported or tested until delivery of the machines. In order to evaluate the use of ARM processors for scientific computing the Monte Carlo particle transport code, MCNP version 6 was compiled on the ARM Cortex-A8 and a set of benchmark problems were used to assess performance in comparison to an Intel Xeon E5-2670 and the low power Intel Atom N270. MCNP is a continuous energy Monte Carlo particle transport code in development at Los Alamos National Laboratory since 1977. MCNP is used to transport neutrons, photon, electrons, and charged particles using continuous energy interaction data. It is commonly used in fields of nuclear power, nuclear medicine, radiation protection, and high-energy physics through-out the world. MCNP version 6 is approximately 450 thousand lines of code, written primary in Fortran90, with some C and C++. MCNP supports distributed multiprocessing using MPI and threading with OpenMP. The ARM Cortex-A8 executes MCNP6 using about twice as much power as the Intel Xeon E5-2670 and about the same amount of power as the Intel Atom N270. However, these results are encouraging for the use of low-power ARM chips in future supercomputers. The ARM Cortex-A8 is a 32-bit CPU and it's NEON general-purpose SIMD (single-instruction multiple data) engine does not support double-precision floating-point arithmetic. More recent ARM processors (ARM Cortex-A53 and Cortex-A57) support 64-bit addressing and have NEON co-processors that support double-precision floating-point arithmetic. ARM claims that the A50 series delivers a performance increase of 15 times the Cortex-A8 performance for similar power usage. (authors)

61 RADIATION PROTECTION AND DOSIMETRY↗
DOE OSTI2022

STOMPX

STOMPX is an OpenMPI implementation of selected operational modes of the Subsurface Transport Over Multiple Phases numerical simulator. STOMPX is designed to execute with both shared- and distributed-memory computer architectures. This implementation of the simulator is designed to solve the same problems as the STOMP simulator, but taking advantage of multiple processor execution through the OpenMPI language and libraries. The STOMP simulator is written in Fortran 90 and operates on single processors or shared-memory computer architectures. The STOMPX simulator extends execution to distributed-memory computer architectures, including super computers

White, Mark↗
DOE OSTI2021

Design Considerations for GPU-based Mixed Integer Programming on Parallel Computing Platforms

Mixed Integer Programming (MIP) is a powerful abstraction in combinatorial optimization that finds real-life application across many significant sectors. The recent proliferation of graphical processing unit (GPU)-based accelerated computing architectures in large-scale parallel computing or supercomputing presents new opportunities as well as challenges in the advancement of MIP solver technology to effectively use the new accelerated computing platforms and scale to large parallel systems. Here, we recount the conventional processor-based strategies and focus on configurations where the most promising intersection lies between parallel MIP solver approaches and the specific strengths of accelerated parallel platforms. We note that the best potential lies in solving problems whose individual matrix sizes (of the linear program relaxation) fit entirely within one accelerator's memory and whose branch-and-bound (or branch-and-cut) trees cannot be fully contained within a small number of computational nodes. Additionally, we identify ideal features of computational linear algebra support on GPU accelerators that would help advance this direction of scalable parallel solution of MIP problems on GPU-based accelerated computing architectures.

Perumalla, Kalyan↗
DOE OSTI2024

Enabling Parallel Performance and Portability of Solid Mechanics Simulations Across CPU and GPU Architectures

Efficiently simulating solid mechanics is vital across various engineering applications. As constitutive models grow more complex and simulations scale up in size, harnessing the capabilities of modern computer architectures has become essential for achieving timely results. This paper presents advancements in running parallel simulations of solid mechanics on multi-core CPUs and GPUs using a single-code implementation. This portability is made possible by the C++ matrix and array (MATAR) library, which interfaces with the C++ Kokkos library, enabling the selection of fine-grained parallelism backends (e.g., CUDA, HIP, OpenMP, pthreads, etc.) at compile time. MATAR simplifies the transition from Fortran to C++ and Kokkos, making it easier to modernize legacy solid mechanics codes. We applied this approach to modernize a suite of constitutive models and to demonstrate substantial performance improvements across different computer architectures. This paper includes comparative performance studies using multi-core CPUs along with AMD and NVIDIA GPUs. Results are presented using a hypoelastic–plastic model, a crystal plasticity model, and the viscoplastic self-consistent generalized material model (VPSC-GMM). The results underscore the potential of using the MATAR library and modern computer architectures to accelerate solid mechanics simulations.

Morgan, Nathaniel (ORCID:0000000276118449)↗
DOE OSTI2016

The Improved Simple Corner Balance Method and Efforts to Enhance its Computational Performance

The diamond difference (DD) spatial discretization has long been a work horse of the neutron transport community. For nearly as long as DD has been used in neutron transport, it has been observed that DD produces undamped, non-physical angular fluxes in spatially under resolved problems and can fail in the thick diffusion limit. A long list of alternative spatial discretizations, all with better physics properties: accuracy, robustness, and/or preservation of the thick diffusion limit, have been proposed as alternatives to DD. Unfortunately, these alternative spatial discretizations also require significantly more floating point operations (FLOPs) per unknown compared to DD. Historically, neutron transport problems of interest have been able to be resolved sufficiently that DD is accurate enough and FLOPs have been the computational performance bottleneck controlling time to solution. Thus, in practice DD has been and remains a preferred spatial discretization for neutron transport simulations. Trends in computing architecture are leading to a new paradigm where data movement, not FLOPs will control time to solution. This presents an opportunity to improve neutron transport physics by reconsidering more FLOP intensive spatial discretization than DD without incurring a time to solution penalty. In this work, we consider the improved simple corner balance (ISCB) spatial discretization, a unique alternative to DD that has the same memory footprint as DD, and detail efforts to improve its computational performance. The ISCB spatial discretization is a more FLOP intensive spatial discretization than DD with the same memory footprint as DD. Though designed to maximize FLOP intensity, third party libraries such as LAPACK are not tuned for the unique, frequent, small linear algebra needs of neutron transport problems. While hand coding a sparse Gauss elimination is likely to be faster than a dense matrix solve (CM vs. HGE), were LAPACK suitable for small linear algebra problems, we would not have seen a performance increase with decreased numbers of LAPACK calls for the Schur complement solve (SC4 vs. SC1). Significant effort has reduced the relative compute time of ISCB to DD, but on current computer architectures DD is still faster than ISCB. Future work comparing the overall efficiency of ISCB to DD may reveal that while ISCB is slower than DD on current computers, ISCB is more accurate than DD by a factor greater than the compute time slowdown. As new computer architectures become available, we will test our hypothesis that neutron transport simulations will be bandwidth limited, ideally rendering the additional FLOPs required by ISCB to be 'free' [in terms of time to solution]. (authors)

73 NUCLEAR PHYSICS AND RADIATION PHYSICS↗
DOE OSTI2021

A-SST Initial Specification

The U.S. Army Research Office (ARO), in partnership with IARPA, are investigating innovative, efficient, and scalable computer architectures that are capable of executing next-generation large scale data-analytic applications. These applications are increasingly sparse, unstructured, non-local, and heterogeneous. Under the Advanced Graphic Intelligence Logical computing Environment (AGILE) program, Performer teams will be asked to design computer architectures to meet the future needs of the DoD and the Intelligence Community (IC). This design effort will require flexible, scalable, and detailed simulation to assess the performance, efficiency, and validity of their designs. To support AGILE, Sandia National Labs will be providing the AGILE-enhanced Structural Simulation Toolkit (A-SST). This toolkit is a computer architecture simulation framework designed to support fast, parallel, and multi-scale simulation of novel architectures. This document describes the A-SST framework, some of its library of simulation models, and how it may be used by AGILE Performers.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2024

Spectral Analysis of Regular Material Point Method and its Application to Study High Pressure Reverse Osmosis Membrane Compaction and Embossing

Material Point Method (MPM) is gaining widespread interest in applied continuum mechanics. The fact that all the continuum properties are stored on the particles (or material points) and the governing equations are solved on these material points makes MPM extremely suited to problems involving severe material deformations, such as crack propagation, soil movement, and fluid flows. Despite its popularity, only a few studies have focused on the numerical properties of MPM. This presentation introduces a global spectral analysis of the regular material point method. Contrary to previous studies, the analysis focuses on the numerical properties of the method in the spectral space. The amplification factor is derived as a function of the non- dimensional wave numbers. It provides insights into the stability and dissipative properties of the method for various CFL and Fourier numbers. The effect of the grid shape functions, number of particles per cell and their locations inside the grid cell are also analyzed. The EXAGOOP MPM solver (https://github.com/NREL/Exagoop.git) is developed at the National Renewable Energy Laboratory as a part of the NAWI UHPRO project and is based on the AMReX framework. A single-level, uniform cartesian grid is used as the background mesh, while the particle class in AMReX is used to manage the material point operations. Linear hat and B-splines are used as grid shape functions, while the time integration is performed using explicit Euler time integration. EXAGOOP is both CPU and GPU compatible and has been demonstrated to work well on multiple compute architectures. The performance of EXAGOOP on various computing architectures is presented along with its application to study compaction and embossing of high-pressure reverse osmosis membranes. The MPM solution accurately reproduces the membrane deformation. The deformed pore size and structure simulated using MPM also agree well with experimental SEM images.

material point method↗
DOE OSTI2024

On a Simplified Approach to Achieve Parallel Performance and Portability Across CPU and GPU Architectures

This paper presents software advances to easily exploit computer architectures consisting of a multi-core CPU and CPU+GPU to accelerate diverse types of high-performance computing (HPC) applications using a single code implementation. The paper describes and demonstrates the performance of the open-source C++ matrix and array (MATAR) library that uniquely offers: (1) a straightforward syntax for programming productivity, (2) usable data structures for data-oriented programming (DOP) for performance, and (3) a simple interface to the open-source C++ Kokkos library for portability and memory management across CPUs and GPUs. The portability across architectures with a single code implementation is achieved by automatically switching between diverse fine-grained parallelism backends (e.g., CUDA, HIP, OpenMP, pthreads, etc.) at compile time. The MATAR library solves many longstanding challenges associated with easily writing software that can run in parallel on any computer architecture. This work benefits projects seeking to write new C++ codes while also addressing the challenges of quickly making existing Fortran codes performant and portable over modern computer architectures with minimal syntactical changes from Fortran to C++. We demonstrate the feasibility of readily writing new C++ codes and modernizing existing codes with MATAR to be performant, parallel, and portable across diverse computer architectures.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2021

Performance Portability of Molecular Docking Miniapp On Leadership Computing Platforms

Rapidly changing computer architectures, such as those found at high-performance computing (HPC) facilities, present the need for mini-applications (miniapps) that capture essential algorithms used in large applications to test program performance and portability, aiding transitions to new systems. The COVID-19 pandemic has fueled a flurry of activity in computational drug discovery, including the use of supercomputers and GPU acceleration for massive virtual screens for therapeutics. Recent work targeting COVID-19 at the Oak Ridge Leadership Computing Facility (OLCF) used the GPU-accelerated program AutoDock-GPU to screen billions of compounds on the Summit supercomputer. In this paper we present the development of a new miniapp, miniAutoDock-GPU, that can be used to evaluate the performance and portability of GPU-accelerated protein-ligand docking programs on different computer architectures. These tests are especially relevant as facilities transition from petascale systems and prepare for upcoming exascale systems that will use a variety of GPU vendors. The key calculations, namely, the Lamarckian genetic algorithm combined with a local search using a Solis-Wets based random optimization algorithm, are implemented. We developed versions of the miniapp using several different programming models for GPU acceleration, including a version using the CUDA runtime API for NVIDIA GPUs, and the Kokkos middle-ware API which is facilitated by C++ template libraries. A third version, currently in progress, uses the HIP programming model. These efforts will help facilitate the transition to exascale systems for this important emerging HPC application, as well as its use on a wide range of heterogeneous platforms.

Thavappiragasam, Mathialakan↗
DOE OSTI2017

A Case Study on Neural Inspired Dynamic Memory Management Strategies for High Performance Computing.

As high performance computing architectures pursue more computational power there is a need for increased memory capacity and bandwidth as well. A multi-level memory (MLM) architecture addresses this need by combining multiple memory types with different characteristics as varying levels of the same architecture. How to efficiently utilize this memory infrastructure is an unknown challenge, and in this research we sought to investigate whether neural inspired approaches can meaningfully help with memory management. In particular we explored neurogenesis inspired re- source allocation, and were able to show a neural inspired mixed controller policy can beneficially impact how MLM architectures utilize memory.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2023

Special Topic on High Performance Computing in Chemical Physics

Computational modeling and simulation have become indispensable scientific tools in virtually all areas of chemical, biomolecular, and materials systems research. Computation can provide unique and detailed atomic level information that is difficult or impossible to obtain through analytical theories and experimental investigations. In addition, recent advances in micro-electronics have resulted in computer architectures with unprecedented computational capabilities, from the largest supercomputers to common desktop computers. In conclusion, combined with the development of new computational domain science methodologies and novel programming models and techniques, this has resulted in modeling and simulation resources capable of providing results at or better than experimental chemical accuracy and for systems in increasingly realistic chemical environments.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2013

Summer Student Internship working on the GPU

This summer internship consisted of learning computer programming skills and languages including Thrust, CUDA, C++, C and Linux. The application of this programming is for use in GPU, graphics processing units, that are processors that perform math intensive calculations rapidly in three dimensions typically in advanced video games (“NVIDIA GeForce…”). Our goal is to apply this technology towards exa-scale computing on the LANL supercomputing infrastructure. My mentors use these machines to do computations. The completed algorithms include KD tree and Top K. In order to access the GPU, CUDA was used. CUDA is a parallel computer architecture for general computing on the GPUs. There are different means by which to access CUDA. The first approach uses libraries, like Thrust, Linear Algebra, and Signal and Image Processing. Another approach parallelizes loops in Fortran or C and in the last approach people develop custom parallel algorithms using familiar language (“What is CUDA”). The algorithms I worked on this summer use the first approach of using the thrust library of parallel algorithms and data structures.

97 MATHEMATICS AND COMPUTING↗