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At least 91 records · Page 5

Erasure information for a Reed-Solomon decoder

Many Reed-Solomon decoders, including the one decoding the outer code for Voyager data from Uranus, assume that all symbols have the same chance of being correct or incorrect. Insome cases, like in a burst of incorrect symbols, this is not the case, and a Reed-Solomon decoder could make use of this. The use of information about bit quality sent to the Reed-Solomon from an (inner) Viterbi decoder is examined, as well as information about the error status of adjacent symbols in decoding interleaved Reed-Solomon encoded symbols. It is discovered that, in a region of interest, only about 0.04 dB can gained.

Pitt, G. H., III

Quantization effects in Viterbi decoding rate 1/n convolutional codes

A Viterbi decoder's performance loss due to quantizing data from the additive white Gaussian noise (AWGN) channel is studied. An optimal quantization scheme and branch metric calculation method are presented. The uniformly quantized channel capacity C(sub u)(q) is used to determine the smallest number of quantization bits q that does not cause a significant loss. The quantizer stepsize which maximizes C(sub u)(q) almost minimizes the decoder bit error rate (BER). However, a slightly larger stepsize is better, like the value that minimizes the Bhattacharyya bound. The range and renormalization of state metrics is analyzed, in particular for K = 15 decoders such as the Big Viterbi Decoder (BVD) for the Galileo mission. These results are required to design reduced hardware complexity Viterbi decoders with a negligible quantization loss.

Onyszchuk, I. M.

Multi-stage decoding of multi-level modulation codes

Various types of multi-stage decoding for multi-level modulation codes are investigated. It is shown that if the component codes of a multi-level modulation code and types of decoding at various stages are chosen properly, high spectral efficiency and large coding gain can be achieved with reduced decoding complexity. Particularly, it is shown that the difference in performance between the suboptimum multi-stage soft-decision maximum likelihood decoding of a modulation code and the single-stage optimum soft-decision decoding of the code is very small, only a fraction of dB loss in signal to noise ratio at a bit error rate (BER) of 10(exp -6).

Lin, Shu

High-speed architecture for the decoding of trellis-coded modulation

Since 1971, when the Viterbi Algorithm was introduced as the optimal method of decoding convolutional codes, improvements in circuit technology, especially VLSI, have steadily increased its speed and practicality. Trellis-Coded Modulation (TCM) combines convolutional coding with higher level modulation (non-binary source alphabet) to provide forward error correction and spectral efficiency. For binary codes, the current stare-of-the-art is a 64-state Viterbi decoder on a single CMOS chip, operating at a data rate of 25 Mbps. Recently, there has been an interest in increasing the speed of the Viterbi Algorithm by improving the decoder architecture, or by reducing the algorithm itself. Designs employing new architectural techniques are now in existence, however these techniques are currently applied to simpler binary codes, not to TCM. The purpose of this report is to discuss TCM architectural considerations in general, and to present the design, at the logic gate level, or a specific TCM decoder which applies these considerations to achieve high-speed decoding.

Osborne, William P.

High resolution decoding of Multi-Anode Microchannel Array detectors

The Multi-Anode Microchannel Array (MAMA) is a photon counting detector which utilizes a photocathode for photon to electron conversion, a microchannel plate (MCP) for signal amplification and a proximity focused anode array for position sensitivity. The detector electronics decode the position of an event through coincidence discrimination. The decoding algorithm which associates a given event with the appropriate pixel is determined by the geometry of the array. A new algorithm incorporated into a CMOS Application Specific Integrated Circuit (ASIC) decoder which improves the pixel spatial resolution is described. The new algorithm does not degrade the detector throughput and does not require any modifications to the detector tube. The standard MAMA detector has a pixel size of 25 x 25 square microns, but with the new decoder circuit the pixel size is reduced to 12.5 x 12.5 square microns. We have built the first set of decode electronics utilizing the new ASIC chips and report here on the first imaging tests of this system.

Kasle, David B.

Complementary Reliability-Based Decodings of Binary Linear Block Codes

This correspondence presents a hybrid reliability-based decoding algorithm which combines the reprocessing method based on the most reliable basis and a generalized Chase-type algebraic decoder based on the least reliable positions. It is shown that reprocessing with a simple additional algebraic decoding effort achieves significant coding gain. For long codes, the order of reprocessing required to achieve asymptotic optimum error performance is reduced by approximately 1/3. This significantly reduces the computational complexity, especially for long codes. Also, a more efficient criterion for stopping the decoding process is derived based on the knowledge of the algebraic decoding solution.

Fossorier, Marc P. C.

A Scalable Architecture of a Structured LDPC Decoder

We present a scalable decoding architecture for a certain class of structured LDPC codes. The codes are designed using a small (n,r) protograph that is replicated Z times to produce a decoding graph for a (Z x n, Z x r) code. Using this architecture, we have implemented a decoder for a (4096,2048) LDPC code on a Xilinx Virtex-II 2000 FPGA, and achieved decoding speeds of 31 Mbps with 10 fixed iterations. The implemented message-passing algorithm uses an optimized 3-bit non-uniform quantizer that operates with 0.2dB implementation loss relative to a floating point decoder.

optical communications

Method and apparatus for implementing a traceback maximum-likelihood decoder in a hypercube network

A method and a structure to implement maximum-likelihood decoding of convolutional codes on a network of microprocessors interconnected as an n-dimensional cube (hypercube). By proper reordering of states in the decoder, only communication between adjacent processors is required. Communication time is limited to that required for communication only of the accumulated metrics and not the survivor parameters of a Viterbi decoding algorithm. The survivor parameters are stored at a local processor's memory and a trace-back method is employed to ascertain the decoding result. Faster and more efficient operation is enabled, and decoding of large constraint length codes is feasible using standard VLSI technology.

Pollara-Bozzola, Fabrizio

Bounded-Angle Iterative Decoding of LDPC Codes

Bounded-angle iterative decoding is a modified version of conventional iterative decoding, conceived as a means of reducing undetected-error rates for short low-density parity-check (LDPC) codes. For a given code, bounded-angle iterative decoding can be implemented by means of a simple modification of the decoder algorithm, without redesigning the code. Bounded-angle iterative decoding is based on a representation of received words and code words as vectors in an n-dimensional Euclidean space (where n is an integer).

Dolinar, Samuel

VLSI design of turbo decoder for integrated communication system on a chip applications

A high-throughput low-power turbo decoder core has been developed for integrated communication system applications such as satellite communications, wireless LAN, digital TV, cable modem, Digital Video Broadcast (DVB), and xDSL systems. The turbo decoder is based on convolutional constituent codes, which outperform all other Forward Error Correction techniques. This turbo decoder core is parameterizable and can be modified easily to fit any size for advanced communication system-on-chip products. The turbo decoder core provides Forward Error Correction of up to 15 Mbits/sec on a 0.13-micron CMOS FPGA prototyping chip at a power of 0.1 watts.

turbo decoder

Real-Time Optical Receiver Decoder Architecture Changes for High-Speed Modes

The National Aeronautics and Space Administration (NASA) at Glenn Research Center (GRC) has developed an optical communications transmitter and receiver using Commercial-off-the-shelf (COTS) components. The goal of this project is to become fully compliant with Consultative Committee for Space Data Systems (CCSDS) High Photon Efficiency (HPE) Optical Communications Coding and Synchronization standard. The receive modem’s decoder has been modified using shift registers to enable the decoding of higher data rate pulse-position modulation (PPM) 4 and PPM-8 signals. PPM-4 and PPM-8 is then verified by comparing the codeword error rate (CWER) of a hardware implementation to a software simulation. The changes show the capability to decode PPM-4 and PPM-8 for a single decoder. This memorandum details the changes made, the performance achieved with the changes, and necessary future work.

PPM

Three-Receiver Quantum Broadcast Channels: Classical Communication with Quantum Non-unique Decoding

In network communication, it is common in broadcasting scenarios for there to exist a hierarchy among receivers based on information they decode due, for example, to different physical conditions or premium subscriptions. This hierarchy may result in varied information quality, such as higher-quality video for certain receivers. This is modeled mathematically as a degraded message set, indicating a hierarchy between messages to be decoded by different receivers, where the default quality corresponds to a common message intended for all receivers, a higher quality is represented by a message for a smaller subset of receivers, and so forth. We extend these considerations to quantum communication, exploring three-receiver quantum broadcast channels with two- and three-degraded message sets. Our technical tool involves employing quantum non-unique decoding, a technique we develop by utilizing the simultaneous pinching method. Here, we construct one-shot codes for various scenarios and find achievable rate regions relying on various quantum Rényi mutual information error exponents. Our investigation includes a comprehensive study of pinching across tensor product spaces, presenting our findings as the asymptotic counterpart to our one-shot codes. By employing the non-unique decoding, we also establish a simpler proof to Marton’s inner bound for two-receiver quantum broadcast channels without the need for more involved techniques. Additionally, we derive no-go results and demonstrate their tightness in special cases.

Salek, Farzin [Technical University of Munich (Ger

A model for sequential decoding overflow due to a noisy carrier reference

An approximate analysis of the effect of a noisy carrier reference on the performance of sequential decoding is presented. The analysis uses previously developed techniques for evaluating noisy reference performance for medium-rate uncoded communications adapted to sequential decoding for data rates of 8 to 2048 bits/s. In estimating the ten to the minus fourth power deletion probability thresholds for Helios, the model agrees with experimental data to within the experimental tolerances. The computational problem involved in sequential decoding, carrier loop effects, the main characteristics of the medium-rate model, modeled decoding performance, and perspectives on future work are discussed.

Layland, J. W.

The fast decoding of Reed-Solomon codes using fermat theoretic transforms and continued fractions

It is shown that Reed-Solomon (RS) codes can be decoded by using a fast Fourier transform algorithm over finite fields GF(F sub n) where F sub n is a Fermat prime, and continued fractions. This new transform decoding method is simpler than the standard method for RS codes. The computing time of this new decoding algorithm in software can be faster than the standard decoding method for RS codes.

Welch, L. R.

The fast decoding of Reed-Solomon codes using Fermat theoretic transforms and continued fractions

It is shown that Reed-Solomon (RS) codes can be decoded by using a fast Fourier transform (FFT) algorithm over finite fields GF(F sub n), where F sub n is a Fermat prime, and continued fractions. This new transform decoding method is simpler than the standard method for RS codes. The computing time of this new decoding algorithm in software can be faster than the standard decoding method for RS codes.

Reed, I. S.

Approximate maximum likelihood decoding of block codes

Approximate maximum likelihood decoding algorithms, based upon selecting a small set of candidate code words with the aid of the estimated probability of error of each received symbol, can give performance close to optimum with a reasonable amount of computation. By combining the best features of various algorithms and taking care to perform each step as efficiently as possible, a decoding scheme was developed which can decode codes which have better performance than those presently in use and yet not require an unreasonable amount of computation. The discussion of the details and tradeoffs of presently known efficient optimum and near optimum decoding algorithms leads, naturally, to the one which embodies the best features of all of them.

Greenberger, H. J.

Systolic VLSI Reed-Solomon Decoder

Decoder for digital communications provides high-speed, pipelined ReedSolomon (RS) error-correction decoding of data streams. Principal new feature of proposed decoder is modification of Euclid greatest-common-divisor algorithm to avoid need for time-consuming computations of inverse of certain Galois-field quantities. Decoder architecture suitable for implementation on very-large-scale integrated (VLSI) chips with negative-channel metaloxide/silicon circuitry.

Shao, H. M.

A sequential decoding performance analysis for International Comet Explorer

The effect of a noisy reference carrier on the performance of International Comet Explorer (ICE) Sequential decoder is analyzed. Ideal reference models for frame deletion probability are given for the Telemetry Processing Assembly (TPA) and the Linkabit (LS4815) sequential decoders. Based on these ideal reference models the deletion probability in the presence of noisy reference carrier is computed for both the high and the low data rate cases. A medium data rate performance model is then derived using an interpolation method. The derived medium rate performance model depends on the phase locked loop bandwidth-integration time product. Results are obtained for frame length 1024 bits, data bit rates of 1024 bps and 512 bps, modulation index of 60 deg, and threshold loop bandwidths of 10 Hz and 3 Hz. The medium rate model agrees with experimental data to within measurement uncertainty. For the 10 Hz loop bandwidth and modulation index of 60 deg at frame deletion rate of 0.0001, the required total received power to noise ratio is 36 dB. The analysis given is general and applicable to any sequential decoder, provided that the ideal reference model of the decoder is available.

Divsalar, D.