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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 91 records · Page 5

All sources NASA NTRS DOE OSTI

NASA NTRS2009

Mitigation selection and qualification recommendations for Xilinx Virtex, Virtex-II, and Virtex-4 field programmable gate arrays

This work discusses mitigation selection and qualification techniques for Xilinx reconfigurable field programmable gate arrays (FPGAs). The aim of the paper is to provide readers with a better understanding of the engineering/reliability/project cost relationship that occurs when developing a mitigation strategy for static random access memory (SRAM)-based FPGAs.

Allen, Gregory↗

DOE OSTI2019

Dynamic virtualized field-programmable gate array resource control for performance and reliability

A method for allocating field-programmable gate array (FPGA) resources includes monitoring a first operating metric for one or more computing devices, identifying a first portion of plurality of macro components of a set of one or more FPGA devices in the one or more computing devices, where the first portion is allocated for implementing one or more user defined functions. The method also includes, in response to a first change in the first operating metric, reallocating the first portion of the macro components for implementing a system function associated with the first operating metric, and generating a first notification indicating the reallocation of the first portion.

97 MATHEMATICS AND COMPUTING↗

NASA NTRS1983

Source-circuit design overview

The source circuit is the fundamental electrical building block of a large central-station array; it consists of a series-parallel network of solar cells that develops full system voltage. The array field is generally made up of a large number of parallel source circuits. Source-circuit electrical configuration is driven by a number of design considerations, which must be considered simultaneously. Array fault tolerance and hot spot heating endurance are examined in detail.

Ross, R. G., Jr.↗

NASA NTRS2018

Aeroacoustic Validation of Installed Low Noise Propulsion for NASA's N+2 Supersonic Airliner

An aeroacoustic test was conducted at NASA Glenn Research Center on an integrated propulsion system designed to meet noise regulations of ICAO Chapter 4 with 10EPNdB cumulative margin. The test had two objectives: to demonstrate that the aircraft design did meet the noise goal, and to validate the acoustic design tools used in the design. Variations in the propulsion system design and its installation were tested and the results compared against predictions. Far-field arrays of microphones measured the acoustic spectral directivity, which was transformed to full scale as noise certification levels. Phased array measurements confirmed that the shielding of the installation model adequately simulated the full aircraft and provided data for validating RANS-based noise prediction tools. Particle image velocimetry confirmed that the flow field around the nozzle on the jet rig mimicked that of the full aircraft and produced flow data to validate the RANS solutions used in the noise predictions. The far-field acoustic measurements confirmed the empirical predictions for the noise. Results provided here detail the steps taken to ensure accuracy of the measurements and give insights into the physics of exhaust noise from installed propulsion systems in future supersonic vehicles.

aeroacousti↗

NASA NTRS2018

Aeroacoustic Validation of Installed Low Noise Propulsion for NASA's N+2 Supersonic Airliner

supersonic↗

DOE OSTI2023

Field programmable spin arrays for scalable quantum repeaters

The large scale control over thousands of quantum emitters desired by quantum network technology is limited by the power consumption and cross-talk inherent in current microwave techniques. Here we propose a quantum repeater architecture based on densely-packed diamond color centers (CCs) in a programmable electrode array, with quantum gates driven by electric or strain fields. This ‘field programmable spin array’ (FPSA) enables high-speed spin control of individual CCs with low cross-talk and power dissipation. Integrated in a slow-light waveguide for efficient optical coupling, the FPSA serves as a quantum interface for optically-mediated entanglement. We evaluate the performance of the FPSA architecture in comparison to a routing-tree design and show an increased entanglement generation rate scaling into the thousand-qubit regime. Our results enable high fidelity control of dense quantum emitter arrays for scalable networking.

42 ENGINEERING↗

DOE OSTI2025

Radio Frequency Field Programable Gate Array Implementation of Reflectometry Cable Monitoring

This document describes the development of a field programable gate array (FPGA) radio frequency system on a chip (RF SoC) adaptation and evaluation of the single-board device to perform both Frequency Domain Reflectometry (FDR) and Spread Spectrum Time Domain Reflectometry (SSTDR) for offline and online cable testing. The work builds on and leverages the work of Pacific Northwest National Laboratory (PNNL) in airport millimeter wave technology by using the same development hardware employed in that program. The work is performed under sponsorship from the U.S. Department of Energy (DOE) Light Water Reactor Sustainability (LWRS) program and the task objective is to confirm and demonstrate feasibility to adapt FPGA technology for a cost-effective multiplexed single-board electronic module to perform cable tests that are equivalent to commercial and laboratory test instruments for FDR and SSTDR cable tests. The developed 2-channel (extendable to 7 channels) system was compared to dedicated and proven test instruments and shown to produce equivalent results on a range of cables and with a range of damage types. The FPGA reflectometry test board is one of several technologies that could facilitate implementation of online monitoring of safety critical cable systems.

42 ENGINEERING↗

NASA NTRS2004

RHrFPGA Radiation-Hardened Re-programmable Field-Programmable Gate Array

Viewgraphs on the development of the Radiation-Hardened Re-programmable Field-Programmable Gate Array (RHrFPGA) are presented. The topics include: 1) Radiation Test Suite; 2) Testing Interface; 3) Test Configuration; 4) Facilities; 5) Test Programs; 6) Test Procedure; and 7) Test Results. A summary of heavy ion and proton testing is also included.

Sanders, A. B.↗

NASA NTRS2011

Single-Event Effect (SEE) Survey of Advanced Reconfigurable Field Programmable Gate Arrays: NASA Electronic Parts and Packaging (NEPP) Program Office of Safety and Mission Assurance

The NEPP Reconfigurable Field-Programmable Gate Array (FPGA) task has been charged to evaluate reconfigurable FPGA technologies for use in space. Under this task, the Xilinx single-event-immune, reconfigurable FPGA (SIRF) XQR5VFX130 device was evaluated for SEE. Additionally, the Altera Stratix-IV and SiliconBlue iCE65 were screened for single-event latchup (SEL).

Xilinx Single-Event Effects (SEE) Test Consortium↗

NASA NTRS1990

Advanced technology optical telescopes IV; Proceedings of the Meeting, Tucson, AZ, Feb. 12-16, 1990. Parts 1 & 2

The present conference on the current status of large, advanced-technology optical telescope development and construction projects discusses topics on such factors as their novel optical system designs, the use of phased arrays, seeing and site performance factors, mirror fabrication and testing, pointing and tracking techniques, mirror thermal control, structural design strategies, mirror supports and coatings, and the control of segmented mirrors. Attention is given to the proposed implementation of the VLT Interferometer, the first diffraction-limited astronomical images with adaptive optics, a fiber-optic telescope using a large cross-section image-transmitting bundle, the design of wide-field arrays, Hartmann test data reductions, liquid mirrors, inertial drives for telescope pointing, temperature control of large honeycomb mirrors, evaporative coatings for very large telescope mirrors, and the W. M. Keck telescope's primary mirror active control system software.

Barr, Lawrence D.↗

NASA NTRS1990

Earth's external magnetic fields at low orbital altitudes

Under our Jun. 1987 proposal, Magnetic Signatures of Near-Earth Distributed Currents, we proposed to render operational a modeling procedure that had been previously developed to compute the magnetic effects of distributed currents flowing in the magnetosphere-ionosphere system. After adaptation of the software to our computing environment we would apply the model to low altitude satellite orbits and would utilize the MAGSAT data suite to guide the analysis. During the first year, basic computer codes to run model systems of Birkeland and ionospheric currents and several graphical output routines were made operational on a VAX 780 in our research facility. Software performance was evaluated using an input matchstick ionospheric current array, field aligned currents were calculated and magnetic perturbations along hypothetical satellite orbits were calculated. The basic operation of the model was verified. Software routines to analyze and display MAGSAT satellite data in terms of deviations with respect to the earth's internal field were also made operational during the first year effort. The complete set of MAGSAT data to be used for evaluation of the models was received at the end of the first year. A detailed annual report in May 1989 described these first year activities completely. That first annual report is included by reference in this final report. This document summarizes our additional activities during the second year of effort and describes the modeling software, its operation, and includes as an attachment the deliverable computer software specified under the contract.

Klumpar, D. M.↗

NASA NTRS2015

The Use of Field Programmable Gate Arrays (FPGA) in Small Satellite Communication Systems

This paper will describe the use of digital Field Programmable Gate Arrays (FPGA) to contribute to advancing the state-of-the-art in software defined radio (SDR) transponder design for the emerging SmallSat and CubeSat industry and to provide advances for NASA as described in the TAO5 Communication and Navigation Roadmap (Ref 4). The use of software defined radios (SDR) has been around for a long time. A typical implementation of the SDR is to use a processor and write software to implement all the functions of filtering, carrier recovery, error correction, framing etc. Even with modern high speed and low power digital signal processors, high speed memories, and efficient coding, the compute intensive nature of digital filters, error correcting and other algorithms is too much for modern processors to get efficient use of the available bandwidth to the ground. By using FPGAs, these compute intensive tasks can be done in parallel, pipelined fashion and more efficiently use every clock cycle to significantly increase throughput while maintaining low power. These methods will implement digital radios with significant data rates in the X and Ka bands. Using these state-of-the-art technologies, unprecedented uplink and downlink capabilities can be achieved in a 1/2 U sized telemetry system. Additionally, modern FPGAs have embedded processing systems, such as ARM cores, integrated inside the FPGA allowing mundane tasks such as parameter commanding to occur easily and flexibly. Potential partners include other NASA centers, industry and the DOD. These assets are associated with small satellite demonstration flights, LEO and deep space applications. MSFC currently has an SDR transponder test-bed using Hardware-in-the-Loop techniques to evaluate and improve SDR technologies.

Varnavas, Kosta↗

NASA NTRS2014

Single Event Analysis and Fault Injection Techniques Targeting Complex Designs Implemented in Xilinx-Virtex Family Field Programmable Gate Array (FPGA) Devices

An informative session regarding SRAM FPGA basics. Presenting a framework for fault injection techniques applied to Xilinx Field Programmable Gate Arrays (FPGAs). Introduce an overlooked time component that illustrates fault injection is impractical for most real designs as a stand-alone characterization tool. Demonstrate procedures that benefit from fault injection error analysis.

Single Event Upset Testing↗

NASA NTRS2017

NEPP Update of Independent Single Event Upset Field Programmable Gate Array Testing

This presentation provides a NASA Electronic Parts and Packaging (NEPP) Program update of independent Single Event Upset (SEU) Field Programmable Gate Array (FPGA) testing including FPGA test guidelines, Microsemi RTG4 heavy-ion results, Xilinx Kintex-UltraScale heavy-ion results, Xilinx UltraScale+ single event effect (SEE) test plans, development of a new methodology for characterizing SEU system response, and NEPP involvement with FPGA security and trust.

Field Programmable Gate Array (FPGA); Triple Modul↗

NASA NTRS2006

Self-Adaptive System based on Field Programmable Gate Array for Extreme Temperature Electronics

In this work, we report the implementation of a self-adaptive system using a field programmable gate array (FPGA) and data converters. The self-adaptive system can autonomously recover the lost functionality of a reconfigurable analog array (RAA) integrated circuit (IC) [3]. Both the RAA IC and the self-adaptive system are operating in extreme temperatures (from 120 C down to -180 C). The RAA IC consists of reconfigurable analog blocks interconnected by several switches and programmable by bias voltages. It implements filters/amplifiers with bandwidth up to 20 MHz. The self-adaptive system controls the RAA IC and is realized on Commercial-Off-The-Shelf (COTS) parts. It implements a basic compensation algorithm that corrects a RAA IC in less than a few milliseconds. Experimental results for the cold temperature environment (down to -180 C) demonstrate the feasibility of this approach.

adaptive hardwares↗

NASA NTRS2006

Development of a Low-Cost and High-speed Single Event Effects Testers based on Reconfigurable Field Programmable Gate Arrays (FPGA)

A viewgraph presentation on the development of a low cost, high speed tester reconfigurable Field Programmable Gata Array (FPGA) is shown. The topics include: 1) Introduction; 2) Objectives; 3) Tester Descriptions; 4) Tester Validations and Demonstrations; 5) Future Work; and 6) Summary.

Howard, J. W.↗

NASA NTRS2009

Systems and methods for detecting a failure event in a field programmable gate array

An embodiment generally relates to a method of self-detecting an error in a field programmable gate array (FPGA). The method includes writing a signature value into a signature memory in the FPGA and determining a conclusion of a configuration refresh operation in the FPGA. The method also includes reading an outcome value from the signature memory.

Ng, Tak-Kwong↗

NASA NTRS1992

Proposed Ka-band array-fed near field Cassegrain system for NASA's Polar Probe Mission

A Ka-band array-fed near-field Cassegrain antenna envisioned for NASA's Solar Probe Mission is the basis of the present spacecraft telecommunications system, which is designed for operation at X-band up/downlink and Ka-band downlink. The hexagonal array employed, which is located at the Cassegrain point of the 0.75-m reflector, encompasses 37 active elements; each of these contains 1/4-W HEMT amplifiers. Relative to a TWTA-based system, this active array feed reduces mass, increases dc power efficiency, enhanced reliability, and reduces volume requirements.

Kellogg, K.↗