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Impurity diffusion process produces precision silicon semiconductor junctions economically and fast. Oxide is deposited on a silicon wafer and a controlled concentration of impurity atoms in gaseous form is simultaneously introduced into the reaction.
Results of computer calculations using a one dimensional model of the silicon tandem junction solar cell with both front and back current collection are presented. Using realistically achievable geometrical and material parameters, the model predicts that with base widths of 50 micrometers and 100 micrometers and base resistivities between 1 ohm/cm and 20 ohm/cm, beginning of life efficiencies of 14% to 17% and end of life efficiencies of 12% to 14%, after about seven years in synchronous orbit, can be obtained.
Electron microscopy analysis of microinhomogeneities in commercial Si used in preparation of p-n junction devices
Large area GaAs/Ge cells offer substantial promise for increasing the power output from existing silicon solar array designs and for providing an enabled technology for missions hitherto impossible using silicon. Single junction GaAs/Ge cells offer substantial advantages in both size, weight, and cost compared to GaAs cells but the efficiency is limited to approximately 19.2 to 20 percent AMO. The thermal absorptance of GaAs/Ge cells is also worse than GaAs/GaAs cells (0.88 vs 0.81 typ.) due to the absorption in the Ge substrate. On the other hand dual junction GaAs/Ge cells offer efficiencies up to ultimately 24 percent AMO in sizes up to 8 x 8 cm but there are still technological issues remaining to achieve current matching in the GaAs and Ge cells. This can be achieved through tuned antireflection (AR) coatings, improved quality of the GaAs growth, improved quality Ge wafers and the use of a Back Surface Field (BSF)/Back Surface Reflector (BSR) in the Ge cell. Although the temperature coefficients of efficiency and voltage are higher for dual junction GaAs/Ge cells, it has been shown elsewhere that for typical 28 C cell efficiencies of 22 percent (dual junction) vs 18.5 percent (single junction) there is a positive power tradeoff up to temperatures as high as 120 C. Due to the potential ease of fabrication of GaAs/Ge dual junction cells there is likely to be only a small cost differential compared to single junction cells.
Commercial silicon heterojunction photovoltaic modules, known as amorphous-silicon-based heterojunction with intrinsic thin-film layer (HIT) modules, show average degradation after 10 years in the field. HIT modules weathered outdoors in Colorado and Florida display mostly uniform decreases in intensity when mapped with photoluminescence (PL) imaging compared to a control module. Flash-table-based current-voltage curves show that degradation is dominated by voltage loss. Samples are cored from each of the modules, and deep level transient spectroscopy (DLTS) detects three electron-trap defect states in all modules with activation energies of electron emission from the defects of 0.07, 0.16, and 0.50 eV. DLTS measurements on the weathered modules show an additional deep-level, electron-trap defect state with an activation energy of 0.51 eV and a trap density of approximately 10 12 cm –3 . The capture rate is measured using varying short filling pulse times, and the resulting capture cross section is estimated to be 1.1x10 –16 cm 2 . The development of the weathering-related defect level correlates to decreases in carrier lifetime, PL intensity, and module voltage. Various depths of the space charge region are probed with increments in applied reverse bias and filling-pulse bias. Furthermore, this DLTS depth profiling shows a trend of trap density increasing with less applied reverse bias, suggesting that the weathering-related defect increases carrier recombination toward the interface between the bulk silicon wafer and the junction-forming amorphous-silicon passivation layers.
Photovoltaic (PV) technology offers an economic and sustainable solution to the challenge of increasing energy demand in times of global warming. The world PV market is currently dominated by the homo-junction crystalline silicon (c-Si) PV technology based on high temperature diffused p-n junctions, featuring a low power conversion efficiency (PCE). Recent years have seen the successful development of Si heterojunction technologies, boosting the PCE of c-Si solar cells over 26%. This article reviews the development status of high-efficiency c-Si heterojunction solar cells, from the materials to devices, mainly including hydrogenated amorphous silicon (a-Si:H) based silicon heterojunction technology, polycrystalline silicon (poly-Si) based carrier selective passivating contact technology, metal compounds and organic materials based dopant-free passivating contact technology. The application of silicon heterojunction solar cells for ultra-high efficiency perovskite/c-Si and III-V/c-Si tandem devices is also reviewed. In the last, the perspective, challenge and potential solutions of silicon heterojunction solar cells, as well as the tandem solar cells are discussed.
Abstract The rapidly increasing solar conversion efficiency (PCE) of hybrid organic–inorganic perovskite (HOIP) thin‐film semiconductors has triggered interest in their use for direct solar‐driven water splitting to produce hydrogen. However, application of these low‐cost, electronic‐structure‐tunable HOIP tandem photoabsorbers has been hindered by the instability of the photovoltaic‐catalyst‐electrolyte (PV+E) interfaces. Here, photolytic water splitting is demonstrated using an integrated configuration consisting of an HOIP/n + silicon single junction photoabsorber and a platinum (Pt) thin film catalyst. An extended electrochemical (EC) lifetime in alkaline media is achieved using titanium nitride on both sides of the Si support to eliminate formation of insulating silicon oxide, and as an effective diffusion barrier to allow high‐temperature annealing of the catalyst/TiO 2 ‐protected‐n + silicon interface necessary to retard electrolytic corrosion. Halide composition is examined in the (FA 1‐x Cs x )PbI 3 system with a bandgap suitable for tandem operation. A fill factor of 72.5% is achieved using a Spiro‐OMeTAD‐hole‐transport‐layer (HTL)‐based HOIP/n + Si solar cell, and a high photocurrent density of −15.9 mA cm −2 (at 0 V vs reversible hydrogen electrode) is attained for the HOIP/n + Si/Pt photocathode in 1 m NaOH under simulated 1‐sun illumination. While this thin‐film design creates stable interfaces, the intrinsic photo‐ and electro‐degradation of the HOIP photoabsorber remains the main obstacle for future HOIP/Si tandem PEC devices.
Effect of mechanical strain on electrical characteristics of germanium and silicon p-n junction devices
Abstract We present an open-system quantum-mechanical 3D real-space study of the conduction band structure and conductive properties of two semiconductor systems, interesting for their beyond-Moore and quantum computing applications: phosphorus $$\delta$$ δ -layers and P $$\delta$$ δ -layer tunnel junctions in silicon. In order to evaluate size quantization effects on the conductivity, we consider two principal cases: nanoscale finite-width structures, used in transistors, and infinitely-wide structures, electrical properties of which are typically known experimentally. For devices widths $$W<10$$ W < 10 nm, quantization effects are strong and it is shown that the number of propagating modes determines not only the conductivity, but the distinctive spatial distribution of the current-carrying electron states. For $$W>10$$ W > 10 nm, the quantization effects practically vanish and the conductivity tends to the infinitely-wide device values. For tunnel junctions, two distinct conductivity regimes are predicted due to the strong conduction band quantization.
This work updates recent progress made by NASA Glenn Research Center on further advancement of its uniquely durable silicon carbide junction field effect transistor and resistor (SiC JFET-R) integrated circuit (IC) technology since HiTEC 2021. Key fabrication process improvements compared to earlier NASA Glenn IC prototype runs have been ascertained via extensive “back end of line” (BEOL) processing experiments conducted on practice wafers over the past two years. The resulting changes to the BEOL process flow employed in the fabrication of “Generation 12” SiC JFET-R wafers are described. The NASA Glenn SiC JFET-R IC prototype “Generation 12” chipset design realizes significantly higher complexity digital and analog integrated ICs aimed at flexibly implementing a broad variety of mission-enabling extreme-environment electronics demonstrations. SPICE simulations have verified circuit designs ranging from simple amplification of analog sensor signals up through long-duration Venus lander operations and microprocessor-based of electric motor drive.
This work updates recent progress made by NASA Glenn Research Center on further advancement of its uniquely durable silicon carbide junction field effect transistor and resistor (SiC JFET-R) integrated circuit (IC) technology since HiTEC 2021. Key fabrication process improvements compared to earlier NASA Glenn IC prototype runs have been ascertained via extensive “back end of line” (BEOL) processing experiments conducted on practice wafers over the past two years. The resulting changes to the BEOL process flow employed in the fabrication of “Generation 12” SiC JFET-R wafers are described. The NASA Glenn SiC JFET-R IC prototype “Generation 12” chipset design realizes significantly higher complexity digital and analog integrated ICs aimed at flexibly implementing a broad variety of mission-enabling extreme-environment electronics demonstrations. SPICE simulations have verified circuit designs ranging from simple amplification of analog sensor signals up through long-duration Venus lander operations and microprocessor-based of electric motor drive.
This work updates recent progress made by NASA Glenn Research Center on further advancement of its uniquely durable silicon carbide junction field effect transistor and resistor (SiC JFET-R) integrated circuit (IC) technology since HiTEC 2021. Key fabrication process improvements compared to earlier NASA Glenn IC prototype runs have been ascertained via extensive “back end of line” (BEOL) processing experiments conducted on practice wafers over the past two years. The resulting changes to the BEOL process flow employed in the fabrication of “Generation 12” SiC JFET-R wafers are described. The NASA Glenn SiC JFET-R IC prototype “Generation 12” chipset design realizes significantly higher complexity digital and analog integrated ICs aimed at flexibly implementing a broad variety of mission-enabling extreme-environment electronics demonstrations. SPICE simulations have verified circuit designs ranging from simple amplification of analog sensor signals up through long-duration Venus lander operations and microprocessor-based of electric motor drive.
To assist the US Department of Energy in defining a course for Office of Nuclear Energy–funded radiation-hardened (rad-hard) electronics research, Oak Ridge National Laboratory (ORNL) will focus on three main tasks in FY21. The first task will investigate the survivability of silicon junction-gate field-effect transistors (Si-JFETs) through a 100 Mrad total ionizing dose (TID) experiment and report the test results. The second task will investigate wide bandgap (WBG)-based JFET devices and sources. The third task is an investigation into commercially available systems and components and will be performed to determine whether a standardized list of devices can be identified for reactor instrumentation application. If the devices are feasible, then this list will provide direction to designers and equipment suppliers for selection of components to meet specific reactor requirements.
Piezojunction effect and silicon needle considered as sensory devices in accelerometers and transducers
Silicon solar cell with drift fields of various widths and magnitudes, considering performance changes before and after radiation
Micrometeroid damage of n-p silicon and CdS solar cells
Possible degradation effects produced in uncovered and covered N/P silicon solar cells by simulated micrometeoroid exposure
High energy proton irradiation and annealing of n and p type Si, comparing proton and electron damage