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At least 91 records · Page 5

In-Flight Observations of Long-Term Single Event Effect(SEE)Performance on Orbview-2 and Xray Timing Explorer(XTE)Solid State Recorders (SSR)

This paper presents Single Event Effect (SEE) in-flight data on Solid State Recorders (SSR) that have been collected over a long period of time for two NASA spacecraft: Orbview-2 and XTE. SEE flight data on solid-state memories give an opportunity to study the behavior in space of SEE sensitive commercial devices. The actual Single Event Upset (SEU) rates can be compared with the calculated rates based on environment models and ground test data. The SEE mitigation schemes can also be evaluated in actual implementation. A significant amount of data has already been published concerning observed SEE effects on memories in space. However, most of the data presented cover either a short period of time or a small number of devices. The data presented here has been collected on a large number of devices during several years. This allows statistically significant information about the effect of space weather fluctuations on SEU rates, and the effectiveness of SEE countermeasures used to be analyzed. Only Orbview-2 data is presented in this summary. XTE data will be included in the final paper.

Poivey, Christian

Single-Event Effects Test Report Lattice Semiconductor, LCMXO3D-9400HC-5BG484I Field Programmable Gate Array

The purpose of this test was to characterize single event effects (SEE) in the LCMXO3D-9400HC-5BG484I, a low power and low density field programmable gate array (FPGA). The SEE concerns for the device that were investigated in this testing are single event upsets (SEUs) in the configuration static random-access memory (SRAM), SEUs in the FPGA fabric, single event latch up (SEL), and single event functional interrupts (SEFIs). Testing was conducted at Lawrence Berkeley National Laboratory (LBNL) on August 26th, 2024 and August 28th, 2024.

Adia M Wood

Radiation Requirements and Requirements Flowdown: Single Event Effects (SEEs) and Requirements

This short course session provides: (1) an overview of the single particle-induced hazard for space system as they apply in the natural space environment. This shall focus on the implementation of a single event effect hardness assurance (SEEHA) program for systems including system engineering approach and mitigation of effects. (2) The final portion of this session shell provide relevant real-life examples of in-flight performance of systems.

LaBel, Kenneth A.

Single Event Effect Testing of the SSDI SFF6661 N-Channel Power MOSFET

This irradiation campaign was performed to evaluate the destructive single event effect (SEE) susceptibility of a n-channel power MOSFET from SSDI for space-based instrumentation. Testing was performed at Michigan State University’s (MSU) Facility for Rate Isotope Beams (FRIB) using an LET of 50.5 MeV·cm 2 /mg

Landen D. Ryder

NASA Engineering and Safety Center Technical Bulletin No. 19-01-1: Mitigating Risks of Single-Event Effects in Space Applications

Since most Electrical, Electronic, and Electromechanical (EEE) parts are intended for terrestrial applications, they are susceptible to a range of radiation threats in the space environment if the resulting effects are not properly characterized and mitigated. Even specially designed radiation-hardened parts may not be tolerant to all types of radiation effects. Radiation hardness is a multi-dimensional property of any part that describes intrinsic abilities to tolerate various radiation environments [1,2]. Effects to be concerned with include total ionizing dose, total non-ionizing dose, and single-event effects (SEE) – all of which depend on the mission, environment, application, and lifetime. Radiation effects concerns may be the same whether a EEE part is Commercial-Off-The-Shelf (COTS), MIL-SPEC, or some other variant, all of which are susceptible to the same radiation threats [3]. SEE consequences range from recoverable faults to catastrophic failure. Like other random faults, SEE can be mitigated with informed circuit design practices at the device, card, and/or system level.

Single-event effects

Single-event Effect Report for EPC Series eGaN FETs: Proton Testing for SEE and TNID Effects

Previous testing of the Enhanced Power Conversion (EPC) eGaN FETs showed sensitivity to destructive single-event effects (SEE) effects to heavy ions. The presence of tungsten plugs in the gate area raises concerns that the device may be vulnerable to SEE from protons. Irradiation of biased and unbiased devices with heavy ion has results in some damage suspected of being due to total non-ionizing dose (TNID). Proton irradiation is a better radiation type to study this effect. This study presents the results of testing device with protons for SEE and TNID. No SEE in the EPC2012 device, the most sensitive device to SEE, were seen with 53 MeV protons at several angles. The devices continued to function after 1.5 Mrad (Si) of proton dose with only a slight shift in parameters. These results suggest that gross TNID will not be a factor in using these devices nor suffer from SEE due to protons. However, the device should be tested at with 500 MeV protons to guarantee to immunity proton SEE.

Scheick, Leif

Guideline for Single-Event Effect (SEE) Testing of System on a Chip (SOC) Devices

The use of complex single and multicore processors with significant cache memory, on-chip peripherals, memory controllers, and high speed input/output (IO) that integrate many of the parts of a traditional computer system is becoming more common in space applications. Such devices are often referred to as system on a chip devices (SOCs), even though the term is used somewhat inaccurately due to the lack of analog and mixed signal subcircuits. These devices are complex combinations of single- or multi-core processors with memory controllers, high-speed input/output (IO), and other peripheral structures that formerly would have been handled by off-chip resources. In the past the processors were tested for single event effects (SEE) separately, and the peripherals were often put into custom application-specific integrated circuits (ASICs) along with other resources required by the user. Performance and cost pressures have pushed commercial devices to incorporate many of the functional blocks into a single chip, an SOC. The NASA Electronic Parts and Packaging Program (NEPP) has been examining ways to perform SEE radiation hardness assurance (RHA) testing of these processor-centric SOCs to achieve reasonable understanding of their performance in space missions.

Guertin, Steven M.