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At least 91 records · Page 5
All sourcesNASA NTRSDOE OSTI
NASA NTRSDate not supplied

Electrical and Dielectric Characterizations of HTCC Electronic Packages for High Temperature Harsh Environment Applications

A prototype high temperature co-fired ceramic (HTCC) alumina packaging system composed of a 32-I/Os package and a compatible circuit board was previously developed and demonstrated for long term operation in 500 °C environments. The electrical / dielectric parasitic parameters of that chip level package were characterized and reported. This co-fired packaging system with platinum (Pt) conductor has successfully facilitated tests of silicon carbide (SiC) analog and digital integrated circuits (ICs) developed at NASA GRC at 500°C for up to 10,000 hours in ambient oven environment and 60 earth days in Venus surface environment with simulated temperature, pressure, and chemical constituents. Based on these previous results, this paper introduces new designs of Pt-HTCC packages with 16, 24, and 44 I/Os for packaging a new generation SiC ICs with 8, 24, 56, 62, and 72 I/Os to be tested in high temperature harsh environments. The package with 44 I/Os is specifically designed for the new SiC ICs with 56, 62, and 72-I/Os and electrical connection needs, the power pads of this package are consolidated, and an array of I/O pads distributed on separated vertical levels (inside the package) is used to control the overall package dimensions and mitigate the parasitic effects at high temperatures. This paper will present the detailed design of these chip-level packages and results of electrical and dielectric characterization of these newly fabricated chip-level Pt-HTCC packages.

High temperature↗
NASA NTRS2010

Packaging and Embedded Electronics for the Next Generation

This viewgraph presentation describes examples of electronic packaging that protects an electronic element from handling, contamination, shock, vibration and light penetration. The use of Hermetic and non-hermetic packaging is also discussed. The topics include: 1) What is Electronic Packaging? 2) Why Package Electronic Parts? 3) Evolution of Packaging; 4) General Packaging Discussion; 5) Advanced non-hermetic packages; 6) Discussion of Hermeticity; 7) The Class Y Concept and Possible Extensions; 8) Embedded Technologies; and 9) NEPP Activities.

Sampson, Michael J.↗
NASA NTRS2004

AIN-Based Packaging for SiC High-Temperature Electronics

Packaging made primarily of aluminum nitride has been developed to enclose silicon carbide-based integrated circuits (ICs), including circuits containing SiC-based power diodes, that are capable of operation under conditions more severe than can be withstood by silicon-based integrated circuits. A major objective of this development was to enable packaged SiC electronic circuits to operate continuously at temperatures up to 500 C. AlN-packaged SiC electronic circuits have commercial potential for incorporation into high-power electronic equipment and into sensors that must withstand high temperatures and/or high pressures in diverse applications that include exploration in outer space, well logging, and monitoring of nuclear power systems. This packaging embodies concepts drawn from flip-chip packaging of silicon-based integrated circuits. One or more SiC-based circuit chips are mounted on an aluminum nitride package substrate or sandwiched between two such substrates. Intimate electrical connections between metal conductors on the chip(s) and the metal conductors on external circuits are made by direct bonding to interconnections on the package substrate(s) and/or by use of holes through the package substrate(s). This approach eliminates the need for wire bonds, which have been the most vulnerable links in conventional electronic circuitry in hostile environments. Moreover, the elimination of wire bonds makes it possible to pack chips more densely than was previously possible.

Savrun, Ender↗
NASA NTRS2004

Qualification and Reliability for MEMS and IC Packages

Advanced IC electronic packages are moving toward miniaturization from two key different approaches, front and back-end processes, each with their own challenges. Successful use of more of the back-end process front-end, e.g. microelectromechanical systems (MEMS) Wafer Level Package (WLP), enable reducing size and cost. Use of direct flip chip die is the most efficient approach if and when the issues of know good die and board/assembly are resolved. Wafer level package solve the issue of known good die by enabling package test, but it has its own limitation, e.g., the I/O limitation, additional cost, and reliability. From the back-end approach, system-in-a-package (SIAP/SIP) development is a response to an increasing demand for package and die integration of different functions into one unit to reduce size and cost and improve functionality. MEMS add another challenging dimension to electronic packaging since they include moving mechanical elements. Conventional qualification and reliability need to be modified and expanded in most cases in order to detect new unknown failures. This paper will review four standards that already released or being developed that specifically address the issues on qualification and reliability of assembled packages. Exposures to thermal cycles, monotonic bend test, mechanical shock and drop are covered in these specifications. Finally, mechanical and thermal cycle qualification data generated for MEMS accelerometer will be presented. The MEMS was an element of an inertial measurement unit (IMU) qualified for NASA Mars Exploration Rovers (MERs), Spirit and Opportunity that successfully is currently roaring the Martian surface

inertial measurement unit↗
NASA NTRS2004

Motor/Generator and Inverter Characterization for Flywheel System Applications

The Advanced Electrical Systems Development Branch at NASA Glenn Research Center (GRC) has been involved in the research and development of high speed flywheels systems for satellite energy storage and attitude applications. These flywheels will serve as replacement for chemical nickel hydrogen, nickel cadmium batteries and gyroscopic wheels. The advantages of using flywheel systems for energy storage on satellites are high energy density, high power density, long life, deep depth of discharge, and broad operating temperature ranges. A flywheel system for space applications consist of a number of flywheel modules, the motor/generator and magnetic bearing, and an electronics package. The motor/generator electronics package includes a pulse-width modulated inverter that drives the flywheel permanent magnet motor/generator located at one end of the shaft. This summer, I worked under the direct supervision of my mentor, Walter Santiago, and the goal for this summer was to characterize motor generator and inverter attributes in order to increase their viability as a more efficient energy storage source for space applications. To achieve this goal, magnetic field measurements around the motor/generator permanent magnet and the impedance of the motor/generator three phase windings were characterized, and a recreation of the inverter pulse width modulated control system was constructed. The Flywheel modules for space use are designed to maximize energy density and minimize loss, and attaining these values will aid in locating and reducing losses within the flywheel system as a whole, making flywheel technology more attractive for use as energy storage in future space applications.

Tamarcus, Jeffries L.↗
DOE OSTI2024

High-throughput electronic structure package

We introduce HTESP (High-Throughput Electronic Structure Package), an automated tool designed for high-throughput ab initio calculations. HTESP simplifies the entire workflow, including data extraction, input files generation, calculation submission, result collection, and plotting. The package is implemented in Python and Bash languages. In this paper, we provide detailed information about the package, its installation process and some illustrative examples to demonstrate its usage. Additionally, the package includes comprehensive online documentation on input parameters and tutorials to assist users.

Nepal, NirajK↗
NASA NTRSDate not supplied

The State of NEPP NASA Electronic Parts & Packaging Program

The presentation is about the NASA Electronic Parts & Packaging (NEPP) Program. The mission statement of NEPP, “Provide NASA’s leadership for developing and maintaining guidance for the screening, qualification, test, and reliable use of EEE parts by NASA, in collaboration with other government agencies and industry” is dissected and explained using examples.

manufacturing↗
NASA NTRS1966

Packaging of electronic modules

Study of design approaches that are taken toward optimizing the packaging of electronic modules with respect to size, shape, component orientation, interconnections, and structural support. The study does not present a solution to specific packaging problems, but rather the factors to be considered to achieve optimum packaging designs.

Katzin, L.↗
NASA NTRS1990

Custom electronic subsystems for the laboratory telerobotic manipulator

The National Aeronautics and Space Administration (NASA) Space Station Program presents new opportunities for the application of telerobotic and robotic systems. The Laboratory Telerobotic Manipulator (LTM) is a highly advanced 7 degrees-of-freedom (DOF) telerobotic/robotic manipulator. It was developed and built for the Automation Technology Branch at NASA's Langley Research Center (LaRC) for work in research and to demonstrate ground-based telerobotic manipulator system hardware and software systems for future NASA applications in the hazardous environment of space. The LTM manipulator uses an embedded wiring design with all electronics, motor power, and control and communication cables passing through the pitch-yaw differential joints. This design requires the number of cables passing through the pitch/yaw joint to be kept to a minimum. To eliminate the cables needed to carry each pitch-yaw joint's sensor data to the VME control computers, a custom-embedded electronics package for each manipulator joint was developed. The electronics package collects and sends the joint's sensor data to the VME control computers over a fiber optic cable. The electronics package consist of five individual subsystems: the VME Link Processor, the Joint Processor and the Joint Processor power supply in the joint module, the fiber optics communications system, and the electronics and motor power cabling.

Glassell, R. L.↗
NASA NTRS1977

Microelectronics/electronic packaging potential

The trend toward smaller and lighter electronic packages was examined. It is suggested that electronic packaging engineers and microelectronic designers closely associate and give full attention to optimization of both disciplines on all product lines. Extensive research and development work underway to explore innovative ideas and make new inroads into the technology base, is expected to satisfy the demands of the 1980's.

Sandeau, R. F.↗
NASA NTRS2007

The NASA Electronic Parts and Packaging (NEPP) Program: Insertion of New Electronics Technologies

This viewgraph presentation gives an overview of NASA Electronic Parts and Packaging (NEPP) Program's new electronics technology trends. The topics include: 1) The Changing World of Radiation Testing of Memories; 2) Even Application-Specific Tests are Costly!; 3) Hypothetical New Technology Part Qualification Cost; 4) Where we are; 5) Approaching FPGAs as a More Than a "Part" for Reliability; 6) FPGAs Beget Novel Radiation Test Setups; 7) Understanding the Complex Radiation Data; 8) Tracking Packaging Complexity and Reliability for FPGAs; 9) Devices Supporting the FPGA Need to be Considered; 10) Summary of the New Electronic Technologies and Insertion into Flight Programs Workshop; and 11) Highlights of Panel Notes and Comments

LaBel, Kenneth A.↗
DOE OSTI2026

Spatiotemporal Learning in Power Modules: Wavelet-Enhanced Forecasting of Thermomechanical Degradation

Detecting internal defects in power electronics packages is critical for their performance and reliability, especially under extreme operating conditions, as these defects can lead to catastrophic failure if not properly addressed. Confocal scanning acoustic microscopy (C-SAM) plays a key role in the nondestructive evaluation of bond layer degradation within a power electronics package by detecting defects such as delamination, voids, and cracks. However, accurately quantifying and predicting these defects from C-SAM images remains a significant challenge due to the low noise-to-signal ratio, which typically arises from both imaging process and bond patterns itself. In this paper, we explore machine learning strategies for processing C-SAM images and providing predictive models of defect growth. We use C-SAM images of sintered copper and sintered silver samples, which are obtained under accelerated thermal experiments, as the representative dataset for our study. We investigate the effect of Fourier transforms and wavelet transforms on these datasets to remove high-frequency noise and address noise across multiple scales with histogram equalization to enhance the contrast and improve the visibility of defects. As a result, defect boundaries can be clearly distinguished, enabling more accurate tracking of their growth over time. We then employ different time-series forecasting algorithms on the denoised images to formulate an image-based lifetime prediction model. Statistical models and deep-learning techniques are trained on images obtained in the early stages of thermal shock, and defect growth in the later stages is predicted. Our work serves as a preliminary attempt to improve the accuracy of lifetime prediction models of power electronics packages, which is critical under extreme operating environments.

24 POWER TRANSMISSION AND DISTRIBUTION↗
NASA NTRS2000

Packaging Technology Developed for High-Temperature SiC Sensors and Electronics

A ceramic- and thick-film-materials-based prototype electronic package designed for silicon carbide (SiC) high-temperature sensors and electronics has been successfully tested at 500 C in an oxygen-containing air environment for 500 hours. This package was designed, fabricated, assembled, and electronically evaluated at the NASA Glenn Research Center at Lewis Field with an in-house-fabricated SiC semiconductor test chip. High-temperature electronics and sensors are necessary for harsh-environment space and aeronautical applications, such as space missions to the inner solar system or the emission control electronics and sensors in aeronautical engines. Single-crystal SiC has such excellent physical and chemical material properties that SiC-based semiconductor electronics can operate at temperatures over 600 C, which is significantly higher than the limit for Si-based semiconductor devices. SiC semiconductor chips were recently demonstrated to be operable at temperatures as high as 600 C, but only in the probe station environment because suitable packaging technology for sensors and electronics at temperatures of 500 C and beyond did not exist. Thus, packaging technology for SiC-based sensors and electronics is immediately needed for both application and commercialization of high-temperature SiC sensors and electronics. In response to this need, researchers at Glenn designed, fabricated, and assembled a prototype electronic package for high-temperature electronics, sensors, and microelectromechanical systems (MEMS) using aluminum nitride (AlN) substrate and gold (Au) thick-film materials. This prototype package successfully survived a soak test at 500 C in air for 500 hours. Packaging components tested included thick-film high-temperature metallization, internal wire bonds, external lead bonds, and a SiC diode chip die-attachment. Each test loop, which was composed of thick-film printed wire, wire bond, and lead bond was subjected to a 50-mA direct current for 250 hours at 500 C.

Chen, Liang-Yu↗