SEARCH · Search NASA
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.
Report describes effects of power and temperature overstress on Semtech and Micro Semiconductor devices. Only two Semtech diodes failed catastrophically. Testing on Micro Semiconductor devices stopped because failure limit was reached. Micro diodes suffered lead separation.
Report evaluates effects of power and temperature overstress on Raytheon and National Semiconductor devices. Breakdown voltage hysteresis, possibly due to contamination of semiconductor by gold from leads, was prominent.
Report describes effects of power and temperature overstress on Fairchild and National Semiconductor devices. 160 hour temperature stress was only test to cause notable damage. Loss of gain is principal failure mode.
Report evaluates effects of power and temperature overstress on Motorola and National Semiconductor devices. National Semiconductor devices exceeded 50 percent failure after 160 hours at 225 deg C. Motorola suffered more rejects but failures occurred at 300 deg C. Difference in lead bonding technique may explain performance.
It is increasingly recognized that semiconductor based electronics that can function at ambient temperatures higher than 150 C without external cooling could greatly benefit a variety of important applications, especially-in the automotive, aerospace, and energy production industries. The fact that wide bandgap semiconductors are capable of electronic functionality at much higher temperatures than silicon has partially fueled their development, particularly in the case of SiC. It appears unlikely that wide bandgap semiconductor devices will find much use in low-power transistor applications until the ambient temperature exceeds approximately 300 C, as commercially available silicon and silicon-on-insulator technologies are already satisfying requirements for digital and analog very large scale integrated circuits in this temperature range. However, practical operation of silicon power devices at ambient temperatures above 200 C appears problematic, as self-heating at higher power levels results in high internal junction temperatures and leakages. Thus, most electronic subsystems that simultaneously require high-temperature and high-power operation will necessarily be realized using wide bandgap devices, once the technology for realizing these devices become sufficiently developed that they become widely available. Technological challenges impeding the realization of beneficial wide bandgap high ambient temperature electronics, including material growth, contacts, and packaging, are briefly discussed.
The rapid evolution of electronics has heralded countless benefits to humanity, enabling increases in computing power while decreasing costs. However, the constantly changing semiconductor device landscape proves to be an immense challenge for the reliability community, especially for those concerned with radiation effects on microelectronics. Changes in device manufacturing, from device structure to processing steps, may and often do change the way the device responds to radiation. While radiation hardened parts are not as much of a reliability concern, they also lag behind commercial off-the-shelf, or COTS, parts in terms of computing capabilities, some by over a decade. Many missions may have no choice but to utilize COTS. As such, these missions need to ensure their parts are reliable in the face of total ionizing dose (TID). However, part and testing facility costs limit the amount of testing possible.
Lightning induced damage is one of the major concerns in aircraft health monitoring. Such short-duration high voltages can cause significant damage to electronic devices. This paper presents a study on the effects of lightning injection on power metal-oxide semiconductor field effect transistors (MOSFETs). This approach consisted of pin-injecting lightning waveforms into the gate, drain and/or source of MOSFET devices while they were in the OFF-state. Analysis of the characteristic curves of the devices showed that for certain injection modes the devices can accumulate considerable damage rendering them inoperable. Early results demonstrate that a power MOSFET, even in its off-state, can incur considerable damage due to lightning pin injection, leading to significant deviation in its behavior and performance, and to possibly early device failures.
The thermoradiative cell is a new method for converting heat energy to electrical power, first detailed by Strandberg in 2015. The cell is a p-n junction semiconductor device, similar to a photovoltaic cell but thermodynamically operating in the reverse direction, converting the thermal dark current into electrical power while radiating waste heat to space. The power and efficiency can be calculated as a function of bandgap in the Shockley-Queisser detailed-balance limit, in which the thermal emissivity of the cell is due to the recombination of electron-hole pairs, and all other recombination losses are ignored. The current produced is directly proportional to the recombination radiation. The fundamental loss mechanism for the thermoradiative cell is the energy carried by the infrared radiation into space from band-to-band recombination of carriers injected across the junction. In an ideal cell, to maximize the efficiency, the emission energy of these photons would precisely equal the bandgap. This can be achieved, for example, using dielectric filters or meta-material filters to recycle emission at other wavelengths back into the cell. The voltage is proportional to the external bias. These two constraints allow optimization of the optimum bias point for maximum power. Unlike photovoltaic cells, the maximum power operating point is not the same as the maximum efficiency point, and higher efficiency can be achieved at a higher (negative) bias in the ideal case. Incorporating non-ideal losses, however, shifts the maximum efficiency point toward lower bias. Unlike in photovoltaic cells, non-radiative recombination (e.g., Auger losses) will reduce the output current, but will not reduce the conversion efficiency, since the recombination energy is retained in the cell in the form of heat. Since a thermoradiative cell operates by radiating directly to space, the current produced by themoradiative cells will increase as Stefan-Boltzmann radiation; roughly the fourth power of the temperature. Thus, the power produced is highest at high operating temperatures, and, unlike conventional thermal conversion, increasing radiator temperature increases, the efficiency. Thus, the choice of technology will be toward semiconductors resistant to degradation at high temperature.
The status of emerging silicon carbide (SiC) widebandgap semiconductor electronics technology is briefly surveyed. SiC-based electronic devices and circuits are being developed for use in high-temperature, high-power, and/or high-radiation conditions under which conventional semiconductors cannot function. Projected performance benefits of SiC electronics are briefly illustrated for several applications. However, most of these operational benefits of SiC have yet to be realized in actual systems, primarily owing to the fact that the growth techniques of SiC crystals are relatively immature and device fabrication technologies are not yet sufficiently developed to the degree required for widespread, reliable commercial use. Key crystal growth and device fabrication issues that limit the performance and capability of high-temperature and/or high-power SiC electronics are identified. The electrical and material quality differences between emerging SiC and mature silicon electronics technology are highlighted.
The possibilities and limitations of hardening silicon semiconductor devices to the high neutron and gamma radiation levels and greater than 10 to the eighth power rads required for the NERVA nuclear engine development are discussed. A comparison is made of the high dose neutron and gamma hardening potential of bipolar, metal insulator semiconductors and junction field effect transistors. Experimental data is presented on device degradation for the high neutron and gamma doses. Previous data and comparisons indicate that the JFET is much more immune to the combined neutron displacement and gamma ionizing effects than other transistor types. Experimental evidence is also presented which indicates that p channel MOS devices may be able to meet the requirements.
Report describes effects of power and temperature overstress on Texas Instruments and National Semiconductor devices. Texas Instruments devices had only two failures in 2500 hours of testing. National Semiconductor devices reached 50% failure limit. No consistent failure mode was detected.
This paper represents an overview of some recent power semiconductor developments and spotlights new technologies that may have significant impact for aircraft electric secondary power. Primary emphasis will be on NASA-Lewis-supported developments in transistors, diodes, a new family of semiconductors, and solid-state remote power controllers. Several semiconductor companies that are moving into the power arena with devices rated at 400 V and 50 A and above are listed, with a brief look at a few devices.
The problem of optimizing power conversion efficiency of semiconductor lasers and laser arrays and minimizing efficiency degradation due to temperature effects is treated. A method for calculating this efficiency is described and some calculated results are presented and discussed. Under some conditions, a small increase in the thermal resistance of the device can result in a large reduction of its efficiency. Temperature effects are important in high-power semiconductor laser, and in particular in laser arrays, where low thermal resistance heat sinking may be crucial to the device operation.
The NASA Goddard Space Flight Center (GSFC) is developing optical micro-electromechanical system (MEMS) components for potential application in Next Generation Space Telescope (NGST) science instruments. In this work, we present an overview of the electro-mechanical simulation of three MEMS components for NGST, which include a reflective micro-mirror array and transmissive microshutter array for aperture control for a near infrared (NIR) multi-object spectrometer and a large aperture MEMS Fabry-Perot tunable filter for a NIR wide field camera. In all cases the device must operate at cryogenic temperatures with low power consumption and low, complementary metal oxide semiconductor (CMOS) compatible, voltages. The goal of our simulation efforts is to adequately predict both the performance and the reliability of the devices during ground handling, launch, and operation to prevent failures late in the development process and during flight. This goal requires detailed modeling and validation of complex electro-thermal-mechanical interactions and very large non-linear deformations, often involving surface contact. Various parameters such as spatial dimensions and device response are often difficult to measure reliably at these small scales. In addition, these devices are fabricated from a wide variety of materials including surface micro-machined aluminum, reactive ion etched (RIE) silicon nitride, and deep reactive ion etched (DRIE) bulk single crystal silicon. The above broad set of conditions combine to be a formidable challenge for space flight qualification analysis. These simulations represent NASA/GSFC's first attempts at implementing a comprehensive strategy to address complex MEMS structures.
The thermoradiative cell is a new method for converting heat energy to electrical power, first detailed by Strandberg in 2015. The cell is structurally similar to a photovoltaic cell, in that it is a p-n junction semiconductor device, but thermodynamically operates in the reverse direction, converting the thermal dark current into electrical power by utilizing the recombination radiation from thermally-generated electron hole pairs to radiate waste heat to space. This technology may have application for space missions in converting thermal energy produced by a radioisotope source or from a nuclear reactor into power. The power and efficiency can be calculated as a function of bandgap in the detailed-balance case (the Shockley-Queisser limit), in which all of the thermal emissivity of the cell is due to the recombination of thermally generated electron-hole pairs, and all other recombination losses are ignored. The current produced is directly proportional to the recombination radiation, and thus the more thermally generated pairs, the higher the current. The voltage is proportional to the external bias. These two constraints allow optimization of the optimum bias point for maximum power, and allow calculation of the efficiency at maximum power point. Unlike photovoltaic cells, the maximum power operating point is not the same as the maximum efficiency point, and higher efficiency can be achieved at a higher (negative) bias in the ideal case. Incorporating non-ideal losses, however, shifts the maximum efficiency point toward lower bias. Since a thermoradiative cell operates by radiating directly to space, the current produced by a themoradiative cells will increase with the Stefan-Boltzman radiative efficiency; roughly the fourth power of the temperature. Thus, in contrast to a photovoltaic converter, the power produced is highest at high operating temperatures. Likewise, in contrast to conventional thermal conversion, high radiator temperature increases, rather than decreases the efficiency. Thus, the thermoradiative conversion may fill a mission niche in which small radiator size is required. The basic operation will be summarized, applications to space power discussed, and the requirements for further research outlined.
In recent years, the aerospace propulsion and space power communities have expressed a growing need for electronic devices that are capable of sustained high temperature operation. Applications for high temperature electronic devices include development instrumentation within engines, engine control, and condition monitoring systems, and power conditioning and control systems for space platforms and satellites. Other earth-based applications include deep-well drilling instrumentation, nuclear reactor instrumentation and control, and automotive sensors. To meet the needs of these applications, the High Temperature Electronics Program at the Lewis Research Center is developing silicon carbide (SiC) as a high temperature semiconductor material. Research is focussed on developing the crystal growth, characterization, and device fabrication technologies necessary to produce a family of silicon carbide electronic devices and integrated sensors. The progress made in developing silicon carbide is presented, and the challenges that lie ahead are discussed.
New wide bandgap semiconductor materials are being developed to meet the diverse high temperature, -power, and -frequency demands of the aerospace industry. Two of the most promising emerging materials are silicon carbide (SiC) for high-temperature and high power applications and gallium nitride (GaN) for high-frequency and optical (blue-light-emitting diodes and lasers) applications. This past year Glenn scientists implemented a NASA-patented crystal growth process for producing arrays of device-size mesas whose tops are atomically flat (i.e., step-free). It is expected that these mesas can be used for fabricating SiC and GaN devices with major improvements in performance and lifetime. The promising new SiC and GaN devices are fabricated in thin-crystal films (known as epi films) that are grown on commercial single-crystal SiC wafers. At this time, no commercial GaN wafers exist. Crystal defects, known as screw defects and micropipes, that are present in the commercial SiC wafers propagate into the epi films and degrade the performance and lifetime of subsequently fabricated devices. The new technology isolates the screw defects in a small percentage of small device-size mesas on the surface of commercial SiC wafers. This enables atomically flat surfaces to be grown on the remaining defect-free mesas. We believe that the atomically flat mesas can also be used to grow GaN epi films with a much lower defect density than in the GaN epi films currently being grown. Much improved devices are expected from these improved low-defect epi films. Surface-sensitive SiC devices such as Schottky diodes and field effect transistors should benefit from atomically flat substrates. Also, we believe that the atomically flat SiC surface will be an ideal surface on which to fabricate nanoscale sensors and devices. The process for achieving atomically flat surfaces is illustrated. The surface steps present on the "as-received" commercial SiC wafer is also illustrated. because of the small tilt angle between the crystal "basal" plane and the polished wafer surface. These steps are used in normal SiC epi film growth in a process known as stepflow growth to produce material for device fabrication. In the new process, the first step is to etch an array of mesas on the SiC wafer top surface. Then, epi film growth is carried out in the step flow fashion until all steps have grown themselves out of existence on each defect-free mesa. If the size of the mesas is sufficiently small (about 0.1 by 0.1 mm), then only a small percentage of the mesas will contain an undesired screw defect. Mesas with screw defects supply steps during the growth process, allowing a rough surface with unwanted hillocks to form on the mesa. The improvement in SiC epi surface morphology achievable with the new technology is shown. An atomic force microscope image of a typical SiC commercial epilayer surface is also shown. A similar image of an SiC atomically flat epi surface grown in a Glenn laboratory is given. With the current screw defect density of commercial wafers (about 5000 defects/cm2), the yield of atomically free 0.1 by 0.l mm mesas is expected to be about 90 percent. This is large enough for many types of electronic and optical devices. The implementation of this new technology was recently published in Applied Physics Letters. This work was initially carried out in-house under a Director's Discretionary Fund project and is currently being further developed under the Information Technology Base Program.
A circuit topology has been designed to guarantee the output of intrinsically safe power for the operation of electrical devices in a hazardous environment. This design uses a MOSFET (metal oxide semiconductor field-effect transistor) as a switch to connect and disconnect power to a load. A test current is provided through a separate path to the load for monitoring by a comparator against a preset threshold level. The circuit is configured so that the test current will detect a fault in the load and open the switch before the main current can respond. The main current passes through the switch and then an inductor. When a fault occurs in the load, the current through the inductor cannot change immediately, but the voltage drops immediately to safe levels. The comparator detects this drop and opens the switch before the current in the inductor has a chance to respond. This circuit protects both the current and voltage from exceeding safe levels. Typically, this type of protection is accomplished by a fuse or a circuit breaker, but in order for a fuse or a circuit breaker to blow or trip, the current must exceed the safe levels momentarily, which may be just enough time to ignite anything in a hazardous environment. To prevent this from happening, a fuse is typically current-limited by the addition of the resistor to keep the current within safe levels while the fuse reacts. The use of a resistor is acceptable for non-battery applications where the wasted energy and voltage drop across the resistor can be tolerated. The use of the switch and inductor minimizes the wasted energy. For example, a circuit runs from a 3.6-V battery that must be current-limited to 200 mA. If the circuit normally draws 10 mA, then an 18-ohm resistor would drop 180 mV during normal operation, while a typical switch (0.02 ohm) and inductor (0.97 ohm) would only drop 9.9 mV. From a power standpoint, the current-limiting resistor protection circuit wastes about 18 times more power than the switch and the inductor configuration. In the fault condition, both the resistor and the inductor react immediately. The resistor reacts by allowing more current to flow and dropping the voltage. Initially, the inductor reacts by dropping the voltage, and then by not allowing the current to change. When the comparator detects the drop in voltage, it opens the switch, thus preventing any further current flow. The inductor alone is not sufficient protection, because after the voltage drop has settled, the inductor would then allow the current to change, in this example, the current would be 3.7 A. In the fault condition, the resistor is flowing 200 mA until the fuse blows (anywhere from 1 ms to 100 s), while the switch and inductor combination is flowing about 2 A test current while monitoring for the fault to be corrected. Finally, as an additional safety feature, the circuit can be configured to hold the switch opened until both the load and source are disconnected.