Search NASA⌕ Search

SEARCH · Search NASA

Results for “semiconductor fabrication”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 91 records · Page 5

Method for making a monolithic integrated high-T.sub.c superconductor-semiconductor structure

A method for the fabrication of active semiconductor and high-temperature perconducting devices on the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.

Burns, Michael J.↗

A strategy to eliminate selenium oxide islands formed on the ZnSe/GaAs epilayer

Atomically clean and smooth surfaces are essential for semiconductor device fabrication and epitaxial regrowth. In this regard, spontaneously formed oxide islands or clusters on the surfaces of II-VI semiconductor exposures to air can disrupt interface formation. Using ZnSe/GaAs heterostructures grown by molecular beam epitaxy (MBE), we investigated the effect of surface treatments in eliminating oxide islands. The samples were probed with atomic force microscopy, low-temperature photoluminescence, and scanning electron microscopy. Here, it was found that ultra-high vacuum (UHV) annealing at 200°C, regardless of annealing duration, largely removed the islands while leaving the crystallinity of the ZnSe and GaAs epilayers unaffected. UHV annealing at higher temperatures of 300°C completely removed the islands, but the optical properties of ZnSe and/or GaAs epilayers deteriorated depending on the annealing duration. Our observations provide guidance to set thermal annealing strategies for removing oxide islands from the surfaces of II-VI/III-V semiconductor heterostructures depending on the desired properties.

36 MATERIALS SCIENCE↗

Solution‐Processed CsPbBr 3 Quantum Dots/Organic Semiconductor Planar Heterojunctions for High‐Performance Photodetectors

Abstract Planar heterojunctions (PHJs) are fundamental building blocks for construction of semiconductor devices. However, fabricating PHJs with solution‐processable semiconductors such as organic semiconductors (OSCs) is a challenge. Herein, utilizing the orthogonal solubility and good wettability between CsPbBr 3 perovskite quantum dots (PQDs) and OSCs, fabrication of solution‐processed PQD/OSC PHJs are reported. The phototransistors based on bilayer PQD/PDVT‐10 PHJs show responsivity up to 1.64 × 10 4 A W −1 , specific detectivity of 3.17 × 10 12 Jones, and photosensitivity of 5.33 × 10 6 when illuminated by 450 nm light. Such high photodetection performance is attributed to efficient charge dissociation and transport, as well as the photogating effect in the PHJs. Furthermore, the tri‐layer PDVT‐10/PQD/Y6 PHJs are used to construct photodiodes working in self‐powered mode, which exhibit broad range photoresponse from ultraviolet to near‐infrared, with responsivity approaching 10 −1 A W −1 and detectivity over 10 6 Jones. These results present a convenient and scalable production processes for solution‐processed PHJs and show their great potential for optoelectronic applications.

36 MATERIALS SCIENCE↗

Silicon superlattices: Theory and application to semiconductor devices

Silicon superlattices and their applicability to improved semiconductor devices were studied. The device application potential of the atomic like dimension of III-V semiconductor superlattices fabricated in the form of ultrathin periodically layered heterostructures was examined. Whether this leads to quantum size effects and creates the possibility to alter familiar transport and optical properties over broad physical ranges was studied. Applications to improved semiconductor lasers and electrondevices were achieved. Possible application of silicon sperlattices to faster high speed computing devices was examined. It was found that the silicon lattices show features of smaller fundamental energyband gaps and reduced effective masses. The effects correlate strongly with both the chemical and geometrical nature of the superlattice.

Moriarty, J. A.↗

Photoelectrochemical etching of silicon carbide (SiC) and its characterization

Silicon carbide (SiC) is an attractive semiconductor material for high speed, high density, and high temperature device applications due to its wide bandgap (2.2-3.2 eV), high thermal conductivity, and high breakdown electric field (4 x 10(exp 6) V/cm). An instrumental process in the fabrication of semiconductor devices is the ability to etch in a highly controlled and selective manner for direct patterning techniques. A novel technique in etching using electrochemistry is described. This procedure involves the ultraviolet (UV) lamp-assisted photoelectrochemical etching of n-type 3C- and 6H-SiC to enhance the processing capability of device structures in SiC. While under UV illumination, the samples are anodically biased in an HF based aqueous solution since SiC has photoconductive properties. In order for this method to be effective, the UV light must be able to enhance the production of holes in the SiC during the etching process thus providing larger currents with light from the photocurrents generated than those currents with no light. Otherwise dark methods would be used as in the case of p-type 3C-SiC. Experiments have shown that the I/V characteristics of the SiC-electrolyte interface reveal a minimum etch voltage of 3 V and 4 V for n- and p-type 3C-SiC, respectively. Hence it is possible for etch-stops to occur. Etch rates calculated have been as high as 0.67 micrometer/min for p-type, 1.4 micrometer/min for n-type, and 1.1 micrometer/min for pn layer. On n-type 3C- SiC, an oxide formation is present where after etching a yellowish layer corresponds to a low Si/C ratio and a white layer corresponds to a high Si/C ratio. P-type 3C-SiC shows a grayish layer. Additionally, n-type 6H-SiC shows a brown layer with a minimum etch voltage of 3 V.

Collins, D. M.↗

Growing High-Quality InAs Quantum Dots for Infrared Lasers

An improved method of growing high-quality InAs quantum dots embedded in lattice-matched InGaAs quantum wells on InP substrates has been developed. InAs/InGaAs/InP quantum dot semiconductor lasers fabricated by this method are capable of operating at room temperature at wavelengths greater than or equal to 1.8 mm. Previously, InAs quantum dot lasers based on InP substrates have been reported only at low temperature of 77 K at a wavelength of 1.9 micrometers. In the present method, as in the prior method, one utilizes metalorganic vapor phase epitaxy to grow the aforementioned semiconductor structures. The development of the present method was prompted in part by the observation that when InAs quantum dots are deposited on an InGaAs layer, some of the InAs in the InGaAs layer becomes segregated from the layer and contributes to the formation of the InAs quantum dots. As a result, the quantum dots become highly nonuniform; some even exceed a critical thickness, beyond which they relax. In the present method, one covers the InGaAs layer with a thin layer of GaAs before depositing the InAs quantum dots. The purpose and effect of this thin GaAs layer is to suppress the segregation of InAs from the InGaAs layer, thereby enabling the InAs quantum dots to become nearly uniform (see figure). Devices fabricated by this method have shown near-room-temperature performance.

Qiu, Yueming↗

High-throughput manufacturing of epitaxial membranes from a single wafer by 2D materials-based layer transfer process

Layer transfer techniques have been extensively explored for semiconductor device fabrication as a path to reduce costs and to form heterogeneously integrated devices. These techniques entail isolating epitaxial layers from an expensive donor wafer to form freestanding membranes. However, current layer transfer processes are still low-throughput and too expensive to be commercially suitable. Here we report a high-throughput layer transfer technique that can produce multiple compound semiconductor membranes from a single wafer. We directly grow two-dimensional (2D) materials on III–N and III–V substrates using epitaxy tools, which enables a scheme comprised of multiple alternating layers of 2D materials and epilayers that can be formed by a single growth run. Each epilayer in the multistack structure is then harvested by layer-by-layer mechanical exfoliation, producing multiple freestanding membranes from a single wafer without involving time-consuming processes such as sacrificial layer etching or wafer polishing. Moreover, atomic-precision exfoliation at the 2D interface allows for the recycling of the wafers for subsequent membrane production, with the potential for greatly reducing the manufacturing cost.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

Selective Plasma Deposition of Fluorocarbon Films on SAMs

A dry plasma process has been demonstrated to be useful for the selective modification of self-assembled monolayers (SAMs) of alkanethiolates. These SAMs are used, during the fabrication of semiconductor electronic devices, as etch masks on gold layers that are destined to be patterned and incorporated into the devices. The selective modification involves the formation of fluorocarbon films that render the SAMs more effective in protecting the masked areas of the gold against etching by a potassium iodide (KI) solution. This modification can be utilized, not only in the fabrication of single electronic devices but also in the fabrication of integrated circuits, microelectromechanical systems, and circuit boards. In the steps that precede the dry plasma process, a silicon mold in the desired pattern is fabricated by standard photolithographic techniques. A stamp is then made by casting polydimethylsiloxane (commonly known as silicone rubber) in the mold. The stamp is coated with an alkanethiol solution, then the stamp is pressed on the gold layer of a device to be fabricated in order to deposit the alkanethiol to form an alkanethiolate SAM in the desired pattern (see figure). Next, the workpiece is exposed to a radio-frequency plasma generated from a mixture of CF4 and H2 gases. After this plasma treatment, the SAM is found to be modified, while the exposed areas of gold remain unchanged. This dry plasma process offers the potential for forming masks superior to those formed in a prior wet etching process. Among the advantages over the wet etching process are greater selectivity, fewer pin holes in the masks, and less nonuniformity of the masks. The fluorocarbon films formed in this way may also be useful as intermediate layers for subsequent fabrication steps and as dielectric layers to be incorporated into finished products.

Crain, Mark M., III↗

Packaging Technology Developed for High-Temperature SiC Sensors and Electronics

A ceramic- and thick-film-materials-based prototype electronic package designed for silicon carbide (SiC) high-temperature sensors and electronics has been successfully tested at 500 C in an oxygen-containing air environment for 500 hours. This package was designed, fabricated, assembled, and electronically evaluated at the NASA Glenn Research Center at Lewis Field with an in-house-fabricated SiC semiconductor test chip. High-temperature electronics and sensors are necessary for harsh-environment space and aeronautical applications, such as space missions to the inner solar system or the emission control electronics and sensors in aeronautical engines. Single-crystal SiC has such excellent physical and chemical material properties that SiC-based semiconductor electronics can operate at temperatures over 600 C, which is significantly higher than the limit for Si-based semiconductor devices. SiC semiconductor chips were recently demonstrated to be operable at temperatures as high as 600 C, but only in the probe station environment because suitable packaging technology for sensors and electronics at temperatures of 500 C and beyond did not exist. Thus, packaging technology for SiC-based sensors and electronics is immediately needed for both application and commercialization of high-temperature SiC sensors and electronics. In response to this need, researchers at Glenn designed, fabricated, and assembled a prototype electronic package for high-temperature electronics, sensors, and microelectromechanical systems (MEMS) using aluminum nitride (AlN) substrate and gold (Au) thick-film materials. This prototype package successfully survived a soak test at 500 C in air for 500 hours. Packaging components tested included thick-film high-temperature metallization, internal wire bonds, external lead bonds, and a SiC diode chip die-attachment. Each test loop, which was composed of thick-film printed wire, wire bond, and lead bond was subjected to a 50-mA direct current for 250 hours at 500 C.

Chen, Liang-Yu↗

Sub-ppb Oxygen Contaminant Detection in Semi-Conductor Processing

Gaseous contaminants such as oxygen, water vapor, nitrogen and hydrocarbons are often present in the processing environment in semiconductor device fabrication and in containerless materials processing. The contaminants arise as a result of outgassing from hot surfaces or they may be part of the impurities in commercial ultra-high purity gases. Among these gaseous contaminants, oxygen is the most reactive and, therefore, has the most adverse effects on the end product. There has been an intense effort at the Jet Propulsion Laboratory to develop different types of oxygen sorbents to reduce oxygen concentration in a microgravity processing environment to sub-ppb (parts-per-billion) levels. Higher concentrations can lead to rapid surface oxide formation, hence reducing the quality of semiconductor devices. If the concentration of oxygen in a processing chamber at 1000oC is in the ppb level, it will only take approximately 10 seconds for an oxide layer to form on the surface of a sample. The interaction of oxygen with the water surface can lead to the formation of localized defects in semi-conductor devices, hence decreasing the manufacturing yield. For example, efficient production of 64 Mb RAM chips requires contaminations below ppb levels. This paper describes a technique for measuring trace quantities of oxygen contaminants by recording the monoatomic negative ions, O-, using mass spectrometry. The O- formation from the e--O2 interaction utilizes the electron dissociative attachment method that is greatly enhanced at the resonant energy (6.8 eV). The device combines a small gridded electron ionizer with a compact mass spectrometer. The concentrations of oxygen have been measured using the method of standard additions by diluting O2 in N2. The lowest detection limit obtained was 1.2 kHz (O- count rate) at a concentration of 10-10, corresponding to 0.1 ppb.

Sub-ppb Contaminant↗

Charge Transfer Properties of Heterostructures Formed by Bi 2 O 2 Se and Transition Metal Dichalcogenide Monolayers

Atomically thin bismuth oxyselenide (Bi 2 O 2 Se) exhibits attractive properties for electronic and optoelectronic applications, such as high charge-carrier mobility and good air stability. Recently, the development of Bi 2 O 2 Se-based heterostructures have attracted enormous interests with promising prospects for diverse device applications. Although the electrical properties of Bi 2 O 2 Se-based heterostructures have been widely studied, the interlayer charge transfer in these heterostructures remains elusive, despite its importance in harnessing their emergent functionalities. Here, a comprehensive experimental investigation on the interlayer charge transfer properties of two heterostructures formed by Bi 2 O 2 Se and representative transition metal dichalcogenides (namely, WS 2 /Bi 2 O 2 Se and MoS 2 /Bi 2 O 2 Se) is reported. In this work, Kelvin probe force microscopy is used to measure the work functions of the samples, which are further employed to establish type-II band alignment of both heterostructures. Photoluminescence quenching is observed in each heterostructure, suggesting high charge transfer efficiency. Time-resolved and layer-selective pump–probe measurements further prove the ultrafast interlayer charge transfer processes and formation of long-lived interlayer excitons. These results establish the feasibility of integrating 2D Bi 2 O 2 Se with other 2D semiconductors to fabricate heterostructures with novel charge transfer properties and provide insight for understanding the performance of optoelectronic devices based on such 2D heterostructures.

36 MATERIALS SCIENCE↗

Induced Superconducting Pairing in Integer Quantum Hall Edge States

Indium arsenide (InAs) near surface quantum wells (QWs) are promising for the fabrication of semiconductor–superconductor heterostructures given that they allow for a strong hybridization between the two-dimensional states in the quantum well and the ones in the superconductor. In this work, we present results for InAs QWs in the quantum Hall regime placed in proximity of superconducting NbTiN. We observe a negative downstream resistance with a corresponding reduction of Hall (upstream) resistance, consistent with a very high Andreev conversion. Further, we analyze the experimental data using the Landauer-Büttiker formalism, generalized to allow for Andreev reflection processes. We attribute the high efficiency of Andreev conversion in our devices to the large transparency of the InAs/NbTiN interface and the consequent strong hybridization of the QH edge modes with the states in the superconductor.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Arrays of Si vacancies in 4 H -SiC produced by focused Li ion beam implantation

Point defects in SiC are an attractive platform for quantum information and sensing applications because they provide relatively long spin coherence times, optical spin initialization, and spin-dependent fluorescence readout in a fabrication-friendly semiconductor. The ability to precisely place these defects at the optimal location in a host material with nano-scale accuracy is desirable for integration of these quantum systems with traditional electronic and photonic structures. Here, we demonstrate the precise spatial patterning of arrays of silicon vacancy (${V}_{Si}$) emitters in an epitaxial 4H -SiC (0001) layer through mask-less focused ion beam implantation of Li + . We characterize these arrays with high-resolution scanning confocal fluorescence microscopy on the Si-face, observing sharp emission lines primarily coming from the ${V1}^{{\prime}}$ zero-phonon line (ZPL). The implantation dose is varied over 3 orders of magnitude, leading to ${V}_{Si}$ densities from a few per implantation spot to thousands per spot, with a linear dependence between ZPL emission and implantation dose. Optically-detected magnetic resonance (ODMR) is also performed, confirming the presence of V2 ${V}_{Si}$. Our investigation reveals scalable and reproducible defect generation.

36 MATERIALS SCIENCE↗

A Perspective on ferroelectricity in hafnium oxide: Mechanisms and considerations regarding its stability and performance

Ferroelectric hafnium oxides are poised to impact a wide range of microelectronic applications owing to their superior thickness scaling of ferroelectric stability and compatibility with mainstream semiconductors and fabrication processes. For broad-scale impact, long-term performance and reliability of devices using hafnia will require knowledge of the phases present and how they vary with time and use. In this Perspective article, the importance of phases present on device performance is discussed, including the extent to which specific classes of devices can tolerate phase impurities. Following, the factors and mechanisms that are known to influence phase stability, including substituents, crystallite size, oxygen point defects, electrode chemistry, biaxial stress, and electrode capping layers, are highlighted. Herein, discussions will focus on the importance of considering both neutral and charged oxygen vacancies as stabilizing agents, the limited biaxial strain imparted to a hafnia layer by adjacent electrodes, and the strong correlation of biaxial stress with resulting polarization response. Areas needing additional research, such as the necessity for a more quantitative means to distinguish the metastable tetragonal and orthorhombic phases, quantification of oxygen vacancies, and calculation of band structures, including defect energy levels for pure hafnia and stabilized with substituents, are emphasized.

36 MATERIALS SCIENCE↗

Gallium Nitride Superjunction Transistor (Continued Funding Report)

The initial goal of this project is to develop the gallium vacancy assisted diffusion (GAID) method in GaN and apply it to demonstrate 2-terminal, 3-terminal, and large area Superjunction-enhanced modules. These devices will find use in high efficiency power conversion applications with the capability of operating at higher voltages, higher frequency, and less loss than comparable stat-ofthe-art devices. The approach of this project has been to utilize simulation tools to drive diffusion experiments and inform semiconductor device fabrication processes. VASP has been relied upon to simulate first principles diffusion mechanisms while SILVACO TCAD has been utilized to understand tradeoffs of the the critical dimensions in GaN devices.

42 ENGINEERING↗

Synthetic Metal Atomic Layer Deposition Tool (Final Report)

As part of the Cyclotron Road program, Laminera Inc. worked towards development of atomic layer deposition process customizations and tool modifications to produce synthetic metal films at commercial scale and improve the film quality. Today's state-of-the-art in atomic layer deposited synthetic metal technology is only possible at a research-scale because current tools have practical limitations for scaling industrially and generating high conductivity films. Ultrathin, conformal synthetic metal films have many possible applications such as high surface area nanoporous electrodes for supercapacitors and water desalination devices; protective electrode coatings for electrochemical devices; seed layers for semiconductor device fabrication; or metallic component stabilizing coatings that enable enhanced storage density in next generation hard disk drives. The best synthetic metal conductive and plasmonic properties have been demonstrated using sputtering, which relies on high temperature sputtering with substrate dependent and directional growth limiting usage. This work explored refining process and tool modifications to create ultrathin, conformal, synthetic metal films that can be deposited with high quality over complex three-dimensional surfaces.

36 MATERIALS SCIENCE↗

Modeling and Design of Micro Flux Monitors for Neutron Fluence Measurements

Measuring neutron flux is critical to understanding the characteristics of nuclear reactors and can provide information on the energy spectrum, total neutron fluence, and operational history of a facility. Such measurements are typically performed by irradiating high-purity materials in an operating reactor for a known length of time. By measuring and identifying activation products in the irradiated materials and referencing the energy-dependent cross section of each isotope, the neutron energy spectrum and total fluence can be determined. Historical techniques use a variety of small, individually pressed foils or wires for dosimeter devices, which can result in excessively high levels of radioactivity and complications in handling after irradiation. The present work describes a new neutron dosimetry concept, named the micro flux monitor, that uses semiconductor device fabrication processes to deposit thin films of flux monitoring materials in precise geometries onto a SiC wafer. This approach allows multiple dosimetry materials to be located on a single device, simplifying irradiation and subsequent analysis. The geometry, and therefore mass, of each material can be custom-tailored for a specific application—considering the expected neutron flux, duration of irradiation, and device retrieval time of a facility. Additionally, hundreds of identical dosimetry monitors can be produced simultaneously, reducing fabrication costs. Finally, the extremely thin metal dimensions of these devices could improve the fidelity of neutron fluence measurements by reducing neutron self-shielding and gamma self-attenuation effects.

22 GENERAL STUDIES OF NUCLEAR REACTORS↗

Fabricating Graphene Oxide/h-BN Metal Insulator Semiconductor Diodes by Nanosecond Laser Irradiation

To employ graphene’s rapid conduction in 2D devices, a heterostructure with a broad bandgap dielectric that is free of traps is required. Within this paradigm, h-BN is a good candidate because of its graphene-like structure and ultrawide bandgap. We show how to make such a heterostructure by irradiating alternating layers of a-C and a-BN film with a nanosecond excimer laser, melting and zone-refining constituent layers in the process. With Raman spectroscopy and ToF-SIMS analyses, we demonstrate this localized zone-refining into phase-pure h-BN and rGO films with distinct Raman vibrational modes and SIMS profile flattening after laser irradiation. Furthermore, in comparing laser-irradiated rGO-Si MS and rGO/h-BN/Si MIS diodes, the MIS diodes exhibit an increased turn-on voltage (4.4 V) and low leakage current. The MIS diode I-V characteristics reveal direct tunneling conduction under low bias and Fowler-Nordheim tunneling in the high-voltage regime, turning the MIS diode ON with improved rectification and current flow. This study sheds light on the nonequilibrium approaches to engineering h-BN and graphene heterostructures for ultrathin field effect transistor device development.

2D materials↗