Resonant Attachment Method for Trace Oxygen Detection
Gaseous contaminants, such as oxygen and water vapor, are often present in containerless materials processing and in semiconductor device fabrication.
trace↗
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Results for “semiconductor fabrication”
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Surface effects in semiconductors due to evaporation techniques
Fabrication induced surface instabilities in semiconductor devices
SEMICONDUCTOR DEVICE↗
Contract to design, fabricate and test an Electron Bombarded Semiconductor (EBS) device
The characteristics of the low resistivity diode and the double epitaxial style diode are reported. Both met required breakdown voltage and capacitance voltage characteristics. The double epitaxial style diodes are expected to improve target efficiencies.
Arnold, R. L.↗
Feasibility investigation of insulated-gate field-effect transistors fabricated by techniques compatible with thick-film technology
Low temperature semiconductor deposition techniques in fabricating thick film, insulated gate, field effect transistors
Baxter, R. D.↗
Method of Promoting Single Crystal Growth During Melt Growth of Semiconductors
The method of the invention promotes single crystal growth during fabrication of melt growth semiconductors. A growth ampoule and its tip have a semiconductor source material placed therein. The growth ampoule is placed in a first thermal environment that raises the temperature of the semiconductor source material to its liquidus temperature. The growth ampoule is then transitioned to a second thermal environment that causes the semiconductor source material in the growth ampoule's tip to attain a temperature that is below the semiconductor source material's solidus temperature. The growth ampoule so-transitioned is then mechanically perturbed to induce single crystal growth at the growth ampoule's tip.
Su, Ching-Hua↗
CMOS circuit-fabrication handbook
Report describes complementary metal-oxide-semiconductor (CMOS) process used to fabricate integrated circuits at Marshall Space Flight Center. It also presents general discussions of circuit design, mask making packaging, and testing.
Bouldin, D. L.↗
Fabrication of Metallic Hollow Nanoparticles
Metal and semiconductor nanoshells, particularly transition metal nanoshells, are fabricated using dendrimer molecules. Metallic colloids, metallic ions or semiconductors are attached to amine groups on the dendrimer surface in stabilized solution for the surface seeding method and the surface seedless method, respectively. Subsequently, the process is repeated with additional metallic ions or semiconductor, a stabilizer, and NaBH.sub.4 to increase the wall thickness of the metallic or semiconductor lining on the dendrimer surface. Metallic or semiconductor ions are automatically reduced on the metallic or semiconductor nanoparticles causing the formation of hollow metallic or semiconductor nanoparticles. The void size of the formed hollow nanoparticles depends on the dendrimer generation. The thickness of the metallic or semiconductor thin film around the dendrimer depends on the repetition times and the size of initial metallic or semiconductor seeds.
Kim, Jae-Woo↗
Improved Method of Manufacturing SiC Devices
The phrase, "common-layered architecture for semiconductor silicon carbide" ("CLASSiC") denotes a method of batch fabrication of microelectromechanical and semiconductor devices from bulk silicon carbide. CLASSiC is the latest in a series of related methods developed in recent years in continuing efforts to standardize SiC-fabrication processes. CLASSiC encompasses both institutional and technological innovations that can be exploited separately or in combination to make the manufacture of SiC devices more economical. Examples of such devices are piezoresistive pressure sensors, strain gauges, vibration sensors, and turbulence-intensity sensors for use in harsh environments (e.g., high-temperature, high-pressure, corrosive atmospheres). The institutional innovation is to manufacture devices for different customers (individuals, companies, and/or other entities) simultaneously in the same batch. This innovation is based on utilization of the capability for fabrication, on the same substrate, of multiple SiC devices having different functionalities (see figure). Multiple customers can purchase shares of the area on the same substrate, each customer s share being apportioned according to the customer s production-volume requirement. This makes it possible for multiple customers to share costs in a common foundry, so that the capital equipment cost per customer in the inherently low-volume SiC-product market can be reduced significantly. One of the technological innovations is a five-mask process that is based on an established set of process design rules. The rules provide for standardization of the fabrication process, yet are flexible enough to enable multiple customers to lay out masks for their portions of the SiC substrate to provide for simultaneous batch fabrication of their various devices. In a related prior method, denoted multi-user fabrication in silicon carbide (MUSiC), the fabrication process is based largely on surface micromachining of poly SiC. However, in MUSiC one cannot exploit the superior sensing, thermomechanical, and electrical properties of single-crystal 6H-SiC or 4H-SiC. As a complement to MUSiC, the CLASSiC five-mask process can be utilized to fabricate multiple devices in bulk single-crystal SiC of any polytype. The five-mask process makes fabrication less complex because it eliminates the need for large-area deposition and removal of sacrificial material. Other innovations in CLASSiC pertain to selective etching of indium tin oxide and aluminum in connection with multilayer metallization. One major characteristic of bulk micromachined microelectromechanical devices is the presence of three-dimensional (3D) structures. Any 3D recesses that already exist at a given step in a fabrication process usually make it difficult to apply a planar coat of photoresist for metallization and other subsequent process steps. To overcome this difficulty, the CLASSiC process includes a reversal of part of the conventional flow: Metallization is performed before the recesses are etched.
Okojie, Robert S.↗
Method For Growth of Crystal Surfaces and Growth of Heteroepitaxial Single Crystal Films Thereon
A method of growing atomically-flat surfaces and high quality low-defect crystal films of semiconductor materials and fabricating improved devices thereon is discussed. The method is also suitable for growing films heteroepitaxially on substrates that are different than the film. The method is particularly suited for growth of elemental semiconductors (such as Si), compounds of Groups III and V elements of the Periodic Table (such as GaN), and compounds and alloys of Group IV elements of the Periodic Table (such as SiC).
Powell, J. Anthony↗
Fabrication of Si-As-Te ternary amorphous semiconductor in the microgravity environment (M-13)
Ternary chalcogenide Si-As-Te system is an interesting semiconductor from the aspect of both basic physics and technological applications. Since a Si-As-Te system consists of a IV-III-II hedral bonding network, it has a very large glass forming region with a wide physical constant controllability. For example, its energy gap can be controlled in a range from 0.6 eV to 2.5 eV, which corresponds to the classical semiconductor Ge (0.66 eV), Si (1.10 eV), GaAs (1.43 eV), and GaP (2.25 eV). This fact indicates that it would be a suitable system to investigate the compositional dependence of the atomic and electronic properties in the random network of solids. In spite of these significant advantages in the Si-As-Te amorphous system, a big barrier impending the wide utilization of this material is the huge difficulty encountered in the material preparation which results from large differences in the weight density, melting point, and vapor pressure of individual elements used for the alloying composition. The objective of the FMPT/M13 experiment is to fabricate homogeneous multi-component amorphous semiconductors in the microgravity environment of space, and to make a series of comparative characterizations of the amorphous structures and their basic physical constants on the materials prepared both in space and in normal terrestrial gravity.
Hamakawa, Yoshihiro↗
The AMOS cell - An improved metal-semiconductor solar cell
A new fabrication process is being developed which significantly improves the efficiency of metal-semiconductor solar cells. The resultant effect, a marked increase in the open-circuit voltage, is produced by the addition of an interfacial layer oxide on the semiconductor. Cells using gold on n-type gallium arsenide have been made in small areas (0.17 sq cm) with conversion efficiencies of 15% in terrestrial sunlight.
Stirn, R. J.↗
Dual ohmic contact to N- and P-type silicon carbide
Simultaneous formation of electrical ohmic contacts to silicon carbide (SiC) semiconductor having donor and acceptor impurities (n- and p-type doping, respectively) is disclosed. The innovation provides for ohmic contacts formed on SiC layers having n- and p-doping at one process step during the fabrication of the semiconductor device. Further, the innovation provides a non-discriminatory, universal ohmic contact to both n- and p-type SiC, enhancing reliability of the specific contact resistivity when operated at temperatures in excess of 600.degree. C.
Okojie, Robert S.↗
Incoherent GaAlAs/GaAs semiconductor laser arrays
The fabrication of an incoherent laser array is reported. The main features of the arrays are low threshold index-guided laser elements, single-lobe far-field pattern, low astigmatism, low current operation, dense packing, and total electrical and optical isolation. With further development, this device should have applications in multihead optical-disk reading and writing, multifiber optical communications, and line-of-sight communications.
Hwang, C. J.↗
Overcash, D. R.
The objectives of this investigation were to determine the characteristics of semiconductor devices at low temperatures. The output characteristics of several currently available semiconductor devices and devices fabricated at Marshall Space Flight Center were measured over a range of gate voltages. Large variations in low-temperature performance, not only from type to type, but from field effect transistor (FET) to FET of the same type were obtained. By increasing the carrier concentrations at low temperatures through extra heavy doping, metal oxide semiconductor field effect transistor (MOSFET) device was fabricated that operated at 4.2K. To verify the low-temperature operation of a heavily doped device, this procedure was repeated. Their noise spectrum was analyzed at 4.2K. Suggestions were made as to possible fabrication methods, techniques, and other semiconductor materials that might improve the device charactersitics at low temperatures. A procedure for using an electric field to drift dopants through the insulating oxide to produce a very thin, heavily doped region under the gate of a MOSFET was initiated. Capacitance s a function of voltage plots was suggested as a method for determining the level of dopant drift.
Source record↗
Better Ohmic Contacts For InP Semiconductor Devices
Four design modifications enable fabrication of improved ohmic contacts on InP-based semiconductor devices. First modification consists of insertion of layer of gold phosphide between n-doped InP and metal or other overlayer of contact material. Second, includes first modification plus use of particular metal overlayer to achieve very low contact resistivities. Third, also involves deposition of Au(2)P(3) interlayer; in addition, refractory metal (W or Ta) deposited to form contact overlayer. In fourth, contact layer of Auln alloy deposited directly on InP. Improved contacts exhibit low electrical resistances and fabricated without exposing devices to destructive predeposition or postdeposition treatments.
Weizer, Victor G.↗
Methods of measurement for semiconductor materials, process control, and devices Quarterly report, 1 Apr. - 30 Jun. 1969
Measurement methods for semiconductor materials, devices, fabrication, processing
Bullis, W. M.↗
Compensation of voltage drops in solid-state switches used with thermoelectric generators
Seebeck effect solid state switch was developed eliminating thermoelectric generator switch voltage drops. Semiconductor switches were fabricated from materials with large Seebeck coefficients, arranged such that Seebeck potential is generated with such polarity that current flow is aided.
Shimada, K.↗
Effects of ultrathin oxides in conducting MIS structures on GaAs
Schottky barrier-type GaAs baseline devices (semiconductor surface etched and then immediately metalized) and GaAs conducting metal oxide-semiconductor devices are fabricated and characterized. The baseline surfaces (no purposeful oxide) are prepared by a basic or an acidic etch, while the surface for the MIS devices are prepared by oxidizing after the etch step. The metallizations used are thin-film Au, Ag, Pd, and Al. It is shown that the introduction of purposeful oxide into these Schottky barrier-type structures examined on n-type GaAs modifies the barrier formation, and that thin interfacial layers can modify barrier formation through trapping and perhaps chemical reactions. For Au- and Pd-devices, enhanced photovoltaic performance of the MIS configuration is due to increased barrier height.
Childs, R. B.↗