Theory of induced birefringence in materials with memory
Isotropic materials with memory, discussing induced birefringence theory to account for memory and nonlinearity effects in dielectric properties dependence on deformation history
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Isotropic materials with memory, discussing induced birefringence theory to account for memory and nonlinearity effects in dielectric properties dependence on deformation history
The oligatomic (mirror) thin film memory technology is a suitable candidate for general purpose spaceborne applications in the post-1975 time frame. Capacities of around 10 to the 8th power bits can be reliably implemented with systems designed around a 335 million bit module. The recommended mode was determined following an investigation of implementation sizes ranging from an 8,000,000 to 100,000,000 bits per module. Cost, power, weight, volume, reliability, maintainability and speed were investigated. The memory includes random access, NDRO, SEC-DED, nonvolatility, and dual interface characteristics. The applications most suitable for the technology are those involving a large capacity with high speed (no latency), nonvolatility, and random accessing.
An operation manual is presented for the oligatomic mass memory feasibility model. It includes a brief description of the memory and exerciser units, a description of the controls and their functions, the operating procedures, the test points and adjustments, and the circuit diagram.
A series of nickel titanium alloys (55-Nitinol), which are unique in that they possess a shape memory, are described. Components made of these materials that are altered in their shapes by deformation under proper conditions return to predetermined shapes when they are heated to the proper temperature range. The shape memory, together with the force exerted and the ability of the material to do mechanical work as it returns to its predetermined shape, suggest a wide variety of industrial applications for the alloy. Also included are discussions of the physical metallurgy and the mechanical, physical, and chemical properties of 55-Nitinol; procedures for melting and processing the material into useful shapes; and a summary of applications.
The work performed entailed the design, development, construction and testing of a 4000 word by 18 bit random access, NDRO plated wire memory for use in conjunction with a spacecraft imput/output unit and central processing unit. The primary design parameters, in order of importance, were high reliability, low power, volume and weight. A single memory unit, referred to as a qualification model, was delivered.
Current efforts to exploit the spatial redundancy and built-in imaging of holographic optical techniques to provide high information densities without critical alignment and tight mechanical tolerances are reviewed. Read-write-erase in situ operation is possible but is presently impractical because of limitations in available recording media. As these are overcome, it should prove feasible to build holographic bulk memories with mechanically replaceable hologram plates featuring very fast (less than 2 microsec) random access to large (greater than 100 million bit) data blocks and very high throughput (greater than 500 Mbit/sec). Using volume holographic storage it may eventually be possible to realize random-access mass memories which require no mechanical motion and yet provide very high capacity.
MOS/silicon-on-sapphire (SOS) technology is shown to permit the realization of large-scale integrated arrays that combine the best features of monolithic bipolar and MOS technologies. The perfect isolation and reduced capacitance of SOS technology make possible static MOS circuits with nearly an order-of-magnitude improvement in speed and dynamic power dissipation over their monolithic counterparts. CMOS/SOS memory arrays have been fabricated with speeds comparable to TTL bipolar memory arrays even when operated at TTL compatible levels. Quiescent power dissipation of two described arrays is typically less than 1 microwatt/bit. The SOS/MOS technology is compatible with both aluminum and self-aligned silicon-gate processing.
A general class of adaptive replacement schemes for use in paged memories is developed. One such algorithm, called SIM, is simulated using a probability model that generates memory traces, and the results of the simulation of this adaptive scheme are compared with those obtained using the best nonlookahead algorithms. A technique for implementing this type of adaptive replacement algorithm with state of the art digital hardware is also presented.
Transformer-type memory is fault-tolerant array of independent read-only memory units. Information pattern in each unit is written by weaving wires through array of linear (nonswitching) transformers. Presence or absence of a bit is determined by whether a given wire threads or bypasses given transformer.
Results are presented of a study conducted with a digital simulation model being used in the design of the Automatically Reconfigurable Modular Multiprocessor System (ARMMS), a candidate computer system for future manned and unmanned space missions. The model simulates the activity involved as instructions are fetched from random access memory for execution in one of the system central processing units. A series of model runs measured instruction execution time under various assumptions pertaining to the CPU's and the interface between the CPU's and RAM. Design tradeoffs are presented in the following areas: Bus widths, CPU microprogram read only memory cycle time, multiple instruction fetch, and instruction mix.
Thin deformable films were investigated for use as the storage medium in a holographic optical memory. The research was directed toward solving the problems of material fatigue, selective heat addressing, electrical charging of the film surface and charge patterning by light. A number of solutions to these problems were found but the main conclusion to be drawn from the work is that deformable media which employ heat in the recording process are not satisfactory for use in a high-speed random-access read/write holographic memory. They are, however, a viable approach in applications where either high speed or random-access is not required.
Optical technologies for meeting the demands of large capacity fast access time memory are discussed in terms of optical phenomena and laser applications. The magneto-optic and electro-optic approaches are considered to be the most promising memory approaches.
Study of the design and modeling of a highly reliable bubble-memory system that has the capabilities of: (1) correcting a single 16-adjacent bit-group error resulting from failures in a single basic storage module (BSM), and (2) detecting with a probability greater than 0.99 any double errors resulting from failures in BSM's. The results of the study justify the design philosophy adopted of employing memory data encoding and a translator to correct single group errors and detect double group errors to enhance the overall system reliability.
The maximum capacity of a block-oriented, random-access memory is determined primarily by the geometrical parameters of the lenses required to create a Fourier transform of a spatial bit pattern and to image the reconstructed bits onto a photodetector array. Furthermore, the maximum packing density is determined primarily by the same parameters. Several important relationships are developed that are useful in the preliminary design of holographic memories.
A generalized problem of stochastic control is discussed in which multiple controllers with different data bases are present. The vehicle for the investigation is the finite state, finite memory (FSFM) stochastic control problem. Optimality conditions are obtained by deriving an equivalent deterministic optimal control problem. A FSFM minimum principle is obtained via the equivalent deterministic problem. The minimum principle suggests the development of a numerical optimization algorithm, the min-H algorithm. The relationship between the sufficiency of the minimum principle and the informational properties of the problem are investigated. A problem of hypothesis testing with 1-bit memory is investigated to illustrate the application of control theoretic techniques to information processing problems.
Construction and electrical characterization of the 4096 x 2-bit Basic Memory Module (BMM) are reported for the Space Ultrareliable Modular Computer (SUMC) program. The module uses four 2K x 1-bit N-channel FET, random access memory chips, called array chips, and two sense amplifier chips, mounted and interconnected on a ceramic substrate. Four 5% tolerance power supplies are required. At the Module, the address, chip select, and array select lines require a 0-8.5 V MOS signal level. The data output, read-strobe, and write-enable lines operate at TTl levels. Although the module is organized as 4096 x 2 bits, it can be used in a 8196 x 1-bit application with appropriate external connections. A 4096 x 1-bit organization can be obtained by depopulating chips.
Concept has several important advantages over close-wound system: memory and coil chips are separate and interchangeable; interconnections in coil level are eliminated by packing memory chip and electronics in single structure; and coil size can be adjusted to optimum value in terms of power dissipation and field uniformity.
A single-burst-error correction system is described for data stored in the UNICON laser memory. In the proposed system, a long fire code with code length n greater than 16,768 bits was used as an outer code to augment an existing inner shorter fire code for burst error corrections. The inner fire code is a (80,64) code shortened from the (630,614) code, and it is used to correct a single-burst-error on a per-word basis with burst length b less than or equal to 6. The outer code, with b less than or equal to 12, would be used to correct a single-burst-error on a per-page basis, where a page consists of 512 32-bit words. In the proposed system, the encoding and error detection processes are implemented by hardware. A minicomputer, currently used as a UNICON memory management processor, is used on a time-demanding basis for error correction. Based upon existing error statistics, this combination of an inner code and an outer code would enable the UNICON system to obtain a very low error rate in spite of flaws affecting the recorded data.