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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 973 records · Page 54
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Development of POTATO for 2S Module Grading for the CMS Phase-2 Outer Tracker Upgrade

Due to the High Luminosity-Large Hadron Collider (HL-LHC) upgrade, several detectors of the Compact Muon Solenoid (CMS) will need to be replaced, specifically the new Outer Tracker (OT) that will be assembled with 13,200 silicon modules. The OT is composed of two types of modules; the PS (pixel-strip) and the 2S (strip-strip) modules. With a large influx of production of modules, extensive testing is required to ensure quality of the modules. This research introduces POTATO (Phase-II Outer Tracker Analyzer of Test Outputs), a specialized software developed in C++ to analyze, grade, and store results in a centralized database. Module data will be collected from various international production facilities. The implementation of POTATO will facilitate with selecting the best performing modules for the Outer Tracker upgrade. This research is focused on the implementation of the analysis of 2S Module results within POTATO.

Klupshas, Anna↗
DOE OSTI2024

Development of POTATO for 2S Module Grading for the CMS Phase-2 Outer Tracker Upgrade

Due to the High Luminosity-Large Hadron Collider (HL-LHC) upgrade, several detectors of the Compact Muon Solenoid (CMS) will need to be upgraded, specifically the new Outer Tracker detector that will be composed of 13,200 silicon modules. The Outer Tracker features two types of modules; the PS (pixel-strip) and the 2S (strip-strip) modules. With a large influx of production of modules, extensive testing is required to ensure they fulfill the performance requirements. This research introduces POTATO (Phase-II Outer Tracker Analyzer of Test Outputs), a specialized software developed in C++ to analyze, grade, and store results in a centralized database since module data will be collected from various international production facilities. The implementation of POTATO will facilitate the selection of the best performing modules for the Outer Tracker upgrade. This paper is focused on the implementation of the analysis of 2S Module results within POTATO.

43 PARTICLE ACCELERATORS↗
DOE OSTI2025

Passband Signal Detection at the Edge

Algorithms for radio frequency (RF) spectrum awareness need to be compatible with edge hardware to be practical for many applications. We developed a signal detection and classification model for the ZCU111 RF System-on-a-Chip (RFSoC) that operates on the fast Fourier transform of passband RF data. The system can detect and classify multiple signals of interest and display the predictions in real-time. The model consists of a modified ConvNeXt backbone and YOLOv3 head to operate on the Deep Learning Processing Unit on the RFSoC. We gathered datasets for training and testing by using a software defined radio to transmit example signals of Wi-Fi 802.11 b/g, Wi-Fi 802.11 n, FM Radio, LTE and LTE-M. By leveraging multiple inputs on the RFSoC frontend, the datasets span up to 4 GHz of bandwidth. The models showed high performance in classification accuracy, center frequency error, bandwidth error, and detection accuracy for both single and multi-signal datasets.

42 ENGINEERING↗
DOE OSTI2025

Vitis CI/CD & Containerization

Modern development flows that use tooling for automated building, testing, and deployment of software are becoming the norm for large scale software and hardware projects. These flows offer quite a few advantages that make them desirable, but when attempting to implement them for projects that use FPGAs, some complications can arise when attempting to integrate them with traditional FPGA toolchains and deployment workflows. In this poster, we present early our early efforts integrating the Vitis FPGA toolchain into a modern, Kuberentes and Github actions based CI/CD pipeline.

Hawks, Benjamin G. [Fermilab]↗
DOE OSTI2024

ARPA-E Grid Optimization (GO) Competition Challenge 3

Synthetic Input Data and Team Results for the GO Competition Challenge 3 for Events 1 - 4 and the Sandbox, along with problem and format descriptions and code to validate data and solutions, are available here. Data for industry scenarios will not be made public. The Grid Optimization (GO) Competition Challenge 3 focused on the security-constrained optimal power flow (SCOPF) problem. It is part of a continuing effort begun with Challenges 1 and 2, to successfully discover, develop, and test innovative and disruptive software solutions for critical energy challenges and to overcome existing barriers. The broader goal of the of the GO Competition is to accelerate the development of transformational and disruptive methods for solving problems related to the electric power grid and to provide a transparent, fair, and comprehensive evaluation of new solution methods. Challenge 3 used multiperiod dynamic markets, including advisory models for extreme weather events, day-ahead markets, and the real-time markets with an extended look-ahead. In Event 4, whose submission window was August 31-September 4, 2023, 14 teams solved for the objective values of 669 scenarios (39 scenarios required solutions both with and without line switching being allowed). The 591 synthetic scenarios from 9 network models (3.6 GB) are available here. Ten teams were funded to participate and 7 won prizes totaling $2,400,000. The largest prize ($550,000) went to Mississippi State University. An additional $600,000 was awarded in Event 3 (6/15-16/2023). No prizes were awarded in Events 1 (1/25-27/2023) or 2 (4/13-14/2023). For more information on the competition and challenge see the "GO Competition Challenge 3 Information" resource below.

ACOPF↗
DOE OSTI2024

Assessment of Envelope- and Machine Learning-Based Electrical Fault Type Detection Algorithms for Electrical Distribution Grids

This study introduces envelope- and machine learning (ML)-based electrical fault type detection algorithms for electrical distribution grids, advancing beyond traditional logic-based methods. The proposed detection model involves three stages: anomaly area detection, ML-based fault presence detection, and ML-based fault type detection. Initially, an envelope-based detector identifying the anomaly region was improved to handle noisier power grid signals from meters. The second stage acts as a switch, detecting the presence of a fault among four classes: normal, motor, switching, and fault. Finally, if a fault is detected, the third stage identifies specific fault types. This study explored various feature extraction methods and evaluated different ML algorithms to maximize prediction accuracy. The performance of the proposed algorithms is tested in an emulated software–hardware electrical grid testbed using different sample rate meters/relays, such as SEL735, SEL421, SEL734, SEL700GT, and SEL351S near and far from an inverter-based photovoltaic array farm. The performance outcomes demonstrate the proposed model’s robustness and accuracy under realistic conditions.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2025

IoT Firmware Emulation and Its Security Application in Fuzzing: A Critical Revisit

As IoT devices with microcontroller (MCU)-based firmware become more common in our lives, memory corruption vulnerabilities in their firmware are increasingly targeted by adversaries. Fuzzing is a powerful method for detecting these vulnerabilities, but it poses unique challenges when applied to IoT devices. Direct fuzzing on these devices is inefficient, and recent efforts have shifted towards creating emulation environments for dynamic firmware testing. However, unlike traditional software, firmware interactions with peripherals that are significantly more diverse presents new challenges for achieving scalable full-system emulation and effective fuzzing. This paper reviews 27 state-of-the-art works in MCU-based firmware emulation and its applications in fuzzing. Instead of classifying existing techniques based on their capabilities and features, we first identify the fundamental challenges faced by firmware emulation and fuzzing. We then revisit recent studies, organizing them according to the specific challenges they address, and discussing how each specific challenge is addressed. We compare the emulation fidelity and bug detection capabilities of various techniques to clearly demonstrate their strengths and weaknesses, aiding users in selecting or combining tools to meet their needs. Finally, we highlight the remaining technical gaps and point out important future research directions in firmware emulation and fuzzing.

Zhou, Wei (ORCID:0000000178340839)↗
NASA NTRS1972

Off-line data analysis and data reduction from digitally controlled random test systems.

This paper discusses the merits of employing the new computer-controlled random environment control systems for fast and efficient large-scale data analysis when they are not being used for test control. Hardware and software requirements are stated. Several of the more familiar frequency functions are defined from the Fourier coefficients, the main product of the Fourier processors used in these control systems. Another function, the probability density function, is defined and suggestions for its application are made. An analysis example is presented. Some programming tips are listed, and the accuracy and reliability of frequency analysis measurements are considered.

Chapman, C. P.↗
NASA NTRS1978

SEASAT A satellite scatterometer

The analyses performed in the early period of the program which formed the basis of the sensor design is reviewed, along with the sensor design. The test program is outlined, listing all tests performed and the environmental exposure (simulated) for each, as applicable. Ground support equipment designed and built for assembly integration and field testing is described. The software developed during the program and the algorithms/flow diagrams which formed the bases for the software are summarized.

Bianchi, R.↗
NASA NTRS1980

Voyager mission support

Special events participated in by the Deep Space Stations (DSS) for the period of February through April 1980 are presented. The status of the DSS is reviewed for the same period, including system performance tests and operational verification tests. A list of software accepted for operation at the DSS is given.

Fanelli, N.↗
NASA NTRS1979

KSC facilities status and planned management operations

A status report is presented on facilities and planned operations at the Kennedy Space Center with reference to Space Shuttle launch activities. The facilities are essentially complete, with all new construction and modifications to existing buildings almost finished. Some activity is still in progress at Pad A and on the Mobile Launcher due to changes in requirements but is not expected to affect the launch schedule. The installation and testing of the ground checkout equipment that will be used to test the flight hardware is now in operation. The Launch Processing System is currently supporting the development of the applications software that will perform the testing of this flight hardware.

Gray, R. H.↗
NASA NTRS1981

Design of a fuel-efficient guidance system for a STOL aircraft

In the predictive mode, the system synthesizes a horizontal path from an initial aircraft position and heading to a desired final position and heading and then synthesizes a fuel-efficient speed-altitude profile along the path. In the track mode, the synthesized trajectory is reconstructed and tracked automatically. An analytical basis for the design of the system is presented and a description of the airborne computer implementation is given. A detailed discussion of the software, which should be helpful to those who use the actual software developed for these tests, is also provided.

Mclean, J. D.↗
NASA NTRS1981

The quality assurance role in the Deep Space Network

The quality assurance section provides skilled personnel who perform the following functions: quality hardware engineering, quality software engineering, inspection and testing, and an independent assessment to quality, engineering and project requirements. The quality assurance section provides specifications, workmanship standards, process specifications and quality assurance procedures in support of DSN equipment. In addition, the quality assurance section reviews DSN engineering documents to ensure that appropriate and adequate quality provisions are included.

Sirpilla, R. L.↗
NASA NTRS1982

Cost effective development of a Shuttle-based astronomical instrument control system

The high level language FORTH is used for the electronic control of the Space Shuttle-based Ultraviolet Imaging Telescope, in a flight computer system which minimizes costs. The greater part of the breadboard version of the flight computer is assembled from commercially available components, reducing novel circuit design features and permitting simultaneous development of both hardware and software. The commercial boards are then refabricated on aluminum core heat conducting stock, using high reliability parts to produce the flight versions of the system. The system's ground support equipment employs a MINC-25 minicomputer which performs such functions as flight computer software development, PROM programming, test and integration support, and flight operations support. The implementation of these concepts in flight computer telescope controls is described.

Parise, R. A.↗
NASA NTRS1985

Shuttle avionics software development trials: Tribulations and successes, the backup flight system

The development and verification of the Backup Flight System software (BFS) is discussed. The approach taken for the BFS was to develop a very simple and straightforward software program and then test it in every conceivable manner. The result was a program that contained approximately 12,000 full words including ground checkout and the built in test program for the computer. To perform verification, a series of tests was defined using the actual flight type hardware and simulated flight conditions. Then simulated flights were flown and detailed performance analysis was conducted. The intent of most BFS tests was to demonstrate that a stable flightpath could be obtained after engagement from an anomalous initial condition. The extention of the BFS to meet the requirements of the orbital flight test phase is also described.

Chevers, E. S.↗
NASA NTRS1985

Launch processing system concept to reality

The Launch Processing System represents Kennedy Space Center's role in providing a major integrated hardware and software system for the test, checkout and launch of a new space vehicle. Past programs considered the active flight vehicle to ground interfaces as part of the flight systems and therefore the related ground system was provided by the Development Center. The major steps taken to transform the Launch Processing System from a concept to reality with the successful launches of the Shuttle Programs Space Transportation System are addressed.

Bailey, W. W.↗
NASA NTRS1983

Multibus-based parallel processor for simulation

A Multibus-based parallel processor simulation system is described. The system is intended to serve as a vehicle for gaining hands-on experience, testing system and application software, and evaluating parallel processor performance during development of a larger system based on the horizontal/vertical-bus interprocessor communication mechanism. The prototype system consists of up to seven Intel iSBC 86/12A single-board computers which serve as processing elements, a multiple transmission controller (MTC) designed to support system operation, and an Intel Model 225 Microcomputer Development System which serves as the user interface and input/output processor. All components are interconnected by a Multibus/IEEE 796 bus. An important characteristic of the system is that it provides a mechanism for a processing element to broadcast data to other selected processing elements. This parallel transfer capability is provided through the design of the MTC and a minor modification to the iSBC 86/12A board. The operation of the MTC, the basic hardware-level operation of the system, and pertinent details about the iSBC 86/12A and the Multibus are described.

Ogrady, E. P.↗