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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Circuit allows minimization of thermal-drift errors, low power consumption, operation over wide dynamic range, improved sensitivity and stability with metaloxide-semiconductor field-effect transistor sensors.
Active voltage divider applies different logic signals to field-effect transistor switches to generate various voltage levels at output. Circuit is compact and reduces errors from drifting component values.
Feedback network makes resistance of field-effect transistor (FET) same for current flowing in either direction. It combines control voltage with source and load voltages to give symmetric current/voltage characteristics. Since circuit produces same magnitude output voltage for current flowing in either direction, it introduces no offset in presense of altering polarity signals. It is therefore ideal for sensor and effector circuits in servocontrol systems.
Coverings for solar cells are evaluated conveniently with alumina ceramic circuit board holding three pairs of cells and three field-effect translator (FET) chips overlaid with candidate encapsulant. With fixture, solar cells and encapsulants are exposed to Sunlight and weather, either natural or artificial, to provide pertinent measurement and performance data.
Titanium dioxide (TiO2) films prepared by chemical vapor deposition were investigated in this study for the purpose of the application in the GaAs metal-insulator-semiconductor field-effect transistor. The degree of crystallization increases with the deposition temperature. The current-voltage study, utilizing an Al-TiO2-Al MIM structure, reveals that the d-c conduction through the TiO2 film is dominated by the bulk-limited Poole-Frenkel emission mechanism. The dependence of the resistivity of the TiO2 films on the deposition environment is also shown. The results of the capacitance-voltage study indicate that an inversion layer in an n-type substrate can be achieved in the MIS capacitor if the TiO2 films are deposited at a temperature higher than 275 C. A process of low temperature deposition followed by the pattern definition and a higher temperature annealing is suggested for device fabrications. A model, based on the assumption that the surface state densities are continuously distributed in energy within the forbidden band gap, is proposed to interpret the lack of an inversion layer in the Al-TiO2-GaAs MIS structure with the TiO2 films deposited at 200 C.
Noise specifications for junction field-effect transistors are presented in different ways depending on the particular semiconductor manufacturer. Arithmetic involved in converting these specifications to equivalent RMS noise in microvolts developed at the preamplifier input terminal is reviewed. These methods were useful for estimating the noise performance of high input impedance preamplifiers used with E-field antennas operating in the range of 1 KHz to 10 MHz. Both the JFET MPF-102 transistor and the COS/MOS CA3600 transistor array provided amplification for VLF receivers where the internally generated noise was well below the atmospheric noise level. The CA3600 transistor array provided better performance because of the more symmetrical complementary MOS transistor transfer characteristics than a single N-type biased JFET transistor. The CMOS amplifier resulted in self-compensating gain characteristics over a very wide temperature range from -55 to +125 C.
Tracking loop filter with continuous bandwidth control smooths transition from wide to narrow band. Circuit was designed for Space Shuttle where bandwidth varied between 320 Hz for acquisition and 20 Hz for tracking. Field-effect transitor (FET) acts as voltage controlled variable resistance, changing time constant of filter between phase detector and voltage-controlled oscillator in phase-locked loop.
Report describes one-year research effort in VLSL fabrication. Four activities are described: theoretical study of two-dimensional diffusion in SOS (silicon-on-sapphire); setup of sputtering system, furnaces, and photolithography equipment; experiments on double layer metal; and investigation of two-dimensional modeling of MOSFET's (metal-oxide-semiconductor field-effect transistors).
CADAT field-effect transistor simulator (FETSIM) analyzes dc and transient behavior of metal-oxide-semiconductor (MOS) circuits. Both N-MOS and P-MOS transistor configurations in either bulk of silicon-on-sapphire (SOS) technology and almost any combination of R/C elements are analyzed.
Power transistor networks which switch large currents in highly inductive environments are beginning to find application in the hundred kilohertz switching frequency range. Recent developments in the fabrication of metal-oxide-semiconductor field-effect transistors in the power device category have enhanced the movement toward higher switching frequencies. Models for switching devices and of the circuits in which they are imbedded are required to properly characterize the mechanisms responsible for turning on and turning off effects. Easily interpreted results in the form of oscilloscope-like plots assist in understanding the effects of parametric studies using topology oriented computer-aided analysis methods.
Proposed field-effect transistor consists of three cells which make up one complete FET pellet. Pellet is flip-chip mounted on carrier with source grounded gate and drain posts connected directly to impedance-matching transmission-line segments. Impedance transformers are part of mounting and contact strips.
Tests confirm operation of five commercial semiconductor devices at cryogenic temperatures. The five devices - one tunnel diode, one field-effect transistor, and three CMOS integrated circuits - all perform well in circuits immersed in liquid-helium bath. For some tests, bath temperature was reduced to 1,25K by pumping.
Preliminary results are reported on the development of a high temperature (350 C) gallium phosphide bipolar junction transistor (BJT) for geothermal and other energy applications. This four-layer p(+)n(-)pp(+) structure was formed by liquid phase epitaxy using a supercooling technique to insure uniform nucleation of the thin layers. Magnesium was used as the p-type dopant to avoid excessive out-diffusion into the lightly doped base. By appropriate choice of electrodes, the device may also be driven as an n-channel junction field-effect transistor. The initial design suffers from a series resistance problem which limits the transistor's usefulness at high temperatures.
The overload characteristics of the full bridge series resonant power converter are considered. This includes analyses of the two most common control methods presently in use. The first of these uses a current zero crossing detector to synchronize the control signals and is referred to as the alpha controller. The second is driven by a voltage controlled oscillator and is referred to as the gamma controller. It is shown that the gamma controller has certain reliability advantages in that it can be designed with inherent short circuit protection. Experimental results are included for an 86 kHz converter using power metal-oxide-semiconductor field-effect transistors (MOSFETs).
Gallium arsenide high-temperature devices were fabricated and assembled into an optically activated pulse-width-modulated power control for a torque motor typical of the kinds used in jet engine actuators. A bipolar heterojunction phototransistor with gallium aluminum arsenide emitter/window, a gallium arsenide junction field-effect power transistor and a gallium arsenide transient protection diode were designed and fabricated. A high-temperature fiber optic/phototransistor coupling scheme was implemented. The devices assembled into the demonstrator were successfully tested at 250 C, proving the feasibility of actuator-located switching of control power using optical signals transmitted by fibers. Assessments of the efficiency and technical merits were made for extension of this high-temperature technology to local conversion of optical power to electrical power and its control at levels useful for driving actuators. Optical power sources included in the comparisons were an infrared light-emitting diode, an injection laser diode, tungsten-halogen lamps and arc lamps. Optical-to-electrical power conversion was limited to photovoltaics located at the actuator. Impedance matching of the photovoltaic array to the load was considered over the full temperature range, -55 C to 260 C. Loss of photovoltaic efficiency at higher temperatures was taken into account. Serious losses in efficiency are: (1) in the optical source and the cooling which they may require in the assumed 125 C ambient, (2) in the decreased conversion efficiency of the gallium arsenide photovoltaic at 260 C, and (3) in impedance matching. Practical systems require improvements in these areas.
A shunt switch comprised of a field-effect transistor (Q.sub.1) is employed to commutate a current-fed inverter (10) using thyristors (SCR1, SCR2) or bijunction transistors (Q.sub.2, Q.sub.3) in a full bridge (1, 2, 3, 4) or half bridge (5, 6) and transformer (T.sub.1) configuration. In the case of thyristors, a tapped inverter (12) is employed to couple the inverter to a dc source to back bias the thyristors during commutation. Alternatively, a commutation power supply (20) may be employed for that purpse. Diodes (D.sub.1, D.sub.2) in series with some voltage dropping element (resistor R.sub.12 or resistors R.sub.1, R.sub.2 or Zener diodes D.sub.4, D.sub.5) are connected in parallel with the thyristors in the half bridge and transformer configuration to assure sharing the back bias voltage. A clamp circuit comprised of a winding (18) negatively coupled to the inductor and a diode (D.sub.3) return stored energy from the inductor to the power supply for efficient operation with buck or boost mode.
This paper describes modeling and experimental work to design and demonstrate a silicon carbide (SiC), single-side-cooled power module. Two SiC metal-oxide-semiconductor field-effect transistors (MOSFET) were used for each switch position and packaged on a metalized ceramic substrate. Thermal modeling was first conducted to optimize the module packaging to minimize junction-to-fluid thermal resistance and device temperature variations. This procedure identified the optimal device placement and baseplate thickness to maximize thermal performance. A heat exchanger - incorporating impinging jets of water-ethylene glycol - was designed to cool the module's baseplate to minimize thermal resistance and pumping power. The heat exchanger used relatively low fluid velocities (<1.5 m/s) to minimize erosion-corrosion effects and relatively large fluid channel sizes (>=1 mm) to prevent clogging. The power module concept was fabricated, and experiments were conducted to measure its thermal performance. Direct current was used to power the module devices, and junction temperatures were measured via device temperature-sensitive parameters. The experimental results were found to be in good agreement with model predictions (within 2%) and yielded junction-to-fluid thermal resistance values as low as about 15 mm2 K/W at relatively low pumping power values. The results demonstrate the improved performance associated with jet impingement cooling and represent an improvement over existing channel-flow-type cold plates, which can enable improvements to power density and reliability.
This study examines the effects of spin-dry (SD) and N 2 blow-dry (ND) techniques on the quality and surface passivation performance of silicon oxide grown in ozone-dissolved deionized water. The SD method achieves greater oxide thickness uniformity, averaging 1.39 nm ± 4.17% across 49 points, compared to 1.68 nm ± 21.67% for the ND wafers. However, persistently poor passivation of ozonated oxide-grown wafers following the SD process is exhibited, with carrier lifetime, τ eff < 0.3 ms and saturation current density, J 0 (per side) ranging from 26 to 45 fA cm 2 . These findings are analyzed in the context of the fundamental phenomena involved in the drying processes of both techniques. Following this, an optimized spin-drying process is developed, resulting in improved τ eff and J 0 values of 1.4 ms and 5.6 fA cm –2 , respectively. Scanning electron microscopy further confirms that the oxide films dried with the enhanced SD technique are free of pinholes.