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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 109 records · Page 6
All sourcesNASA NTRSDOE OSTI
NASA NTRS1984

Data and results of a laboratory investigation of microprocessor upset caused by simulated lightning-induced analog transients

Advanced composite aircraft designs include fault-tolerant computer-based digital control systems with thigh reliability requirements for adverse as well as optimum operating environments. Since aircraft penetrate intense electromagnetic fields during thunderstorms, onboard computer systems maya be subjected to field-induced transient voltages and currents resulting in functional error modes which are collectively referred to as digital system upset. A methodology was developed for assessing the upset susceptibility of a computer system onboard an aircraft flying through a lightning environment. Upset error modes in a general-purpose microprocessor were studied via tests which involved the random input of analog transients which model lightning-induced signals onto interface lines of an 8080-based microcomputer from which upset error data were recorded. The application of Markov modeling to upset susceptibility estimation is discussed and a stochastic model development.

Belcastro, C. M.↗
NASA NTRS2005

A VHDL Core for Intrinsic Evolution of Discrete Time Filters with Signal Feedback

Evolution of a novel low-pass filter design has been presented along with an assessment of its capabilities. (1) Performed well with the two added sines used as input during the evolution. (2) Also performs well when the input includes more sine at frequencies between the two used during evolution. (3) Fails to perform when input is a sine sweep with wider bandwidth. (4) This illustrates the importance of designing the evolutionary process to be representative of the environment that will be seen by the evolved design during deployment. The use of non-standard operators and fewer resources should allow the EMVCore to implement more compact representations of digital filters and to provide fault tolerance by implementing a new solution in the remaining tiles after some are damaged. The EMVCore can be used to implement standard discrete time filters in addition to evolved components.

Gwaltney, David A.↗
NASA NTRS1988

Fault-Tolerant Software For Flight Control

Report discusses design and testing of redundant control system for F-8 digital fly-by-wire airplane. Outstanding feature of system is fault-tolerant software (REBUS) residing in primary digital computers. Transition to operation on backup software smooth.

Deets, Dwain A.↗
NASA NTRS1986

Requirement analysis of an intelligent, redundant, actuation system

The reliability and fault tolerance requirements of integrated, critical, digital fly-by-wire control systems for advanced military and civil aircraft requires redundant, reconfigurable implementations of the actuation system. An effective way for controlling the actuators and implementing the required fault detection and reconfiguration strategies is by means of dedicated microprocessors. This paper describes a laboratory implementation of a flexible intelligent redundant actuation system capable of demonstrating the concept and analyzing a variety of configurations and technical issues.

De Feo, P.↗
NASA NTRS1994

Testing For EM Upsets In Aircraft Control Computers

Effects of transient electrical signals evaluated in laboratory tests. Method of evaluating nominally fault-tolerant, aircraft-type digital-computer-based control system devised. Provides for evaluation of susceptibility of system to upset and evaluation of integrity of control when system subjected to transient electrical signals like those induced by electromagnetic (EM) source, in this case lightning. Beyond aerospace applications, fault-tolerant control systems becoming more wide-spread in industry; such as in automobiles. Method supports practical, systematic tests for evaluation of designs of fault-tolerant control systems.

Belcastro, Celeste M.↗
NASA NTRS1986

Development of an interface for an ultrareliable fault-tolerant control system and an electronic servo-control unit

The NASA Ames Research Center sponsors a research program for the investigation of Intelligent Flight Control Actuation systems. The use of artificial intelligence techniques in conjunction with algorithmic techniques for autonomous, decentralized fault management of flight-control actuation systems is explored under this program. The design, development, and operation of the interface for laboratory investigation of this program is documented. The interface, architecturally based on the Intel 8751 microcontroller, is an interrupt-driven system designed to receive a digital message from an ultrareliable fault-tolerant control system (UFTCS). The interface links the UFTCS to an electronic servo-control unit, which controls a set of hydraulic actuators. It was necessary to build a UFTCS emulator (also based on the Intel 8751) to provide signal sources for testing the equipment.

Shaver, Charles↗
NASA NTRS1990

Flight demonstration of a self repairing flight control system in a NASA F-15 fighter aircraft

Battle damage causing loss of control capability can compromise mission objectives and even result in aircraft loss. The Self Repairing Flight Control System (SRFCS) flight development program directly addresses this issue with a flight control system design that measures the damage and immediately refines the control system commands to preserve mission potential. The system diagnostics process detects in flight the type of faults that are difficult to isolate post flight, and thus cause excessive ground maintenance time and cost. The control systems of fighter aircraft have the control power and surface displacement to maneuver the aircraft in a very large flight envelope with a wide variation in airspeed and g maneuvering conditions, with surplus force capacity available from each control surface. Digital flight control processors are designed to include built-in status of the control system components, as well as sensor information on aircraft control maneuver commands and response. In the event of failure or loss of a control surface, the SRFCS utilizes this capability to reconfigure control commands to the remaining control surfaces, thus preserving maneuvering response. Correct post-flight repair is the key to low maintainability support costs and high aircraft mission readiness. The SRFCS utilizes the large data base available with digital flight control systems to diagnose faults. Built-in-test data and sensor data are used as inputs to an Onboard Expert System process to accurately identify failed components for post-flight maintenance action. This diagnostic technique has the advantage of functioning during flight, and so is especially useful in identifying intermittent faults that are present only during maneuver g loads or high hydraulic flow requirements. A flight system was developed to test the reconfiguration and onboard maintenance diagnostics concepts on a NASA F-15 fighter aircraft.

Urnes, James M.↗
NASA NTRS1991

An ultrareliable integrated digital computer for helicopters

The US Army Fault-Tolerant Architecture (AFTA) has been defined to meet real-time fault-tolerant processing requirements of future Army applications. AFTA is the enabling technology that will allow the Army to configure existing processors and other hardware to provide high throughput and ultrahigh reliability necessary for terrain-following/terrain-avoidance (TF/TA) and nap-of-the-earth (NOE) flight control and other advanced Army applications. A brief description of AFTA's relevant attributes and theory of operation is given. The systems engineering models which permit the configuration on an AFTA to meet mission requirements as they evolve are presented, along with an example of their use to engineer an AFTA configuration. The resulting AFTA configuration, its predicted throughput, reliability, availability, weight, power, volume, and life-cycle cost impact, and the effects of possible engineering tradeoffs are presented.

Harper, Richard E.↗
NASA NTRS1983

Reliability with imperfect diagnostics

A reliability estimation method for systems that continually accumulate faults because of imperfect diagnostics is developed and an application for redundant digital avionics is presented. The present method assumes that if a fault does not appear in a short period of time, it will remain hidden until a majority of components are faulty and the system fails. A certain proportion of a component's faults are detected in a short period of time, and a description of their detection is included in the reliability model. A Markov model of failure during flight for a nonreconfigurable five-plex is presented for a sequence of one-hour flights followed by maintenance.

White, A. L.↗
NASA NTRS1985

Fault detection and accommodation testing on an F100 engine in an F-15 airplane

The fault detection and accommodation (FDA) methods that can be used for digital engine control systems are presently subjected to a flight test program in the case of the F-15 fighter's F100 engine electronic controls, inducing selected faults and then evaluating the resulting digital engine control responses. In general, flight test results were found to compare well with both ground tests and predictions. It is noted that the inducement of dual-pressure failures was not feasible, since FDA logic was not designed to accommodate them.

Myers, L. P.↗
NASA NTRS1990

Simulated fault injection - A methodology to evaluate fault tolerant microprocessor architectures

A simulation-based fault-injection method for validating fault-tolerant microprocessor architectures is described. The approach uses mixed-mode simulation (electrical/logic analysis), and injects transient errors in run-time to assess the resulting fault impact. As an example, a fault-tolerant architecture which models the digital aspects of a dual-channel real-time jet-engine controller is used. The level of effectiveness of the dual configuration with respect to single and multiple transients is measured. The results indicate 100 percent coverage of single transients. Approximately 12 percent of the multiple transients affect both channels; none result in controller failure since two additional levels of redundancy exist.

Choi, Gwan S.↗
NASA NTRS2004

NASA Tech Briefs, August 2004

Topics covered include: Data Relay Board with Protocol for High-Speed, Free-Space Optical Communications; Software and Algorithms for Biomedical Image Data Processing and Visualization; Rapid Chemometric Filtering of Spectral Data; Prioritizing Scientific Data for Transmission; Determining Sizes of Particles in a Flow from DPIV Data; Faster Processing for Inverting GPS Occultation Data; FPGA-Based, Self-Checking, Fault-Tolerant Computers; Ultralow-Power Digital Correlator for Microwave Polarimetry; Grounding Headphones for Protection Against ESD; Lightweight Stacks of Direct Methanol Fuel Cells; Highly Efficient Vector-Inversion Pulse Generators; Estimating Basic Preliminary Design Performances of Aerospace Vehicles; Framework for Development of Object-Oriented Software; Analyzing Spacecraft Telecommunication Systems; Collaborative Planning of Robotic Exploration; Tools for Administration of a UNIX-Based Network; Preparing and Analyzing Iced Airfoils; Evaluating Performance of Components; Fuels Containing Methane of Natural Gas in Solution; Direct Electrolytic Deposition of Mats of MnxOy Nanowires; Bubble Eliminator Based on Centrifugal Flow; Inflatable Emergency Atmospheric-Entry Vehicles; Lightweight Deployable Mirrors with Tensegrity Supports; Centrifugal Adsorption Cartridge System; Ultrasonic Apparatus for Pulverizing Brittle Material; Transplanting Retinal Cells using Bucky Paper for Support; Using an Ultrasonic Instrument to Size Extravascular Bubbles; Coronagraphic Notch Filter for Raman Spectroscopy; On-the-Fly Mapping for Calibrating Directional Antennas; Working Fluids for Increasing Capacities of Heat Pipes; Computationally-Efficient Minimum-Time Aircraft Routes in the Presence of Winds; Liquid-Metal-Fed Pulsed Plasma Thrusters; Personal Radiation Protection System; and Attitude Control for a Solar-Sail Spacecraft.

Source record↗
NASA NTRS2017

Digital Material Assembly by Passive Means and Modular Isotropic Lattice Extruder System

A set of machines and related systems build structures by the additive assembly of discrete parts. These digital material assemblies constrain the constituent parts to a discrete set of possible positions and orientations. In doing so, the structures exhibit many of the properties inherent in digital communication such as error correction, fault tolerance and allow the assembly of precise structures with comparatively imprecise tools. Assembly of discrete cellular lattices by a Modular Isotropic Lattice Extruder System (MILES) is implemented by pulling strings of lattice elements through a forming die that enforces geometry constraints that lock the elements into a rigid structure that can then be pushed against and extruded out of the die as an assembled, loadbearing structure.

Carney, Matthew Eli↗
NASA NTRS2018

Digital Material Assembly by Passive Means and Modular Isotropic Lattice Extruder System

A set of machines and related systems build structures by the additive assembly of discrete parts. These digital material assemblies constrain the constituent parts to a discrete set of possible positions and orientations. In doing so, the structures exhibit many of the properties inherent in digital communication such as error correction, fault tolerance and allow the assembly of precise structures with comparatively imprecise tools. Assembly of discrete cellular lattices by a Modular Isotropic Lattice Extruder System (MILES) is implemented by pulling strings of lattice elements through a forming die that enforces geometry constraints that lock the elements into a rigid structure that can then be pushed against and extruded out of the die as an assembled, load bearing structure.

Carney, Matthew Eli↗
NASA NTRS1993

Bridging faults in BiCMOS circuits

Combining the advantages of CMOS and bipolar, BiCMOS is emerging as a major technology for many high performance digital and mixed signal applications. Recent investigations revealed that bridging faults can be a major failure mode in IC's. Effects of bridging faults in BiCMOS circuits are presented. Bridging faults between logical units without feedback and logical units with feedback are considered. Several bridging faults can be detected by monitoring the power supply current (I(sub DDQ) monitoring). Effects of bridging faults and bridging resistance on output logic levels were examined along with their effects on noise immunity.

Menon, Sankaran M.↗
NASA NTRS2014

All-Digital Baseband 65nm PLL/FPLL Clock Multiplier using 10-cell Library

PLLs for clock generation are essential for modern circuits, to generate specialized frequencies for many interfaces and high frequencies for chip internal operation. These circuits depend on analog circuits and careful tailoring for each new process, and making them fault tolerant is an incompletely solved problem. Until now, all digital PLLs have been restricted to sampled data DSP techniques and not available for the highest frequency baseband applications. This paper presents the design and preliminary evaluation of an all-digital baseband technique built entirely with an easily portable 10-cell digital library. The library is also described, as it aids in research and low volume design porting to new processes. The advantages of the digital approach are the wide variety of techniques available to give varying degrees of fault tolerance, and the simplicity of porting the design to new processes, even to exotic processes that may not have analog capability. The only tuning parameter is digital gate delay. An all-digital approach presents unique problems and standard analog loop stability design criteria cannot be directly used. Because of the quantization of frequency, there is effectively infinite gain for very small loop error feedback. The numerically controlled oscillator (NCO) based on a tapped delay line cannot be reliably updated while a pulse is active in the delay line, and ordinarily does not have enough frequency resolution for a low-jitter output.

Shuler, Robert L., Jr.↗