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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 109 records · Page 6

The critical satellite technical issues of future pervasive broadband low-cost communication networks

The critical technical issues of signal waveform design, projected spacecraft technology, satellite launch options, and satellite cost are discussed for future pervasive broadband communication networks. With DPCM video signal encoding, 32 Mb/s user-to-user data rate per channel, 10% overhead, two orthogonal polarizations, and crosstalk loss limited to 1 dB, TFM permits about 75 channels/GHz of frequency allocation. The BOM (beginning of mission) weight and power of a baseline 400-channel multibeam satellite is about 1800 kg and 5000 W. Each 35 Mb/s channel can support 1 to 10 video channels. The weight and power estimates assume hardened digital logic, composite materials for a multibeam antenna structure, high-efficiency solar cells, batteries, and amplifiers. Based on a cost model for large communication satellites, the total space segment cost of two active satellites and one spare would be about $485 M.

Harvey, R. L.↗

The effect of low energy protons on silicon solar cells with simulated coverglass cracks

Results of a series of low-energy proton (LEP) tests are presented. The purpose of the tests was to investigate the effect of low-energy protons on the electrical performance of solar cells with simulated cracked covers. The results of the tests were then related to the space environment. A matrix of LEP tests was set up using solar cells with simulated cracks to determine the effect on electrical performance as a function of fluence, energy, crack width, coverglass adhesive shielding, crack location, and solar cell size. The results of the test were, for the most part, logical, and consistent.

Gasner, S.↗

Understanding Reliability Trade-Offs in 1T-nC and 2T-nC FeRAM Designs

Ferroelectric random access memory (FeRAM) is a promising candidate for energy-efficient nonvolatile memory, particularly for logic-in-memory and compute-in-memory (CIM) applications. Among the available cell architectures, One-Transistor–n-Capacitor (1T-nC) and two-transistor–n-capacitor (2T-nC) FeRAMs each offer distinct trade-offs in density, scalability, and reliability. In this work, we present a comparative study of these two architectures under both dimensional scaling ( XY/Z shrinkage) and vertical integration (increasing stacked capacitors per cell). Using technology computer-aided design (TCAD) and circuit-level simulations, we analyze how scaling impacts ferroelectric capacitance, parasitic coupling, and floating-node (FN) dynamics, which together dictate sense margin (SM) and read stability. A key mitigation strategy—floating unselected capacitors—is applied to both architectures, effectively decoupling the SM from the number of stacked capacitors and enabling tractable analysis across scaling regimes. Results show that 1T-nC suffers more from charge sharing with the bitline (BL), while 2T-nC benefits from transistor isolation and stronger low-voltage sensing at the cost of increased area. By systematically evaluating these behaviors across scaling directions, this work establishes the reliability trade-offs of 1T-nC and 2T-nC cells and provides design guidelines for high-density, vertically integrated FeRAM systems.

1T-nC↗

Design, development, fabrication and delivery of register and multiplexer units

Two complementary MOS monolithic chip types were developed, which contain a register and multiplexer unit to be used in the central processing unit of a digital computer. The partition of the logic into a chip size consistent with the characteristics of the packages is discussed. The logic was implemented by specially configured circuitry designed to layout, as well as to optimize, performance by taking advantage of the properties of CMOS logic. Of several approaches considered for generating LSI CMOS arrays, the CMOS standard cell array design technique was selected. These design automation techniques were used to generate the chip layout, art work and working master plates, followed by the fabrication and testing of the two chip types. Sixty functional LSI arrays were delivered.

Feller, A.↗

Automating analog design: Taming the shrew

The pace of progress in the design of integrated circuits continues to amaze observers inside and outside of the industry. Three decades ago, a 50 transistor chip was a technological wonder. Fifteen year later, a 5000 transistor device would 'wow' the crowds. Today, 50,000 transistor chips will earn a 'not too bad' assessment, but it takes 500,000 to really leave an impression. In 1975 a typical ASIC device had 1000 transistors, took one year to first samples (and two years to production) and sold for about 5 cents per transistor. Today's 50,000 transistor gate array takes about 4 months from spec to silicon, works the first time, and sells for about 0.02 cents per transistor. Fifteen years ago, the single most laborious and error prone step in IC design was the physical layout. Today, most IC's never see the hand of a layout designer: and automatic place and route tool converts the engineer's computer captured schematic to a complete physical design using a gate array or a library of standard cells also created by software rather than by designers. CAD has also been a generous benefactor to the digital design process. The architect of today's digital systems creates the design using an RTL or other high level simulator. Then the designer pushes a button to invoke the logic synthesizer-optimizer tool. A fault analyzer checks the result for testability and suggests where scan based cells will improve test coverage. One obstinate holdout amidst this parade of progress is the automation of analog design and its reduction to semi-custom techniques. This paper investigates the application of CAD techniques to analog design.

Barlow, A.↗

Superconducting Shuttle-Flux Shift Register for Race Logic and Its Applications

Here this paper presents a superconducting, magnetically-coupled, shuttle-flux shift register (SF-SR) that stores single flux quantum (SFQ) pulses. This shift register has a DC bias operating margin of ±34% at 10 GHz, with a power dissipation of 3.6 μW and 38% fewer Josephson junctions (JJs) when scaled up to multiple stages compared to a data flip-flop (DFF) based shift register. The clock input is inductively coupled and is independent from the data input. We then present three applications for our SF-SR. In the first application, we add two non-destructive readout (NDRO) cells to construct a buffer that temporarily stores the temporal information of a series of race logic (RL) pulses. The second application is a pseudo-random number generator based on a linear function shift register (LFSR). The third application is N parallel SF-SRs that can act similar to a deserializer or instead can emulate a single SF-SR of N times higher clock frequency. These three applications motivate deep shift registers with many shifting intervals, which our SF-SR can implement with fewer JJs and lower power consumption compared to DFF-based shift registers.

42 ENGINEERING↗

Results of the Air Force high efficiency cascaded multiple bandgap solar cell programs

The III-V semiconductor materials system that was selected for continued cascade cell development was the AlGaAs cell on GaAs cell structure. The tunnel junction used as transparent ohmic contact between the top cell and the bottom cell continued to be the central difficulty in achieving the program objective of 25 percent AMO efficiency at 25 C. During the tunnel junction and top cell developments it became apparent that the AlGaAs cell has potential for independent development as a single junction converter and is a logical extension of the present GaAs heteroface technology.

Rahilly, W. P.↗

Electron lithography STAR design guidelines. Part 3: The mosaic transistor array applied to custom microprocessors. Part 4: Stores logic arrays, SLAs implemented with clocked CMOS

The Mosaic Transistor Array is an extension of the STAR system developed by NASA which has dedicated field cells designed to be specifically used in semicustom microprocessor applications. The Sandia radiation hard bulk CMOS process is utilized in order to satisfy the requirements of space flights. A design philosophy is developed which utilizes the strengths and recognizes the weaknesses of the Sandia process. A style of circuitry is developed which incorporates the low power and high drive capability of CMOS. In addition the density achieved is better than that for classic CMOS, although not as good as for NMOS. The basic logic functions for a data path are designed with compatible interface to the STAR grid system. In this manner either random logic or PLA type structures can be utilized for the control logic.

Trotter, J. D.↗

Real-time optimization of multi-cell industrial evaporative cooling towers using machine learning and particle swarm optimization

Existing electrical generating stations must operate with greater flexibility due to increasing renewable energy penetration on the electrical grid, and many coal-fired power stations have transitioned away from baseload operation to load-following operation to aid in grid stability. In cases where multiple independently controlled cooling tower cells are used in parallel for the cooling purposes of such stations, there is an opportunity to increase plant efficiency through data-driven optimization across their full load ranges. This work presents a novel application of real-time optimization using machine learning and particle swarm optimization on a multi-cell induced-draft cooling tower servicing a coal-fired power station under variable load. This is the first work to demonstrate simultaneous optimization of a multi-cell cooling tower, in addition to using machine learning for closed-loop control on a cooling tower. A novel control configuration is presented that ensures original control logic is not adversely affected and that the overall plant process is not disrupted using only existing hardware and operational data. To verify this methodology, the 12 independent cooling tower cells are simulated in parallel using historic operating data to demonstrate the effectiveness of real-time optimization compared to current practice. An artificial neural network is trained to predict overall cooling tower power consumption using only operational data and ambient conditions with an R2 value of greater than 0.96. The real-time optimization using particle swarm yields 6.7% annual energy usage savings compared to current practices, although the extent of the real-time savings varies greatly with both plant load and environmental conditions. This is particularly significant for a variable load situation because frequent ramping typically results in reduced overall efficiency. Furthermore, this proposed AI-based solution presents an opportunity to improve the overall heat rate of a load-following coal-fired power plant without the need to perform extensive first-principles modeling or add additional hardware to the cooling tower, resulting in more resources conserved and less overall emissions per unit of electricity generated.

42 ENGINEERING↗

Purification and cultivation of human pituitary growth hormone secreting cells

Efforts were directed towards maintenance of actively secreting human pituitary growth hormone cells (somatotrophs) in vitro. The production of human growth hormone (hGH) by this means would be of benefit for the treatment of certain human hypopituitary diseases such as dwarfism. One of the primary approaches was the testing of agents which may logically be expected to increase hGH release. The progress towards this goal is summarized. Results from preliminary experiments dealing with electrophoresis of pituitary cell for the purpose of somatotroph separation are described.

Hymer, W. C.↗

Multiomics and deep learning dissect regulatory syntax in human development

Transcription factors establish cell identity during development by binding regulatory DNA in a sequence-specific manner, often promoting local chromatin accessibility and regulating gene expression1. Mapping accessible chromatin offers critical insights into transcriptional control, but available datasets for human development are restricted to bulk tissue, single organs or single modalities2. Here we present the Human Development Multiomic Atlas, a single-cell atlas of chromatin accessibility and gene expression from 817,740 fetal cells across 12 organs, spanning 203 cell types and more than 1 million candidate cis-regulatory elements, many of which exhibit organ-specific in vivo enhancer activity. Deep learning models trained to predict accessibility from local DNA sequence unravel a comprehensive lexicon of motifs that influence accessibility, including composite motifs exhibiting distinct syntactic constraints that are predicted to mediate transcription factor cooperativity. We identify ‘hard’ syntactic rules requiring precise motif spacing and orientation, ‘soft’ rules allowing flexible motif arrangements, and ubiquitous motifs inhibiting accessibility. Model-based interpretation of genetic variants reveals that disruption of motifs with positive and negative effects is associated with concordant effects on gene expression. Our work delineates how motif syntax governs cell-type-specific chromatin accessibility and provides a foundational resource for decoding cis-regulatory logic and interpreting genetic variation during human development.

59 BASIC BIOLOGICAL SCIENCES↗

System and method for the adaptive mapping of matrix data to sets of polygons

A system and method for converting bitmapped data, for example, weather data or thermal imaging data, to polygons is disclosed. The conversion of the data into polygons creates smaller data files. The invention is adaptive in that it allows for a variable degree of fidelity of the polygons. Matrix data is obtained. A color value is obtained. The color value is a variable used in the creation of the polygons. A list of cells to check is determined based on the color value. The list of cells to check is examined in order to determine a boundary list. The boundary list is then examined to determine vertices. The determination of the vertices is based on a prescribed maximum distance. When drawn, the ordered list of vertices create polygons which depict the cell data. The data files which include the vertices for the polygons are much smaller than the corresponding cell data files. The fidelity of the polygon representation can be adjusted by repeating the logic with varying fidelity values to achieve a given maximum file size or a maximum number of vertices per polygon.

Burdon, David↗

Space Shuttle Stiffener Ring Foam Failure Analysis, a Non-Conventional Approach

The Space Shuttle Program made use of the excellent properties of rigid polyurethane foam for cryogenic tank insulation and as structural protection on the solid rocket boosters. When foam applications de-bond, classical methods of failure analysis did not provide root cause of the failure of the foam. Realizing that foam is the ideal media to document and preserve its own mode of failure, thin sectioning was seen as a logical approach for foam failure analysis to observe the three dimensional morphology of the foam cells. The cell foam morphology provided a much greater understanding of the failure modes than previously achieved.

cryogenic tank insulation↗

Space Shuttle Stiffener Ring Foam Failure Analysis, a Non-Conventional Approach.

The Space Shuttle Program made use of the excellent properties of rigid polyurethane foam for cryogenic tank insulation and as structural protection on the solid rocket boosters. When foam applications de-bond, classical methods of failure analysis did not provide root cause of the failure of the foam. Realizing that foam is the ideal media to document and preserve its own mode of failure, thin sectioning was seen as a logical approach for foam failure analysis to observe the three dimensional morphology of the foam cells. The cell foam morphology provided a much greater understanding of the failure modes than previously achieved.

Foam↗

Upgrades at the Propulsion Systems Lab (PSL)

The Propulsion Systems Lab (PSL) does ground testing on full size air breathing engines. These engines range from those on commercial airplanes to fighter jets. At the PSL, engineers receive test requirements from customers and put together the necessary instrumentation, data systems, power requirements, electrical control valves, and engine controls. The engineers are also responsible for facility maintenance, repairs and upgrades. There are four major sections at the PSL; the Test floor, the Data room, the Control room and, the WDPF room. On the test floor are two test cells, cell #3 and cell #4. It is within these cells that the actual engine resides for ground testing. The cells, once sealed and taken up to altitude, are capable of reaching engine inlet temperatures of 1000 F to -90 F, and various atmospheric pressures. The engine, when operational, takes in air and gives out exhaust of up to 2000 F. The exhaust is led to another section of the cell where it is cooled to 150 F before finally redirected to the appropriate disposer. Temperature and pressure transducers detect the conditions within the cell and transmit them to the data room where the results are captured, processed, analyzed, and translated to a more comprehensive language. This is made possible with the aid of several programmable logic controllers (PLCs) and instrumentation and control systems. The translated data is then sent, via the LAN, to the control room where the results can be viewed on monitors by the engineers and customers. From the control room, the test cell conditions can be changed whenever desired. During tests, a lot takes place in the facility. The WDPF control system monitors and controls all facility parameters. This summer, I will assist the engineers; on an upgrade to the facility's distributed control and dynamic data system, in preparation for an engine test that will begin in September, the installation of control systems and various miscellaneous projects around the PSL.

Audu, Abdullahi M.↗

Nonvolatile electrochemical memory at 600°C enabled by composition phase separation

Silicon-based microelectronics are limited to ~150°C and therefore not suitable for the extremely high temperatures in aerospace, energy, and space applications. While wide-band-gap semiconductors can provide high-temperature logic, nonvolatile memory devices at high temperatures have been challenging. In this work, we develop a nonvolatile electrochemical memory cell that stores and retains analog and digital information at temperatures as high as 600°C. Through correlative scanning transmission electron microscopy, we show that this high-temperature information retention is a result of composition phase separation between the oxidized and reduced forms of amorphous tantalum oxide. This result demonstrates a memory concept that is resilient at extreme temperatures and reveals phase separation as the principal mechanism that enables nonvolatile information storage in these electrochemical memory cells.

42 ENGINEERING↗

An analytical study of reduced-gravity flow dynamics

Addition of surface tension forces to a marker-and-cell code and the performance of four incompressible fluid simulations in reduced gravity, were studied. This marker-and-cell code has a variable grid capability with arbitrary curved boundaries and time dependent acceleration fields. The surface tension logic includes a spline fit of surface marker particles as well as contact angle logic for straight and curved wall boundaries. Three types of flow motion were simulated with the improved code: impulsive settling in a model Centaur LH2 tank, continuous settling in a model and full scale Centaur LO2 tank and mixing in a Centaur LH2 tank. The impulsive settling case confirmed a drop tower analysis which indicated more orderly fluid collection flow patterns with this method providing a potential savings in settling propellants. In the LO2 tank, fluid collection and flow simulation into the thrust barrel were achieved. The mixing simulation produced good results indicating both the development of the flow field and fluid interface behavior.

Bradshaw, R. D.↗

Gas-Sensing Flip-Flop Circuits

Gas-sensing integrated circuits consisting largely of modified static random-access memories (SRAMs) undergoing development, building on experience gained in use of modified SRAMs as radiation sensors. Each SRAM memory cell includes flip-flop circuit; sensors exploit metastable state that lies between two stable states (corresponding to binary logic states) of flip-flop circuit. Voltages of metastable states vary with exposures of gas-sensitive resistors.

Buehler, Martin G.↗