Quantum dot modeling using NEMO 3-D
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No abstract available
InGaAs/GaAs island formation during vapor phase epitaxy showed diverging behaviors when varying group V partial pressures (PP). Differences include changes in critical thicknesses for the onset of the Stranski-Krastanow (S-K) transformation, surface coverages, ratios between coherent and incoherent islands, and dissimilar morphologies upon annealing.
The basic optoelectronic properties of self-forming InGaAs/InAlAs QDs are examined in parallel with their device implementation. Recent results showing remarkably good tolerance to radiation induced point defects and good luminescence emission from InAs/InGaAs QDs grown on dislocationarrays are discussed in terms of an enabling technology which will allow optelectronics integration with silicon technology.
Effects of electron irradiation on some of the optical properties in organic CdSe nanocrystals coated in trioctylphosphine oxide (TOPO) and biologically compatible CdSe nanocrystals coated in mercaptoacetic acid, as CdSe as CdSe nanocrystals conjugated with the protein are investigated using the technique of cathodoluminescence. Effects of varying the beam energy and temperatures were examined and faster degradation at cryogenic temperatures and higher beam energies was found under some conditions.
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Nanocrystal nonvolatile floating-gate memories are a good candidate for space applications - initial results suggest they are fast, more reliable and consume less power than conventional floating gate memories. In the nanocrystal based NVM device, charge is not stored on a continuous polysilicon layer (so-called floating gate), but instead on a layer of discrete nanocrystals. Charge injection and storage in dense arrays of silicon nanocrystals in SiO2 is a critical aspect of the performance of potential nanocrystal flash memory structures. The ultimate goal for this class of devices is few- or single-electron storage in a small number of nanocrystal elements. In addition, the nanocrystal layer fabrication technique should be simple, 8-inch wafer compatible and well controlled in program/erase threshold voltage swing was seen during 100,000 program and erase cycles. Additional near-term goals for this project include extensive testing for radiation hardness and the development of artificial layered tunnel barrier heterostructures which have the potential for large speed enhancements for read/write of nanocrystal memory elements, compared with conventional flash devices. Additional information is contained in the original extended abstract.
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