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DOE OSTI2021

Crystalline materials for quantum computing: Semiconductor heterostructures and topological insulators exemplars

Abstract High-purity crystalline solid-state materials play an essential role in various technologies for quantum information processing, from qubits based on spins to topological states. New and improved crystalline materials emerge each year and continue to drive new results in experimental quantum science. This article summarizes the opportunities for a selected class of crystalline materials for qubit technologies based on spins and topological states and the challenges associated with their fabrication. We start by describing semiconductor heterostructures for spin qubits in gate-defined quantum dots and benchmark GaAs, Si, and Ge, the three platforms that demonstrated two-qubit logic. We then examine novel topologically nontrivial materials and structures that might be incorporated into superconducting devices to create topological qubits. We review topological insulator thin films and move onto topological crystalline materials, such as PbSnTe, and its integration with Josephson junctions. We discuss advances in novel and specialized fabrication and characterization techniques to enable these. We conclude by identifying the most promising directions where advances in these material systems will enable progress in qubit technology.

Scappucci, G. (ORCID:0000000325120079)↗

DOE OSTI2024

Epitaxial Growth of Large-Scale 2D CrTe 2 Films on Amorphous Silicon Wafers With Low Thermal Budget

2D van der Waals (vdW) magnets open landmark horizons in the development of innovative spintronic device architectures. However, their fabrication with large scale poses challenges due to high synthesis temperatures (>500 °C) and difficulties in integrating them with standard complementary metal-oxide semiconductor (CMOS) technology on amorphous substrates such as silicon oxide (SiO 2 ) and silicon nitride (SiN x ). Here, a seeded growth technique for crystallizing CrTe 2 films on amorphous SiN x /Si and SiO 2 /Si substrates with a low thermal budget is presented. This fabrication process optimizes large-scale, granular atomic layers on amorphous substrates, yielding a substantial coercivity of 11.5 kilo-oersted, attributed to weak intergranular exchange coupling. Field-driven Néel-type stripe domain dynamics explain the amplified coercivity. Moreover, the granular CrTe 2 devices on Si wafers display significantly enhanced magnetoresistance, more than doubling that of single-crystalline counterparts. Current-assisted magnetization switching, enabled by a substantial spin–orbit torque with a large spin Hall angle (85) and spin Hall conductivity (1.02 × 10 7 ℏ/2e Ω -1 m -1 ), is also demonstrated. These observations underscore the proficiency in manipulating crystallinity within integrated 2D magnetic films on Si wafers, paving the way for large-scale batch manufacturing of practical magnetoelectronic and spintronic devices, heralding a new era of technological innovation.

2D magnetic thin films↗

DOE OSTI2021

A molecular design approach towards elastic and multifunctional polymer electronics

Next-generation wearable electronics require enhanced mechanical robustness and device complexity. Besides previously reported softness and stretchability, desired merits for practical use include elasticity, solvent resistance, facile patternability and high charge carrier mobility. Here, we show a molecular design concept that simultaneously achieves all these targeted properties in both polymeric semiconductors and dielectrics, without compromising electrical performance. This is enabled by covalently-embedded in-situ rubber matrix (iRUM) formation through good mixing of iRUM precursors with polymer electronic materials, and finely-controlled composite film morphology built on azide crosslinking chemistry which leverages different reactivities with C–H and C=C bonds. The high covalent crosslinking density results in both superior elasticity and solvent resistance. When applied in stretchable transistors, the iRUM-semiconductor film retained its mobility after stretching to 100% strain, and exhibited record-high mobility retention of 1 cm 2 V -1 s -1 after 1000 stretching-releasing cycles at 50% strain. The cycling life was stably extended to 5000 cycles, five times longer than all reported semiconductors. Furthermore, we fabricated elastic transistors via consecutively photo-patterning of the dielectric and semiconducting layers, demonstrating the potential of solution-processed multilayer device manufacturing. The iRUM represents a molecule-level design approach towards robust skin-inspired electronics.

42 ENGINEERING↗

DOE OSTI2023

1 kV Self-Aligned Vertical GaN Superjunction Diode

This work demonstrates vertical GaN superjunction (SJ) diodes fabricated via a novel self-aligned process. The SJ comprises n-GaN pillars wrapped by the charge-balanced p-type nickel oxide (NiO). After the NiO sputtering around GaN pillars, the self-aligned process exposes the top pillar surfaces without the need for additional lithography or a patterned NiO etching which is usually difficult. The GaN SJ diode shows a breakdown voltage (B V) of 1100 V, a specific on-resistance (R ON ) of 0.4 mΩ· cm2, and a SJ drift-region resistance ( R dr ) of 0.13 mΩ· cm2. Further, the device also exhibits good thermal stability with B V retained over 1 kV and R ON dropped to 0.3 mΩ· cm2 at 125°C. The trade-off between B V and R dr is superior to the 1D GaN limit. These results show the promise of vertical GaN SJ power devices. The self-aligned process is applicable for fabricating the heterogeneous SJ based on various wide- and ultra-wide bandgap semiconductors.

42 ENGINEERING↗

DOE OSTI2022

Wide bandgap semiconductor materials and devices

The technological and societal impacts of electronic devices based on Ge, Si, and compound semiconductors like GaAs have been profound, fueling the decades long quest in identifying ever-larger bandgap semiconductors to untap new applications and possibilities. Specifically, an increase in the bandgap leads to shorter wavelength emission and an increased breakdown electric field, which has direct consequences for solid-state lighting like light-emitting diodes (LEDs) and laser diodes (LDs) from the visible (blue-green, blue, and violet) and beyond (UV and deep-UV) spectral range and for radically improved power devices supported by a higher intrinsic breakdown strength. Wide bandgap (WBG) semiconductors represent the frontier of materials that satisfy these criteria and include group IV, III–V, and II–VI material families like SiC (3.2 eV), GaN (3.4 eV), and ZnO (3.4 eV), respectively. With even larger bandgaps exceeding 4 eV, ultrawide bandgap (UWBG) semiconductors include diamond, III-nitrides incorporating Al and B (e.g., AlN, BN, and AlGaN), and sesquioxides like Ga 2 O 3 and (Al,Ga) 2 O 3 . These materials span widely varying stages of technological maturity, with SiC and GaN platforms among the most mature with commercially available devices in RF and high-power electronics, while other platforms such as Ga 2 O 3 rapidly advancing and poised to enable new UV and deep-UV optoelectronic devices. This Special Topic on Wide Bandgap Semiconductor Materials and Devices covers broad research subtopics on WBG and UWBG materials that span bulk crystals, epitaxy and substrate technologies, fundamental defect science, and doping, as well as electronic and optoelectronic device fabrication and characterization. Here, we highlight works from the collection, which we categorize by material platform of SiC, III-nitrides, and Ga 2 O 3 and related alloys.

36 MATERIALS SCIENCE↗

DOE OSTI2020

Fabrication of field-effect transistors with transfer-free nanostructured carbon as semiconducting channel material

Carbon nanostructures as active channel material in field effect transistors (FETs) are appealing in microelectronics for their improved performance such as high speed and low energy dissipation. However, these devices require the incorporation of nanostructure transfer steps in the fabrication process flow, which makes difficult its application in large scale integration circuits. Here we present a novel method for the fabrication of FETs with nanostructured carbon in the channel with p-type semiconducting properties and intermediate drain-source current (IDS) on/off ratio. The method is based on the use of Ni nanoparticles in the source-drain gap region as seed material for the formation of carbon nanostructures in the FET channel. FETs without Ni nanoparticles in the channel showed no modulation of IDS as a function of gate voltage. The device fabrication process does not require any carbon nanostructure transfer steps since it directly forms carbon nanostructures electrically connected to the device's source and drain electrodes via electron-beam evaporation of carbon and conventional lithographic processes. Since all device fabrication steps are compatible with Si technology processes, they are capable of being further optimized following process development protocols practiced by the semiconductor industry.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

DOE OSTI2023

Engineered current-density profile diode laser

The present technology can be used to control the current injection profile in the longitudinal direction of a high-power diode laser in order to optimize current densities as a function of position in the cavity to promote higher reliable output power and increase the electrical to optical conversion efficiency of the device beyond the level which can be achieved without application of this technique. This approach can be utilized, e.g., in the fabrication of semiconductor laser chips to improve the output power and wall plug efficiency for applications requiring improved performance operation.

Leisher, Paul O.↗

DOE OSTI2024

Engineered current-density profile diode laser

Leisher, Paul O.↗

DOE OSTI2025

Rapid Solidification Effects in Additively Manufactured Si and SiGe Compositions

SiGe alloys have a proven track record as robust high-temperature thermoelectric materials, powering NASA missions like SNAP-10A, LES-9, and Voyager 1 and 2. Enhancing thermoelectric efficiency hinges on minimizing thermal conductivity while preserving electrical conductivity. Rapid solidification via LPBF can generate microstructural features such as subgrain cellular boundaries and twinning, which may help reduce thermal conductivity while preserving semiconducting behavior. Here, this study investigates the potential of laser powder bed fusion (LPBF) additive manufacturing to fabricate nanostructured Si and SiGe thermoelectric materials. High cooling rates (10 5 to 10 7 K/s) rates inherent to the LPBF process are conducive to forming such nanostructures. Moreover, this fabrication technique could also be suitable for fabricating complex geometries needed to achieve improved device level performance. Process mapping of commercial Si powder with irregular morphology was first performed to understand the LPBF processing behavior of this semiconductor material. Subsequent studies included in-house synthesized B-doped (p-type) Si7 8 Ge 22 spherical powder that was produced via ultrasonic atomization. Scan strategies involved multiple laser exposures to mitigate solidification cracking: a high density of >98% was achieved, but solidification cracking could not be fully eliminated. Subsequently, a high electrical resistivity (i.e., low conductivity) was observed, but the measured Seebeck coefficient, ∼230 μV/K @ 500 °C, proved that good semiconductor material was being fabricated. A subgrain cellular structure (5–10 μm) was observed as defined by Ge segregation to the intercellular boundaries. The remelting strategies helped lower the cooling rates in processing SiGe, but this still resulted in high residual stresses, which induced a remarkably high density of twins (78–95%) to accommodate the deformation. This unique grain structure offers an avenue for phonon scattering and potential improvements in thermoelectric performance.

figure of merit↗

DOE OSTI2024

Electric-Field-Driven Localization of Molecular Nanowires in Wafer-Scale Nanogap Electrodes

As integrated circuits continue to scale toward the atomic limit, bottom-up processes, such as epitaxial growth, have come to feature prominently in their fabrication. At the same time, chemistry has developed highly tunable molecular semiconductors that can perform the functions of ultimately scaled circuit components. Hybrid techniques that integrate programmable structures comprising molecular components into devices however are sorely lacking. Here we demonstrate a wafer-scale process that directs the localization of a conductive polymer, M w = 20 kg mol –1 polyaniline, from dilute solutions into 50 nm vertical nanogap device architectures using electric-field-driven self-assembly. The resulting metal–polymer–metal junctions were characterized by electron microscopy, Raman spectroscopy and transport measurements demonstrating that our technique is highly selective, assembling conductive polymers only in electrically activated nanogaps. Our results represent a step toward scalable hybrid nanoelectronics that seamlessly integrate established lithographic top-down fabrication with bottom-up synthesized molecular functional circuit components.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

DOE OSTI2025

All 2D Material Printed Diodes and Circuits on Paper for Sustainable Electronics

Sustainable electronics aim to reduce environmental impact by using ecofriendly materials, energy-efficient manufacturing, and recyclable components. However, existing approaches rely on complex, resource-intensive methods, rare metals, or nanomaterials with limited stability as well as plastic substrates, raising sustainability issues. Solution-processed two-dimensional (2D) materials offer a promising alternative: water-based and biocompatible conductive, semiconductive, and insulating 2D material inks can be produced with scalable techniques and are suitable for the fabrication of fully printed devices on low-cost and biodegradable paper substrates. However, 2D material only and fully printed diodes on paper have not yet been reported. Here, we demonstrate fully inkjet-printed 2D material-based diodes on paper using metal-insulator-semiconductor and metal-insulator-metal-semiconductor architectures. Water-based graphene and MoS2 inks, prepared by liquid-phase exfoliation, are used for the metallic and insulating films, while electrochemical exfoliation is used to produce the semiconducting MoS2 ink. The highest forward-to-reverse current ratio obtained is 330 (at ±2 V), while the forward current density is 1 mA/cm2 (at 1 V), making the diode performance comparable to the best solution-processed diodes reported so far. However, in contrast to previous works, fabrication occurs entirely at room temperature and ambient pressure, without using high-pressure sputtering, thermal evaporation, and any precious metal ink. The devices maintain stable performance under bending up to strain of 4% over 10,000 cycles. Finally, the diodes are successfully integrated with other 2D-material based electrical components to realize fully printed RC circuits, differentiators, integrators, and AC-to-DC converters onto paper, hence demonstrating the suitability of our approach for sustainable and disposable integrated circuits.

2D materials↗

DOE OSTI2020

Tri-gate GaN junction HEMT

This work presents a tri-gate GaN junction high-electron-mobility transistor (JHEMT) concept in which the p–n junction wraps around the AlGaN/GaN fins in the gate region. This tri-gate JHEMT differs from all existing GaN FinFETs and tri-gate HEMTs, as they employ a Schottky or a metal-insulator-semiconductor (MIS) gate stack. A tri-gate GaN JHEMT is fabricated using p-type NiO with the gate metal forming an Ohmic contact to NiO. The device shows minimal hysteresis and a subthreshold slope of 63 ± 2 mV/decade with an on-off current ratio of 10 8 . Compared to the tri-gate MISHEMTs fabricated on the same wafer, the tri-gate JHEMTs exhibit higher threshold voltage (V TH ) and achieve positive V TH without the need for additional AlGaN recess. In addition, this tri-gate JHEMT with a fin width of 60 nm achieves a breakdown voltage (BV) > 1500 V (defined at the drain current of 1 μA/mm at zero gate bias) and maintains the high BV with the fin length scaled down to 200 nm. In comparison, the tri-gate MISHEMTs with narrower and longer fins show punch-through at high voltages. Moreover, when compared to planar enhancement mode HEMTs, tri-gate JHEMTs show significantly lower channel sheet resistance in the gate region. Finally, these results illustrate a stronger channel depletion and electrostatic control in the junction tri-gate compared to the MIS tri-gate and suggest great promise of the tri-gate GaN JHEMTs for both high-voltage power and low-voltage power/digital applications.

36 MATERIALS SCIENCE↗

DOE OSTI2021

Boosting the External Quantum Efficiency of AlGaN-Based Metal–Semiconductor–Metal Ultraviolet Photodiodes by Electrode Geometry Variation

Fast aluminum-gallium-nitride–based metal–semiconductor–metal ultraviolet photodiodes were successfully designed, fabricated, and characterized using conventional photolithography techniques. Various electrode geometries were fabricated to investigate the influence of metal contact shapes on the device performance indices with emphasis on the response speed and bias-voltage–independent efficiency. Furthermore, based on the independently measured Hall mobility and electric field, we evaluated the carrier transit time of the devices as 1.31 ps with bias-voltage–independent external quantum efficiency of 1198% in photoconductive mode at 19.5 V and 70% at 60 V for n -doped and intrinsic devices, respectively.

42 ENGINEERING↗

DOE OSTI2022

From Salt to Electronics: Heteroepitaxy and GaAs Solar Cells

This paper presents work on the heteroepitaxy of salts, specifically fluorides, on semiconductor and heteroepitaxy of semiconductor on salts. Fluorides layers are deposited on commercial Gallium Arsenide (GaAs) wafers followed by the heteroepitaxial growth of GaAs using metal organic chemical vapor deposition (MOCVD). The fluoride layers consist of 2 lattice-engineered layers of alkaline-earth compounds to match with GaAs, and are used to sandwich another alkaline-earth compound with higher water-solubility as sacrificial layer. The triple fluoride layers enable liftoff of free-standing semiconductor films which can be further transferred to desirable substrates. 2D-X-ray Diffraction (2D-XRD) measurements confirm epitaxial growth of both the fluorides and the subsequently grown GaAs films. Single junction (SJ) solar cell devices based on thus prepared films show a power conversion efficiency (PCE) of 10.3% under 1 sun illumination. After the completion of device fabrications, the GaAs film is lifted off from the substrate by a novel water-assisted epitaxial liftoff (H 2 O-ELO) technique and transferred to a cheaper substrate. The original GaAs wafer is recycled and reused twice. Devices based on reused substrates show no significant degradation in performance. Lastly, the semiconductor-salt-semiconductor scheme has great implications in high performance, flexible, and large area electronics.

14 SOLAR ENERGY↗

DOE OSTI2022

All‐Polymer Bulk‐Heterojunction Organic Electrochemical Transistors with Balanced Ionic and Electronic Transport

Abstract The rapid development of organic electrochemical transistor (OECTs)‐based circuits brings new opportunities for next‐generation integrated bioelectronics. The all‐polymer bulk‐heterojunction (BHJ) offers an attractive, inexpensive alternative to achieve efficient ambipolar OECTs, and building blocks of logic circuits constructed from them, but have not been investigated to date. Here, the first all‐polymer BHJ‐based OECTs are reported, consisting of a blend of new p‐type ladder conjugated polymer and a state‐of‐the‐art n‐type ladder polymer. The whole ladder‐type polymer BHJ also proves that side chains are not necessary for good ion transport. Instead, the polymer nanostructures play a critical role in the ion penetration and transportation and thus in the device performance. It also provides a facile strategy and simplifies the fabrication process, forgoing the need to pattern multiple active layers. In addition, the development of complementary metal–oxide–semiconductor (CMOS)‐like OECTs allows the pursuit of advanced functional logic circuitry, including inverters and NAND gates, as well as for amplifying electrophysiology signals. This work opens a new approach to the design of new materials for OECTs and will contribute to the development of organic heterojunctions for ambipolar OECTs toward high‐performing logic circuits.

Chemistry↗

DOE OSTI2021

High temperature characteristics of nitric oxide annealed p-channel 4H-SiC metal oxide semiconductor field effect transistors

In this work, p-channel 4H-SiC MOSFETs were fabricated and analyzed at high temperature. It is demonstrated that nitridation of the gate oxide enables enhancement mode operation in these devices. Nitrogen incorporation at the 4H-SiC/SiO2 interface by nitric oxide annealing reduces the interface trap density energetically located in the lower half of the 4H-SiC bandgap, resulting in viable high temperature p-channel devices. In the 27–300 °C temperature range, the threshold voltage decreases with increasing temperature, consistent with the reduction of occupied interface traps at higher temperatures. The hole channel mobility is weakly temperature dependent under strong inversion conditions. Hall measurements support that above the threshold voltage, the mobility is limited by surface roughness scattering. In weaker inversion, the channel conductivity is limited by interface hole trapping and Coulomb scattering. In addition, high temperature bias stress measurements confirm a temperature activated hole trapping under negative gate bias, which requires further investigations.

Das, Suman (ORCID:0000000317146287)↗

DOE OSTI2024

β-Ga2O3-Based Heterostructures and Heterojunctions for Power Electronics: A Review of the Recent Advances

During the past decade, Gallium Oxide (Ga2O3) has attracted intensive research interest as an ultra-wide-bandgap (UWBG) semiconductor due to its unique characteristics, such as a large bandgap of 4.5–4.9 eV, a high critical electric field of ~8 MV/cm, and a high Baliga’s figure of merit (BFOM). Unipolar β-Ga2O3 devices such as Schottky barrier diodes (SBDs) and field-effect transistors (FETs) have been demonstrated. Recently, there has been growing attention toward developing β-Ga2O3-based heterostructures and heterojunctions, which is mainly driven by the lack of p-type doping and the exploration of multidimensional device architectures to enhance power electronics’ performance. This paper will review the most recent advances in β-Ga2O3 heterostructures and heterojunctions for power electronics, including NiOx/β-Ga2O3, β-(AlxGa1−x)2O3/β-Ga2O3, and β-Ga2O3 heterojunctions/heterostructures with other wide- and ultra-wide-bandgap materials and the integration of two-dimensional (2D) materials with β-Ga2O3. Discussions of the deposition, fabrication, and operating principles of these heterostructures and heterojunctions and the associated device performance will be provided. This comprehensive review will serve as a critical reference for researchers engaged in materials science, wide- and ultra-wide-bandgap semiconductors, and power electronics and benefits the future study and development of β-Ga2O3-based heterostructures and heterojunctions and associated power electronics.

Herath Mudiyanselage, Dinusha (ORCID:0000000186119↗

DOE OSTI2021

Method for fabricating superconducting devices using a focused ion beam

Nano-scale junctions, wires, and junction arrays are created by using a focused high-energy ion beam to direct-write insulating or poorly conducting barriers into thin films of materials that are sensitive to disorder, including superconductors, ferromagnetic materials and semiconductors.

Cybart, Shane A.↗