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Results for “Total Ionizing Dose (TID)”

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At least 109 records · Page 6

Total Ionizing Dose Test of Analog Devices’ AD654 Voltage to Frequency Converter

Analog Devices’ AD654 was tested for total ionizing dose (TID) response beginning on February 13, 2017. This device has the Radiation Effects and Analysis Group Identification (REAG ID) number 16-036. This test served as the radiation lot acceptance test (RLAT) for the lot date code (LDC) tested. Low dose rate (LDR) irradiations were performed in this test so that the device susceptibility to enhanced low dose rate sensitivity (ELDRS) could be determined.

B. Freeman↗

A CubeSat-Payload Radiation-Reliability Assurance Case using Goal Structuring Notation

CubeSats have become an attractive platform for universities, industry, and government space missions because they are cheaper and quicker to develop than full-scale satellites. One way CubeSats keep costs low is by using commercial off-the-shelf parts (COTS) instead of space-qualified parts. Space-qualified parts are often costlier, larger, and consume more power than their commercial counterparts precluding their use within the CubeSat form-factor. Given typical power budgets, monetary budgets, and timelines for CubeSat missions, conventional radiation hardness assurance, like the use of space-qualified parts and radiation testing campaigns of COTS parts, is not practical. Instead, a system-level approach to radiation effects mitigation is needed. In this paper an assurance case for a system-level approach to mitigate radiation effects of a CubeSat science experiment is expressed using Goal Structuring Notation (GSN), a graphical argument standard. The case specifically looks at three main mitigation strategies for the radiation environment: total ionizing dose (TID) screening of parts, detection and recovery from single-event latch-ups (SEL) and single-event functional interrupts (SEFI). The graphical assurance case presented makes a qualitative argument for the radiation reliability of the CubeSat experiment using part and system-level mitigation strategies.

COTS↗

AD8065 Voltage Feedback Amplifier’s Total Ionizing Dose Characterization Report

The purpose of this testing was to characterize Analog Devices’ AD8065 FastFET amplifier for low-dose rate (LDR) total ionizing dose (TID) response based on the Lucy project requirements and will be used on the L’ORRI instrument being built by Johns Hopkins University Applied Physics Lab. The AD8065 is a voltage feedback amplifier with FET inputs developed with the proprietary eXtra Fast Complementary Bipolar (XFCB) process. The amplifier boasts low noise operation and very high input impedance with a wide supply voltage range.

Megan Casey↗

Commercial Sensor Survey Fiscal Year 2009 master compendium radiation test report

The NASA Electronic Parts and Packaging (NEPP) Program Sensor Technology Commercial Sensor Survey task is geared toward benefiting future NASA space missions with low-cost, short-duty-cycle, visible-wavelength imaging needs. Such applications could include imaging for educational outreach purposes or short surveys of spacecraft, planetary, or lunar surfaces. Under the task, inexpensive, low-power, commercial grade CMOS sensors were surveyed in fiscal year 2007 (FY07), and three sensors were selected and tested for total ionizing dose (TID) and displacement damage dose (DDD) tolerance in fiscal year 2008 (FY08). The selected sensors had to meet selection criteria chosen to support small, low-mass cameras that produce good resolution color images. The commercial CMOS sensors tested under the task in FY08 showed very promising response to typical outreach and survey camera TID and DDD levels. In fiscal year 2009 (FY09), the survey was broadened to include two additional, similar sensor products. This compendium provides results for all radiation testing performed on the Micron and OmniVision sensors that were selected for radiation tolerance testing in FY08 and FY09.

Thorbourn, Dennis O.↗

Guideline for ground radiation testing of microprocessors in the space radiation environment

The goal of this work is to develop a guideline that is applicable to processors that are potentially useful in space. Thus, the guideline does not consider very high performance processors that are intended for server or high-performance applications where very large amounts of power are tolerated to gain performance because it would be impractical to use such high-power devices in typical space applications. This guide is intended to support insertion of these microprocessors into spaceflight applications and to recommend ground test protocols. The first guideline principle that should be followed is a serious concurrent engineering approach for down selecting space-qualified microprocessors. This requires that the design engineer seek the support of a radiation effects expert who understands total ionizing dose (TID) and single-event effects (SEEs) issues for microprocessors as applied to the system in question.

Irom, Farokh↗

Radiation tests of highly scaled, high-density, commercial, nonvolatile NAND flash memories— update 2012

The space radiation environment poses a certain risk to all electronic components on Earth-orbiting and planetary mission spacecraft. In recent years, there has been increased interest in the use of high-density, commercial, nonvolatile flash memories in space because of ever-increasing data volumes and strict power requirements. They are used in a wide variety of spacecraft subsystems. At one end of the spectrum, flash memories are used to store small amounts of mission-critical data such as boot code or configuration files and, at the other end, they are used to construct multi-gigabyte data recorders that record mission science data. This report examines single-event effect (SEE) and total ionizing dose (TID) response in single-level cell (SLC) 32-Gb, multi-level cell (MLC) 64-Gb, and Triple-level (TLC) 64-Gb NAND flash memories manufactured by Micron Technology with feature size of 25 nm.

Allen, Gregory R.↗

High Density Packaging Technologies for RF Electronics in Small Spacecraft

This paper will describe a few high density packaging technologies which we are currently exploring for use in current and future small spacecraft applications. The three categories of technologies include organic multichip modules (MCMs), ceramic leadless surface mount technology (SMT) and 3D printed waveguide structures. There are many other packaging technologies that currently exist but these three were selected in part due to their long heritage in various commercial, military and space applications along with each having a relatively clear path to flight. For each of these technologies, detailed examples will be included in which hardware has been fabricated and tested for use in RF electronics for spacecraft transponders. The organic MCM example will be described in most detail and it utilizes a packaging technology by the name of CoreEZ which is a trademark of i3 Electronics. This MCM has shrunk a portion of our electronics down to 1/8th of its previous area. The CoreEZ technology has been shown to be rad hard beyond a total ionizing dose (TID) of 300kRad and the MCM which was fabricated has gone through thermal cycling and shown to have no degradation in performance. The ceramic leadless package examples include packages from high reliability manufactures by the name of KCB solutions and Barry Industries. In the case of KCB solutions, we have multiple products that will be described including a hermetic ceramic carrier which houses three microwave monolithic integrated circuits (MMICs) along with small discrete components. Finally, we will discuss the results of our search for a 3D printing process that allows us to reduce the cost and volume of our waveguide filters and diplexers for low cost small satellite applications. We have fabricated a few prototypes using direct metal laser sintering (DMLS) and metal coated plastics. Each of these packaging technology discussions will have a brief overview of its current and future use.

Schatzel, Donald↗

Iris Deep-Space Transponder for SLS EM-1 CubeSat Missions

Several key design upgrades have been recently made to the Iris Deep-Space Transponder baselined to be used on secondary payload missions of the upcoming Space Launch System Exploration Mission One (SLS EM-1). The Iris Transponder is a reconfigurable software-defined radio (SDR) designed for missions requiring interoperability with NASA's Deep Space Network (DSN) on X-band frequencies (7.2 GHz uplink, 8.4 GHz downlink). The transponder provides radiometric tracking support with the DSN to provide navigational products for precise orbit determination while performing standard uplink and downlink communications in a CubeSat/SmallSat-applicable package size. The recent hardware changes include a volume reduction of 30% from previous models, with the main transponder unit weighing less than 1.0 kg, while maintaining total ionizing dose (TID) radiation tolerance of >23 krads (Si) for deep-space missions. Lab tests indicate maximum downlink rates of up to 6.25 Msps can be supported by the transponder in conventional BPSK modulation, but most SLS EM-1 CubeSat missions are link-performance limited to less than 256 kbps. A prototype unit of the flight production units has been assembled and various performance and characterization tests are underway. This talk discusses the key design aspects and specifications of the Iris Transponder and presents preliminary results from early testing of the assembled transponder.

Kobayashi, M. Michael↗

Linear Systems LSK389 and LSK489 Dual N-Channel JFET Amplifier Total Ionizing Dose and Single-Event Effects Test Report

The purpose of these tests was to characterize the susceptibility of the LSK389 and LSK489 Dual N-Channel JFET from Linear Systems to Single-Event Latchup due to heavy ions and to Total Ionizing Dose (TID) degradation at -65 °C and intermediate dose rate. The test was carried out to assess suitability of the amplifiers for the Ocean Color instrument (OCI) on the Plankton, Aerosol, Cloud, ocean Ecosystem (PACE) spacecraft.

Ray Ladbury↗

Progress Towards Prolonged Deployment of SiC JFET-R ICs Into Previously Inaccessible Hostile Environments

This invited presentation describes demonstration of semiconductor integrated circuits (ICs) and ceramic packaging that are arguably the most environmentally durable transistor electronics ever demonstrated. SiC junction field effect transistor-resistor (JFET-R) ICs with two-level interconnect have successfully operated for over 1 year in 500 °C air-ambient [1], 60 days in 460 °C and 9.3 MPa pressure caustic Venus surface environment test chamber [2], and radiation exposure through 7 Mrad(Si) total ionizing dose (TID) and 86 MeV-cm2/mg heavy ion strikes [3]. Furthermore, these ICs have also demonstrated operation from -190 °C to +812 °C (over 1000 °C T-span) without significant change in signal (input /output) or power supply voltages [4]. With modest adjustments, the SiC JFET-R fabrication process is compatible with semiconductor mass-production tools and materials. As an initial step towards this end, the processing that forms the SiC JFETs and resistors (without interconnect) for the NASA Glenn “Generation 12” design prototype JFET-R ICs was conducted at GE Research. Once the COVID-delayed IC interconnect and bond pad fabrication processing on these wafers is completed at NASA Glenn, the resulting chips will be packaged and oven-tested [5]. It is expected that further technology transfer to complete commercial production will lower investment and risk barriers to useful application deployment. For NASA, an initial high-value deployment is opening the Venus surface to extended missions for robotic scientific exploration.

Silicon Carbide↗

In Situ Testing Methods for Mixed-Mode Harsh Environments

A review of the radiation effects investigation capabilities of the JPL Dynamitron Accelerator Facility are discussed. A process for its use in performing total ionizing dose (TID) studies are outlined. The results of radiation effects in complicated test systems where device effects may occur due to local system irradiation are also presented.

Wong, A. T.↗

PE99155 Point-Of-Load Buck Regulator Total Ionizing Dose Test Report

Teledyne’s PE99155 point-of-load buck regulator was tested to evaluate an applicationspecific question about the start-up behavior of the device. This test determined if accumulated total ionizing dose (TID) affected any start-up voltage transient characteristics. Testing was based on pass/fail criterial for the magnitude of the output voltage to ensure the safety of downstream electronics. Two sets of radiation tests were performed. The first group of PE99155s used a high dose rate (HDR) irradiation to 25 krad(Si). A second group of PE99155s used high dose rate irradiation to 30 krad(Si).

TID↗

Radiation Effects Considerations for Instrumentation and Control in Space Nuclear Systems

Radiation effects in electrical, electronic, electro-motive, and electro-optical (EEEE) hardware encompass a complex variety of interactions, processes, environments, and an evolving landscape of relevant hardware. Appropriately mitigating the effects of radiation in sensors, data acquisition, and control hardware is among the most significant challenges associated with deploying space nuclear power and propulsion systems. The expertise within EEEE radiation effects disciplines require working knowledge that is at least as complex and diverse as the problem itself, but that should not dissuade stakeholders and engineers in adjacent disciplines from attempting to understand the general principles associated with the problem at hand. This brief overview seeks to bring to the foreground a set of relevant topics that are of special importance for space nuclear propulsion applications that involve high rates of neutron and gamma radiation. The unique set of environments and design requirements for space nuclear systems mean that the experience and utility for methods applied to typical spaceflight hardware or terrestrial nuclear systems must not be applied naively. Forward consideration on the applicability of testing methods applied to either existing or bespoke hardware is likely to drive early decisions on system-wide radiation effects mitigation strategies, and will influence procurement requirements for providers of radiation tolerant hardware who are unlikely to have experience in this unique set of environments. Radiation hardness assurance (RHA) guidance should be adapted and emphasize the importance of hardware testing in the relevant environment. These must consider the combined effects of temperature, total ionizing dose (TID), non-ionizing/displacement damage (TNID/DD), and single event effects (SEE), and should consider the impacts of flux (rate) in addition to cumulative effects.

Radiation↗

Total Ionizing Dose Test Report Microchip JANTXV2N6284 NPN Darlington Power Si Transistor

This study was undertaken to determine the effects of total ionizing dose (TID) on the JANTXV2N6284 NPN Darlington power bipolar junction transistor (BJT). The device was parametrically characterized prior to, at each incremental dose step, and after irradiation. Testing was at a low-dose rate using the NASA GSFC Radiation Effects Facility (REF).

Kaitlyn L Ryder↗

Progress Towards SiC ASICs for Extreme Temperature and Radiation Environments

This presentation describes development and demonstrations of semiconductor integrated circuits (ICs) and ceramic packaging that are arguably the most environmentally durable transistor electronics ever demonstrated. Silicon carbide (SiC) junction field effect transistor-resistor (JFET-R) ICs fabricated by NASA Glenn Research Center with two-level interconnect have successfully operated for over 1 year in 500 °C air-ambient, 60 days in 460 °C and 9.3 MPa pressure caustic Venus surface environment test chamber, and radiation exposure through 7 Mrad(Si) total ionizing dose (TID) and 86 MeV-cm2/mg heavy ion strikes. Furthermore, these ICs have also demonstrated operation from -190 °C to +812 °C (over 1000 °C temperature span) without significant change in signal (input /output) or power supply voltages. While the operating frequency and functional complexity is far below silicon-based ICs, these SiC application specific ICs (ASICs) are nevertheless becoming capable of providing unique and advantageous harsh-environment circuit functionality without cooling/sheltering overhead. With modest adjustments, the SiC JFET-R fabrication process is compatible with semiconductor mass-production tools and materials. As an initial step towards manufacture, a majority of processing steps to realize the next SiC JFET-R IC prototype wafer run have been outsourced to commercial foundry. It is expected that further upscaling combined with technology transfer to commercial production will lower investment and risk barriers to useful application deployment.

high temperature↗