Search NASA⌕ Search

SEARCH · Search NASA

Results for “analog memory”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 109 records · Page 6

Ab Initio Transport Calculations: From Normal to Superconducting Current

Applying the Bogoliubov-de Gennes equations with density-functional theory, it is possible to formulate first principles description of current-phase relationships in superconducting/normal (magnetic)/superconducting tri-layers. Such structures are the basis for the superconducting analog of Magnetoresistive random access memory devices (JMRAM). In a recent paper1 we presented results from the first attempt to formulate such a theory, applied to the Nb/Ni/Nb trilayers. In the present work we provide computational details, explaining how to construct key ingredient (scattering matrices SN ) in a framework of linear muffin-tin orbitals (LMTO).

CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSICS↗

Filtering algorithms for processing prefiltered measurements

The filtering algorithm for processing integral measurements is extended to include analog type prefilters with infinite memory, and to include sequential processing of prefiltered data in multi-sensor, multi-sample rate systems. The extension to infinite memory prefilters requires serial decorrelation of the prefilter output prior to state estimation. These algorithms provide a technique for investigation of prefilter parameter sensitivities, and provide optimal compensation for any information loss due to prefiltering.

Warren, A. W.↗

Electromagnetic measurement of lightning strikes to aircraft

Recent in-flight direct-strike lightning research, using an NASA F-1068 aircraft, is reviewed. The instrumentation system which records the rates of change of electric and magnetic flow density at several locations on the aircraft and rate of change of strike current to the boom is described. The measurement parameters are: rate of change of electric flux density over a range of 50 amperes per square meter, rate of change of magnetic flux density over a range of 20,000 tesla per second, and rate of change of strike current over a range of 100 kilo-amperes per microsecond. The isolated and shielded instrumentation system employs high-sample-rate digital transient recorders with augmented memory capacity and a wideband analog recorder for data acquisition and recording. The data obtained during the 1980 flight test program are presented and the data significance is discussed.

Pitts, F. L.↗

PDA: A coupling of knowledge and memory for case-based reasoning

Problem solving in most domains requires reference to past knowledge and experience whether such knowledge is represented as rules, decision trees, networks or any variant of attributed graphs. Regardless of the representational form employed, designers of expert systems rarely make a distinction between the static and dynamic aspects of the system's knowledge base. The current paper clearly distinguishes between knowledge-based and memory-based reasoning where the former in its most pure sense is characterized by a static knowledge based resulting in a relatively brittle expert system while the latter is dynamic and analogous to the functions of human memory which learns from experience. The paper discusses the design of an advisory system which combines a knowledge base consisting of domain vocabulary and default dependencies between concepts with a dynamic conceptual memory which stores experimental knowledge in the form of cases. The case memory organizes past experience in the form of MOPs (memory organization packets) and sub-MOPs. Each MOP consists of a context frame and a set of indices. The context frame contains information about the features (norms) common to all the events and sub-MOPs indexed under it.

Bharwani, S.↗

Programmable soft valves for digital and analog control

In soft devices, complex actuation sequences and precise force control typically require hard electronic valves and microcontrollers. Existing designs for entirely soft pneumatic control systems are capable of either digital or analog operation, but not both, and are limited by speed of actuation, range of pressure, time required for fabrication, or loss of power through pull-down resistors. Using the nonlinear mechanics intrinsic to structures composed of soft materials—in this case, by leveraging membrane inversion and tube kinking—two modular soft components are developed: a piston actuator and a bistable pneumatic switch. These two components combine to create valves capable of analog pressure regulation, simplified digital logic, controlled oscillation, nonvolatile memory storage, linear actuation, and interfacing with human users in both digital and analog formats. Three demonstrations showcase the capabilities of systems constructed from these valves: 1) a wearable glove capable of analog control of a soft artificial robotic hand based on input from a human user’s fingers, 2) a human-controlled cushion matrix designed for use in medical care, and 3) an untethered robot which travels a distance dynamically programmed at the time of operation to retrieve an object. This work illustrates pathways for complementary digital and analog control of soft robots using a unified valve design.

42 ENGINEERING↗

Nonvolatile electrochemical memory at 600°C enabled by composition phase separation

Silicon-based microelectronics are limited to ~150°C and therefore not suitable for the extremely high temperatures in aerospace, energy, and space applications. While wide-band-gap semiconductors can provide high-temperature logic, nonvolatile memory devices at high temperatures have been challenging. In this work, we develop a nonvolatile electrochemical memory cell that stores and retains analog and digital information at temperatures as high as 600°C. Through correlative scanning transmission electron microscopy, we show that this high-temperature information retention is a result of composition phase separation between the oxidized and reduced forms of amorphous tantalum oxide. This result demonstrates a memory concept that is resilient at extreme temperatures and reveals phase separation as the principal mechanism that enables nonvolatile information storage in these electrochemical memory cells.

42 ENGINEERING↗

A nonlinear journey from structural phase transitions to quantum annealing

Motivated by an exact mapping between equilibrium properties of a one-dimensional chain of quantum Ising spins in a transverse field (the transverse field Ising (TFI) model) and a two-dimensional classical array of particles in double-well potentials (the “$\phi$ 4 model”) with weak inter-chain coupling, we explore connections between the driven variants of the two systems. Here, we argue that coupling between the fundamental topological solitary waves in the form of kinks between neighboring chains in the classical $\phi$ 4 system is the analog of the competing effect of the transverse field on spin flips in the quantum TFI model. As an example application, we mimic simplified measurement protocols in a closed quantum model system by studying the classical $\phi$ 4 model subjected to periodic perturbations. This reveals memory/loss of memory and coherence/decoherence regimes, whose quantum analogs are essential in annealing phenomena. In particular, we examine regimes where the topological excitations control the thermal equilibration following perturbations. This paves the way for further explorations of the analogy between lower-dimensional linear quantum and higher-dimensional classical nonlinear systems.

74 ATOMIC AND MOLECULAR PHYSICS↗

Miniature Intelligent Sensor Module

An electronic unit denoted the Miniature Intelligent Sensor Module performs sensor-signal-conditioning functions and local processing of sensor data. The unit includes four channels of analog input/output circuitry, a processor, volatile and nonvolatile memory, and two Ethernet communication ports, all housed in a weathertight enclosure. The unit accepts AC or DC power. The analog inputs provide programmable gain, offset, and filtering as well as shunt calibration and auto-zeroing. Analog outputs include sine, square, and triangular waves having programmable frequencies and amplitudes, as well as programmable amplitude DC. One innovative aspect of the design of this unit is the integration of a relatively powerful processor and large amount of memory along with the sensor-signalconditioning circuitry so that sophisticated computer programs can be used to acquire and analyze sensor data and estimate and track the health of the overall sensor-data-acquisition system of which the unit is a part. The unit includes calibration, zeroing, and signalfeedback circuitry to facilitate health monitoring. The processor is also integrated with programmable logic circuitry in such a manner as to simplify and enhance acquisition of data and generation of analog outputs. A notable unique feature of the unit is a cold-junction compensation circuit in the back shell of a sensor connector. This circuit makes it possible to use Ktype thermocouples without compromising a housing seal. Replicas of this unit may prove useful in industrial and manufacturing settings - especially in such large outdoor facilities as refineries. Two features can be expected to simplify installation: the weathertight housings should make it possible to mount the units near sensors, and the Ethernet communication capability of the units should facilitate establishment of communication connections for the units.

Beech, Russell S.↗

Processing deficits in monitoring analog and digital displays: Implications for attentional theory and mental-state estimation research

Subjects performed short term memory tasks, involving both spatial and verbal components, and a visual monitoring task involving either analog or digital display formats. These two tasks (memory vs. monitoring) were performed both singly and in conjunction. Contrary to expectations derived from multiple resource theories of attentional processes, there was no evidence that when the two tasks involved the same cognitive codes (i.e., either both spatial or both verbal/linguistics) there was more of a dual task performance decrement than when the two tasks employed different cognitive codes/processes. These results are discussed in terms of their implications for theories of attentional processes and also for research in mental state estimation.

Payne, David G.↗

SpaceCube v2.0 Space Flight Hybrid Reconfigurable Data Processing System

This paper details the design architecture, design methodology, and the advantages of the SpaceCube v2.0 high performance data processing system for space applications. The purpose in building the SpaceCube v2.0 system is to create a superior high performance, reconfigurable, hybrid data processing system that can be used in a multitude of applications including those that require a radiation hardened and reliable solution. The SpaceCube v2.0 system leverages seven years of board design, avionics systems design, and space flight application experiences. This paper shows how SpaceCube v2.0 solves the increasing computing demands of space data processing applications that cannot be attained with a standalone processor approach.The main objective during the design stage is to find a good system balance between power, size, reliability, cost, and data processing capability. These design variables directly impact each other, and it is important to understand how to achieve a suitable balance. This paper will detail how these critical design factors were managed including the construction of an Engineering Model for an experiment on the International Space Station to test out design concepts. We will describe the designs for the processor card, power card, backplane, and a mission unique interface card. The mechanical design for the box will also be detailed since it is critical in meeting the stringent thermal and structural requirements imposed by the processing system. In addition, the mechanical design uses advanced thermal conduction techniques to solve the internal thermal challenges.The SpaceCube v2.0 processing system is based on an extended version of the 3U cPCI standard form factor where each card is 190mm x 100mm in size The typical power draw of the processor card is 8 to 10W and scales with application complexity. The SpaceCube v2.0 data processing card features two Xilinx Virtex-5 QV Field Programmable Gate Arrays (FPGA), eight memory modules, a monitor FPGA with analog monitoring, Ethernet, configurable interconnect to the Xilinx FPGAs including gigabit transceivers, and the necessary voltage regulation. The processor board uses a back-to-back design methodology for common parts that maximizes the board real estate available. This paper will show how to meet the IPC 6012B Class 3A standard with a 22-layer board that has two column grid array devices with 1.0mm pitch. All layout trades such as stack-up options, via selection, and FPGA signal breakout will be discussed with feature size results. The overall board design process will be discussed including parts selection, circuit design, proper signal termination, layout placement and route planning, signal integrity design and verification, and power integrity results. The radiation mitigation techniques will also be detailed including configuration scrubbing options, Xilinx circuit mitigation and FPGA functional monitoring, and memory protection.Finally, this paper will describe how this system is being used to solve the extreme challenges of a robotic satellite servicing mission where typical space-rated processors are not sufficient enough to meet the intensive data processing requirements. The SpaceCube v2.0 is the main payload control computer and is required to control critical subsystems such as autonomous rendezvous and docking using a suite of vision sensors and object avoidance when controlling two robotic arms.

Xilinx FPGA↗

Vector-Matrix Multiplication Engine for Neuromorphic Computation with a CBRAM Crossbar Array [Slides]

The core function of many neural network algorithms is the dot product, or vector matrix multiply (VMM) operation. Crossbar arrays utilizing resistive memory elements can reduce computational energy in neural algorithms by up to five orders of magnitude compared to conventional CPUs. Moving data between a processor, SRAM, and DRAM dominates energy consumption. By utilizing analog operations to reduce data movement, resistive memory crossbars can enable processing of large amounts of data at lower energy than conventional memory architectures.

97 MATHEMATICS AND COMPUTING↗

Probabilistic Neural Computing with Stochastic Devices

Abstract The brain has effectively proven a powerful inspiration for the development of computing architectures in which processing is tightly integrated with memory, communication is event‐driven, and analog computation can be performed at scale. These neuromorphic systems increasingly show an ability to improve the efficiency and speed of scientific computing and artificial intelligence applications. Herein, it is proposed that the brain's ubiquitous stochasticity represents an additional source of inspiration for expanding the reach of neuromorphic computing to probabilistic applications. To date, many efforts exploring probabilistic computing have focused primarily on one scale of the microelectronics stack, such as implementing probabilistic algorithms on deterministic hardware or developing probabilistic devices and circuits with the expectation that they will be leveraged by eventual probabilistic architectures. A co‐design vision is described by which large numbers of devices, such as magnetic tunnel junctions and tunnel diodes, can be operated in a stochastic regime and incorporated into a scalable neuromorphic architecture that can impact a number of probabilistic computing applications, such as Monte Carlo simulations and Bayesian neural networks. Finally, a framework is presented to categorize increasingly advanced hardware‐based probabilistic computing technologies.

Misra, Shashank↗

Programable Driver for Voltage-Controlled Oscillators

Electronically programable read-only memory (EPROM) and digital-to-analog converter provide customized time-varying voltage for frequency modulation. Voltage used to modulate IMPATT oscillator that serves as microwave pump for solid-state maser in low-noise amplifier. EPROM simple to tailor voltage waveform to suit characteristics of given maser. Digital information for waveform programed into EPROM chip; digital-to-analog converter reads information and produces corresponding analog wave. Principle readily adapted to other applications.

Fowler, L. E.↗

Oral annunciator with programmable vocabulary

Voice (analog) signal is converted to its digital equivalent and stored in solid state memory. Upon command, memory becomes part of annunciator system which includes other digital logic, digital-to-analog converter, and audio amplifier.

Paslay, D.↗

Data storage, image tube type

Method and apparatus for the storage of digital or analog electrical signals are provided by a memory storage system employing a conventional vidicon tube. At the beginning of an operating cycle, the vidicon is conditioned to accept electrical data input by exposing its photosensitive target to a short, high intensity light flash. A first electron beam scan of the photosensitive surface then sets up a charge pattern on the photosensitive target. A second electron beam scan of the photosensitive surface by an unmodulated electron beam then develops an output signal across an output resistor by using capacitive currents. The conditioning and scanning steps are operated repetitively at high speed using conventional television camera scan, sync, and power supply circuitry to provide a low cost data storage system.

Lipoma, P. C.↗

Contour Detector and Data Acquisition System for the Left Ventricular Outline

A real-time contour detector and data acquisition system is described for an angiographic apparatus having a video scanner for converting an X-ray image of a structure characterized by a change in brightness level compared with its surrounding into video format and displaying the X-ray image in recurring video fields. The real-time contour detector and data acqusition system includes track and hold circuits; a reference level analog computer circuit; an analog compartor; a digital processor; a field memory; and a computer interface.

Reiber, J. H. C.↗

Development of land based radar polarimeter processor system

The processing subsystem of a land based radar polarimeter was designed and constructed. This subsystem is labeled the remote data acquisition and distribution system (RDADS). The radar polarimeter, an experimental remote sensor, incorporates the RDADS to control all operations of the sensor. The RDADS uses industrial standard components including an 8-bit microprocessor based single board computer, analog input/output boards, a dynamic random access memory board, and power supplis. A high-speed digital electronics board was specially designed and constructed to control range-gating for the radar. A complete system of software programs was developed to operate the RDADS. The software uses a powerful real time, multi-tasking, executive package as an operating system. The hardware and software used in the RDADS are detailed. Future system improvements are recommended.

Kronke, C. W.↗

Real-time processor for staring receivers

The design, fabrication, and testing of a state-of-the-art, high-throughput on-focal plane IR-image signal processor is described. The processing functions performed are frame differencing and thresholding. The final focal plane array will consist of a 128 x 128-pixel platinum-silicide detector bump-mounted to an on-chip CCD multiplexer. The processor is in a 128-channel parallel-pipeline format. Each channel consists of a pixel regenerator (charge differencer), 128-pixel frame store CCD memory, pixel differencer, second pixel regenerator, thresholder (analog comparator), and digital latch. Four parallel analog outputs and four parallel digital outputs are included. The digital outputs provide a bit map of the image. All analog clock signals (128 KHz, 256 KHz, and 5 MHz) are generated by on-chip TTL-input clock drivers. TTL clock driver inputs are generated off-chip. The technology is low-temperature surface and buried channel CCD/CMOS/indium bump. The design goal was 8-bit resolution at 77 K and 1000 frames/s. Applications include point- or extended-target motion detection with thresholding. Design trade-offs and enhancements (such as on-chip detector gain compensation and a simple window processor) are discussed.

Hanzal, Brian↗