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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 109 records · Page 6

Implementation of Ferroelectric Memories for Space Applications

Ferroelectric random access semiconductor memories (FeRAMs) are an ideal nonvolatile solution for space applications. These memories have low power performance, high endurance and fast write times. By combining commercial ferroelectric memory technology with radiation hardened CMOS technology, nonvolatile semiconductor memories for space applications can be attained. Of the few radiation hardened semiconductor manufacturers, none have embraced the development of radiation hardened FeRAMs, due a limited commercial space market and funding limitations. Government funding may be necessary to assure the development of radiation hardened ferroelectric memories for space applications.

Philpy, Stephen C.↗

Non Volatile Flash Memory Radiation Tests

Commercial flash memory industry has experienced a fast growth in the recent years, because of their wide spread usage in cell phones, mp3 players and digital cameras. On the other hand, there has been increased interest in the use of high density commercial nonvolatile flash memories in space because of ever increasing data requirements and strict power requirements. Because of flash memories complex structure; they cannot be treated as just simple memories in regards to testing and analysis. It becomes quite challenging to determine how they will respond in radiation environments.

single event upset results↗

Multistate resistance in TaN/(Hf,Zr)O 2 /Ta ferroelectric tunnel junctions

Ferroelectric tunnel junctions (FTJs) utilizing hafnium zirconium oxide (HZO) have emerged as promising non-volatile memory elements for microelectronics, compatible with back end of line (BEOL) complementary–metal–oxide semiconductor fabrication. This study investigates asymmetric electrode TaN/HZO/Ta devices with a 6 nm thick HZO layer as FTJs for multistate resistive memory applications. The individual FTJs exhibit a resistance ratio exceeding 10× when utilized as a binary state device, with pulsing between −1.7 and +1.4 V to set the high resistance state (HRS) and low resistance state (LRS), respectively. Following with reduced write voltage pulses allows the ferroelectric device to operate with a selection of over 32 distinct resistance states (2 5 bits) between the LRS and HRS. This work then explores the stability of the resistance states during write/read pulse cycling, along with the stability of the state after multiple read pulses. Accessing the multibit state shows stability within 50 reads with the binary state remaining stable for more than 4000 reads pulses. With their multistate tunability and versatility, FTJs hold promise as BEOL memory elements for compute-in-memory (CiM) arrays, binary digital memory, or weighted vector matrix multiplication applications with low power consumption during computations.

CMOS↗

Effects of carbon concentration on the local atomic structure of amorphous GST

Ge-Sb-Te (GST) alloys are leading phase-change materials for data storage due to the fast phase transition between amorphous and crystalline states. Ongoing research aims at improving the stability of the amorphous phase to improve retention. This can be accomplished by the introduction of carbon as a dopant to Ge 2 Sb 2 Te 5 , which is known to alter the short- and mid-range structure of the amorphous phase and form covalently bonded C clusters, both of which hinder crystallization. The relative importance of these processes as a function of C concentration is not known. Here we used molecular dynamics simulation based on density functional theory to study how carbon doping affects the atomic structure of GST-C. Carbon doping results in an increase in tetrahedral coordination, especially of Ge atoms, and this is known to stabilize the amorphous phase. We observe an unexpected, non-monotonous trend in the number of tetrahedral bonded Ge with the amount of carbon doping. Our simulations show an increase in the number of tetrahedral bonded Ge up to 5 at.% C, after which the number saturates and begins to decrease above 14 at.% C. The carbon atoms aggregate into clusters, mostly in the form of chains and graphene flakes, leaving less carbon to disrupt the GST matrix at higher carbon concentrations. Different degrees of carbon clustering can explain divergent experimental results for recrystallization temperature for carbon doped GST.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Read-only Memories Final Report

Integrated, metal oxide semiconductor memories with nonvolatile and electrically programmable characteristics

Cricchi, J. R.↗

Extended record length of atmospheric data gathered via Nimbus-6

A low-power nonvolatile data memory unit was developed for free floating balloons in the TWERL experiment. By means of multiple identification codes data records, several hours long, could be transferred in compressed form to the Nimbus-6 satellite for retransmission to ground stations. Eight of these units were flown on constant density balloons to investigate atmospheric wave motions throughout the Southern Hemisphere. One returned valid data for ten months. Similar techniques could be used with other types of observing platforms.

Afanasjevs, J.↗

Autonomous spacecraft maintenance study group

A plan to incorporate autonomous spacecraft maintenance (ASM) capabilities into Air Force spacecraft by 1989 is outlined. It includes the successful operation of the spacecraft without ground operator intervention for extended periods of time. Mechanisms, along with a fault tolerant data processing system (including a nonvolatile backup memory) and an autonomous navigation capability, are needed to replace the routine servicing that is presently performed by the ground system. The state of the art fault handling capabilities of various spacecraft and computers are described, and a set conceptual design requirements needed to achieve ASM is established. Implementations for near term technology development needed for an ASM proof of concept demonstration by 1985, and a research agenda addressing long range academic research for an advanced ASM system for 1990s are established.

Marshall, M. H.↗

Programmable Synaptic Arrays For Electronic Neural Networks

High resistances prevent hotspots in parallel input and output operation. Nonvolatile computer memory combines ultrahigh storage density with extremely-low power dissipation. Accommodates about 1 billion bits in square centimeter of surface area. Bit written with expenditure of less than 1 nanojoule of energy and read with even lower energy. Developed for parallel input and output operation.

Thakoor, Anilkumar P.↗

Ferroelectric/Optoelectronic Memory/Processor

Proposed hybrid optoelectronic nonvolatile analog memory and data processor comprises planar array of microscopic photosensitive ferroelectric capacitors performing massively parallel analog computations. Processors overcome electronic crosstalk and limitations on number of input/output contacts inherent in electronic implementations of large interconnection arrays. Used in general optical computing, recognition of patterns, and artificial neural networks.

Thakoor, Sarita↗

Three-Dimensional Magnetic-Bubble Memory System

Proposed magnetic-bubble memory system includes stack of two-dimensional memory modules. Design enables overall storage density of system to be greater than prior magnetic-bubble memories. Provides nonvolatile storage, with readout access times in millisecond range. Has partly parallel input/output configuration supporting high-performance computing. Also relatively invulnerable to damage by ionizing radiation. Binary data, as represented by direction of magnetization of magnetic bubbles, reads out via Faraday effect.

Katti, Romney R.↗

NASA Tech Briefs, April 2007

Topics include: Wearable Environmental and Physiological Sensing Unit; Broadband Phase Retrieval for Image-Based Wavefront Sensing; Filter Function for Wavefront Sensing Over a Field of View; Iterative-Transform Phase Retrieval Using Adaptive Diversity; Wavefront Sensing With Switched Lenses for Defocus Diversity; Smooth Phase Interpolated Keying; Maintaining Stability During a Conducted-Ripple EMC Test; Photodiode Preamplifier for Laser Ranging With Weak Signals; Advanced High-Definition Video Cameras; Circuit for Full Charging of Series Lithium-Ion Cells; Analog Nonvolatile Computer Memory Circuits; JavaGenes Molecular Evolution; World Wind 3D Earth Viewing; Lithium Dinitramide as an Additive in Lithium Power Cells; Accounting for Uncertainties in Strengths of SiC MEMS Parts; Ion-Conducting Organic/Inorganic Polymers; MoO3 Cathodes for High-Temperature Lithium Thin-Film Cells; Counterrotating-Shoulder Mechanism for Friction Stir Welding; Strain Gauges Indicate Differential-CTE-Induced Failures; Antibodies Against Three Forms of Urokinase; Understanding and Counteracting Fatigue in Flight Crews; Active Correction of Aberrations of Low-Quality Telescope Optics; Dual-Beam Atom Laser Driven by Spinor Dynamics; Rugged, Tunable Extended-Cavity Diode Laser; Balloon for Long-Duration, High-Altitude Flight at Venus; and Wide-Temperature-Range Integrated Operational Amplifier.

Source record↗

Binary synaptic connections based on memory switching in a-Si:H for artificial neural networks

A scheme for nonvolatile associative electronic memory storage with high information storage density is proposed which is based on neural network models and which uses a matrix of two-terminal passive interconnections (synapses). It is noted that the massive parallelism in the architecture would require the ON state of a synaptic connection to be unusually weak (highly resistive). Memory switching using a-Si:H along with ballast resistors patterned from amorphous Ge-metal alloys is investigated for a binary programmable read only memory matrix. The fabrication of a 1600 synapse test array of uniform connection strengths and a-Si:H switching elements is discussed.

Thakoor, A. P.↗

A Radiation-Tolerant, Low-Power Non-Volatile Memory Based on Silicon Nanocrystal Quantum Dots

Nanocrystal nonvolatile floating-gate memories are a good candidate for space applications - initial results suggest they are fast, more reliable and consume less power than conventional floating gate memories. In the nanocrystal based NVM device, charge is not stored on a continuous polysilicon layer (so-called floating gate), but instead on a layer of discrete nanocrystals. Charge injection and storage in dense arrays of silicon nanocrystals in SiO2 is a critical aspect of the performance of potential nanocrystal flash memory structures. The ultimate goal for this class of devices is few- or single-electron storage in a small number of nanocrystal elements. In addition, the nanocrystal layer fabrication technique should be simple, 8-inch wafer compatible and well controlled in program/erase threshold voltage swing was seen during 100,000 program and erase cycles. Additional near-term goals for this project include extensive testing for radiation hardness and the development of artificial layered tunnel barrier heterostructures which have the potential for large speed enhancements for read/write of nanocrystal memory elements, compared with conventional flash devices. Additional information is contained in the original extended abstract.

Bell, L. D.↗

A radiation - tolerant, low - power non - volatile memory based on silicon nanocrystal quantum dots.

Nanocrystal nonvolatile floating-gate memories are a good candidate for space applications - initial results suggest they are fast, more reliable and consume less power than conventional floating gate memories. In the nanocrystal based NVM device, charge is not stored on a continuous polysilicon layer (so-called floating gate), but instead on a layer of discrete nanocrystals. Charge injection and storage in dense arrays of silicon nanocrystals in Si02 is a critical aspect of the performance of potential nanocrystal flash memory structures. The ultimate goal for this class of devices is few- or single-electron storage in a small number of nanocrystal elements. In addition, the nanocrystal layer fabrication technique should be simple, 8-inch wafer compatible and well controlled.

Green, M. L.↗

Programmable Analog Memory Resistors For Electronic Neural Networks

Electrical resistance of new solid-state device altered repeatedly by suitable control signals, yet remains at steady value when control signal removed. Resistance set at low value ("on" state), high value ("off" state), or at any convenient intermediate value and left there until new value desired. Circuits of this type particularly useful in nonvolatile, associative electronic memories based on models of neural networks. Such programmable analog memory resistors ideally suited as synaptic interconnects in "self-learning" neural nets. Operation of device depends on electrochromic property of WO3, which when pure is insulator. Potential uses include nonvolatile, erasable, electronically programmable read-only memories.

Ramesham, Rajeshuni↗

Optically Addressable, Ferroelectric Memory With NDRO

For readout, memory cells addressed via on-chip semiconductor lasers. Proposed thin-film ferroelectric memory device features nonvolatile storage, optically addressable, nondestructive readout (NDRO) with fast access, and low vulnerability to damage by ionizing radiation. Polarization switched during recording and erasure, but not during readout. As result, readout would not destroy contents of memory, and operating life in specific "read-intensive" applications increased up to estimated 10 to the 16th power cycles.

Thakoor, Sarita↗

Integrated, nonvolatile, high-speed analog random access memory

This invention provides an integrated, non-volatile, high-speed random access memory. A magnetically switchable ferromagnetic or ferrimagnetic layer is sandwiched between an electrical conductor which provides the ability to magnetize the magnetically switchable layer and a magneto resistive or Hall effect material which allows sensing the magnetic field which emanates from the magnetization of the magnetically switchable layer. By using this integrated three-layer form, the writing process, which is controlled by the conductor, is separated from the storage medium in the magnetic layer and from the readback process which is controlled by the magnetoresistive layer. A circuit for implementing the memory in CMOS or the like is disclosed.

Katti, Romney R.↗