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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 109 records · Page 6
All sourcesNASA NTRSDOE OSTI
NASA NTRS2017

Printed Circuit Board Assembly for Use in Space Missions

An electronic assembly for use in space missions that includes a PCB and one or more multi-pin CGA devices coupled to the PCB. The PCB has one or more via-in-pad features and each via-in-pad feature comprises a land pad configured to couple a pin of the one or more multi-pin CGA devices to the via. The PCB also includes a plurality of layers arranged symmetrically in a two-halves configuration above and below a central plane of the PCB.

Petrick, David J.↗
NASA NTRS2016

Printed Circuit Board Quality Assurance

PCB Assurance Summary: PCB assurance actives are informed by risk in context of the Project. Lessons are being applied across Projects for continuous improvements. Newer component technologies, smaller/high pitch devices: tighter and more demanding PCB designs: Identifying new research areas. New materials, designs, structures and test methods.

Reliability↗
DOE OSTI2020

Printed circuit board for integrated LED driver

A light emitting diode (LED) module may include a direct current (DC) voltage node formed on a first layer. The DC voltage node may be configured to sink a first current. One or more devices may be formed on the first layer configured to provide a second current to one or more LEDs. A device of the one or more devices may carry a steep slope voltage waveform. A local shielding area may be formed in a second layer directly below the DC voltage node and the one or more devices. The local shielding area may include a substantially continuous area of conductive material. A conductive via may extend through one or more layers. The conductive via may electrically connect the DC voltage node and the local shielding area.

Song, Zhihua↗
DOE OSTI2024

Aerosol-Jet Printed Transferable Millimeter-Wave Circuits

Printed millimeter wave (mmW) electronics have been of high interest in the field of communications for some time now due to the potential ability to fabricate mmW systems that utilize 3-Dimension Heterogeneous Integration (3DHI) to improve performance beyond traditional systems. Here, in this paper, a method for fabricating transferable mmW structures via aerosol-jet printing (AJP) is presented. A PDMS stamp assisted liftoff procedure is developed to separate the printed part from a rigid printing support surface and apply it to an adhesive target surface. Several microstrip (MS) line structures are demonstrated to characterize the effect of stamp transfer on the RF performance of the printed circuits. The effects of printed vias on RF probe pads and shifts in the resonant frequencies of a Beatty standard line after transfer are considered and characterized using S-parameter measurements.

42 ENGINEERING↗
NASA NTRS2019

Achieving Improved Reliability with Failure Analysis

Reliability is the ability of a product to properly function, within specified performance limits, for a specified period of time, under the life cycle application conditions. Failure analysis is a vital tool in the effort to ensure reliability of electronic products and systems throughout their product lifecycle. Today, organizations involved in activities within the electronics supply chain are facing new challenges, not just from complex assembly styles, harsher lifecycle environments, and sophisticated supply chains, but also from customers who are demanding a quicker turn-around. Unfortunately, root cause failure analysis is often performed incompletely, leading to a poor understanding of failure mechanisms and causes and, customer dissatisfaction due to recurring failures. The PDC (Professional Development Course) starts with an introduction to reliability concepts, physics of failure and an overview of failure mechanisms that affect PCBs (Printed Circuit Boards), PCBAs (Printed Circuit Board Assembly) and components. The PDC then dives into root cause hypothesizing techniques (Pareto, FMEA (Failure Modes and Effects Analysis), fishbone (Cause-And-Effect Diagram), FTA (Fault Tree Analysis)), non-destructive and destructive analysis and, materials characterization will be discussed. Numerous failure analysis case studies will be used to illustrate the techniques and analysis principles to arrive at the root cause(s) of field failures on printed circuit boards, active components, and assemblies. What Attendees will Learn: Topics include: Overview of Reliability Concepts Failure mechanisms of electronic products Root cause analysis Failure analysis techniques -Non-destructive techniques (optical, CSAM (Confocal Scanning Electron Microscopy) etc.) -Destructive analysis (DPA (Destructive Physical Analysis), Decap (Decapsulation), FIB (Focused Ion Beam) etc.) -Materials characterization (XRF (X-Ray Fluorescence) , EDS (Error Detection Sequential), TMA/DSC (Thermal Mechanical Analysis/Differential Scanning Calorimetry) etc.)

PCB quality↗
DOE OSTI2020

Electrical contacts on the sidewall of a circuit board

Printed circuit board (PCB), electrical structures including PCBs, and methods for making the same. One PCB structures includes: a substrate having a plurality of surfaces, including a first aerial main face (AMF), a second AMF, and a first peripheral end face (PEF), wherein the first PEF separates the first AMF from the second AMF, and a first plurality of contacts embedded in the first PEF, where each of the first plurality of contacts forms a contiguous contact with the first PEF and at least one of i) the second AMF, ii) the first AMF, and iii) another one of the plurality of surfaces.

42 ENGINEERING↗
NASA NTRS1966

Process produces accurate registry between circuit board prints

Tapes and quick-mount circles of contrasting colors aid in obtaining precise registry between the two circuits of two-sided printed circuit boards. The tapes and circles are mounted on opposite sides of transparent plastic film to define the conductive path and feed-through hole locations.

Source record↗
DOE OSTI2022

Conductive Ink with Circular Life Cycle for Printed Electronics

Electronic waste carries energetic costs and an environmental burden rivaling that of plastic waste due to the rarity and toxicity of the heavy-metal components. Recyclable conductive composites are introduced for printed circuits formulated with polycaprolactone (PCL), conductive fillers, and enzyme/protectant nanoclusters. Circuits can be printed with flexibility (breaking strain ≈80%) and conductivity (≈2.1 × 10 4 S m -1 ). These composites are degraded at the end of life by immersion in warm water with programmable latency. Approximately 94% of the functional fillers can be recycled and reused with similar device performance. The printed circuits remain functional and degradable after shelf storage for at least 7 months at room temperature and one month of continuous operation under electrical voltage. Here, the present studies provide composite design toward recyclable and easily disposable printed electronics for applications such as wearable electronics, biosensors, and soft robotics.

36 MATERIALS SCIENCE↗
NASA NTRS2009

Board Saver for Use with Developmental FPGAs

A device denoted a board saver has been developed as a means of reducing wear and tear of a printed-circuit board onto which an antifuse field programmable gate array (FPGA) is to be eventually soldered permanently after a number of design iterations. The need for the board saver or a similar device arises because (1) antifuse-FPGA design iterations are common and (2) repeated soldering and unsoldering of FPGAs on the printed-circuit board to accommodate design iterations can wear out the printed-circuit board. The board saver is basically a solderable/unsolderable FPGA receptacle that is installed temporarily on the printed-circuit board. The board saver is, more specifically, a smaller, square-ring-shaped, printed-circuit board (see figure) that contains half via holes one for each contact pad along its periphery. As initially fabricated, the board saver is a wider ring containing full via holes, but then it is milled along its outer edges, cutting the via holes in half and laterally exposing their interiors. The board saver is positioned in registration with the designated FPGA footprint and each via hole is soldered to the outer portion of the corresponding FPGA contact pad on the first-mentioned printed-circuit board. The via-hole/contact joints can be inspected visually and can be easily unsoldered later. The square hole in the middle of the board saver is sized to accommodate the FPGA, and the thickness of the board saver is the same as that of the FPGA. Hence, when a non-final FPGA is placed in the square hole, the combination of the non-final FPGA and the board saver occupy no more area and thickness than would a final FPGA soldered directly into its designated position on the first-mentioned circuit board. The contact leads of a non-final FPGA are not bent and are soldered, at the top of the board saver, to the corresponding via holes. A non-final FPGA can readily be unsoldered from the board saver and replaced by another one. Once the final FPGA design has been determined, the board saver can be unsoldered from the contact pads on the first-mentioned printed-circuit board and replaced by the final FPGA.

Berkun, Andrew↗