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At least 109 records · Page 6

Multi-Rigor Agile Verification and Rapid Prototyping for Formally Verified Software

We propose a novel approach to developing formally verified systems through Multi-rigor Agile Verification. Multi-rigor Agile Verification is rooted in the hypothesis of Rigor Independence, that a system’s specification and verification architecture depend primarily on the system requirements to be verified, and they depend very little on the rigor level of the methods used to verify those requirements. Due to its iterative nature, Multi-rigor Agile Verification promises to mitigate many of the high upfront design costs experienced by formally verified systems and to deliver a better-architected, and thus better-trusted, system in the end. We then discuss the tooling needed to perform Multi-rigor Agile Verification and go in depth to build one of those tools, which directly generates executable prototype code from declarative formal specifications using the Maude rewrite-logic framework.

97 MATHEMATICS AND COMPUTING↗

Distributed IELI, Rebuilding IELI for Scalability

IELI is an NLP-based system designed to transform text into structured knowledge graphs, integrate domain-specific ontologies, and answer conceptual logic-based queries. This poster talks about how redesigning IELI can help address scalability and modularity challenges, as well as improving responsiveness and health monitoring of the system.

Trejo, Edwin Horacio [Sandia National Laboratories↗

Current steering commutator offers versatility

Novel current steering commutator is capable of stepping to all possible locations from any location by appropriate control logic, and is easily tailored to specific user requirements.

Zottarelli, L. J.↗

Specific construction tests

The technical feasibility of the Satellite Power System (SPS) is discussed. The development of feasible operational concepts and conceptualization of specific construction tasks are examined. The logic flow of functional analyses of both the rectenna and the satellite is illustrated. Constraints placed upon the construction processes and equipment by the satellite design are outlined. The construction tasks, when defined and combined into an integrated schedule establish, a time line for construction mass flow demands to be satisfied by the space transportation systems. An example of satellite constructive demands and HLLV delivery capabilities is given.

Mcrae, W. V., Jr.↗

Verifying command sequences for satellite systems

We present a formal basis for the design of a Checker used in validating safe schedules and in selecting error recovery schedules for satellite control systems. This design includes a high-level specification of Checker behavior and properties (called flight rules) of safe schedules. Specifications are written in Timed Linear Logic (TLL). Validation of schedules is performed in terms of real-time telemetry and deduction system proof rules. Telemetry (state information for satellite subsystems) serves as input to the Checker. Detection of violation of a flight rule by the Checker results in the selection of a contingency plan (error recovery schedule). The Checker is illustrated in terms of the TOPEX/Poseidon Oceanographic Satellite System.

Peters, James F., III↗

Switching LPV Control for High Performance Tactical Aircraft

This paper examines a switching Linear Parameter-Varying (LPV) control approach to determine if it is practical to use for flight control designs within a wide angle of attack region. The approach is based on multiple parameter-dependent Lyapunov functions. The full parameter space is partitioned into overlapping subspaces and a family of LPV controllers are designed, each suitable for a specific parameter subspace. The hysteresis switching logic is used to accomplish the transition among different parameter subspaces. The proposed switching LPV control scheme is applied to an F-16 aircraft model with different actuator dynamics in low and high angle of attack regions. The nonlinear simulation results show that the aircraft performs well when switching among different angle of attack regions.

Lu, Bei↗

A Formal Methods Approach to the Analysis of Mode Confusion

The goal of the new NASA Aviation Safety Program (AvSP) is to reduce the civil aviation fatal accident rate by 80% in ten years and 90% in twenty years. This program is being driven by the accident data with a focus on the most recent history. Pilot error is the most commonly cited cause for fatal accidents (up to 70%) and obviously must be given major consideration in this program. While the greatest source of pilot error is the loss of situation awareness , mode confusion is increasingly becoming a major contributor as well. The January 30, 1995 issue of Aviation Week lists 184 incidents and accidents involving mode awareness including the Bangalore A320 crash 2/14/90, the Strasbourg A320 crash 1/20/92, the Mulhouse-Habsheim A320 crash 6/26/88, and the Toulouse A330 crash 6/30/94. These incidents and accidents reveal that pilots sometimes become confused about what the cockpit automation is doing. Consequently, human factors research is an obvious investment area. However, even a cursory look at the accident data reveals that the mode confusion problem is much deeper than just training deficiencies and a lack of human-oriented design. This is readily acknowledged by human factors experts. It seems that further progress in human factors must come through a deeper scrutiny of the internals of the automation. It is in this arena that formal methods can contribute. Formal methods refers to the use of techniques from logic and discrete mathematics in the specification, design, and verification of computer systems, both hardware and software. The fundamental goal of formal methods is to capture requirements, designs and implementations in a mathematically based model that can be analyzed in a rigorous manner. Research in formal methods is aimed at automating this analysis as much as possible. By capturing the internal behavior of a flight deck in a rigorous and detailed formal model, the dark corners of a design can be analyzed. This paper will explore how formal models and analyses can be used to help eliminate mode confusion from flight deck designs and at the same time increase our confidence in the safety of the implementation. The paper is based upon interim results from a new project involving NASA Langley and Rockwell Collins in applying formal methods to a realistic business jet Flight Guidance System (FGS).

Butler, Ricky W.↗

Fault-Tolerant Coding for State Machines

Two reliable fault-tolerant coding schemes have been proposed for state machines that are used in field-programmable gate arrays and application-specific integrated circuits to implement sequential logic functions. The schemes apply to strings of bits in state registers, which are typically implemented in practice as assemblies of flip-flop circuits. If a single-event upset (SEU, a radiation-induced change in the bit in one flip-flop) occurs in a state register, the state machine that contains the register could go into an erroneous state or could hang, by which is meant that the machine could remain in undefined states indefinitely. The proposed fault-tolerant coding schemes are intended to prevent the state machine from going into an erroneous or hang state when an SEU occurs. To ensure reliability of the state machine, the coding scheme for bits in the state register must satisfy the following criteria: 1. All possible states are defined. 2. An SEU brings the state machine to a known state. 3. There is no possibility of a hang state. 4. No false state is entered. 5. An SEU exerts no effect on the state machine. Fault-tolerant coding schemes that have been commonly used include binary encoding and "one-hot" encoding. Binary encoding is the simplest state machine encoding and satisfies criteria 1 through 3 if all possible states are defined. Binary encoding is a binary count of the state machine number in sequence; the table represents an eight-state example. In one-hot encoding, N bits are used to represent N states: All except one of the bits in a string are 0, and the position of the 1 in the string represents the state. With proper circuit design, one-hot encoding can satisfy criteria 1 through 4. Unfortunately, the requirement to use N bits to represent N states makes one-hot coding inefficient.

Naegle, Stephanie Taft↗

Control of Technology Transfer at JPL

Controlled Technology: 1) Design: preliminary or critical design data, schematics, technical flow charts, SNV code/diagnostics, logic flow diagrams, wirelist, ICDs, detailed specifications or requirements. 2) Development: constraints, computations, configurations, technical analyses, acceptance criteria, anomaly resolution, detailed test plans, detailed technical proposals. 3) Production: process or how-to: assemble, operated, repair, maintain, modify. 4) Manufacturing: technical instructions, specific parts, specific materials, specific qualities, specific processes, specific flow. 5) Operations: how-to operate, contingency or standard operating plans, Ops handbooks. 6) Repair: repair instructions, troubleshooting schemes, detailed schematics. 7) Test: specific procedures, data, analysis, detailed test plan and retest plans, detailed anomaly resolutions, detailed failure causes and corrective actions, troubleshooting, trended test data, flight readiness data. 8) Maintenance: maintenance schedules and plans, methods for regular upkeep, overhaul instructions. 9) Modification: modification instructions, upgrades kit parts, including software

Jet Propulsion Laboratory (JPL)↗

Optimizing the Model of the Viking-400 UAS

This project intends to update and redesign imperfections in the scanned 3D CAD model of the Viking 400 aircraft. This aircraft, similar to the Sierra-B UAS, will carry payloads of scientific instruments for research purposes. The goals of this project are to modify the current scanned model such that it better represents the physical qualities of the aircraft, as well as creating the features that are missing from the model. As the model was imported from a different software, many of the critical surfaces did not accurately reflect the actual aircraft. Those parts of the model were redesigned entirely so that they can be edited for future use, as well as correctly representing the aircraft as it is now. Additionally, parts of the aircraft that did not appear in the scanned model were designed and added to the new model. In order to prioritize ease of use for future missions, the model has been reorganized in a logical fashion that enables modification of specific parts of the aircraft. The organization of this model imitates the drawing tree of the Sierra-B, with the intention of maintaining a functional system of redesign, analysis, and implementation. Ultimately, this project will be a catalyst for making Viking 400 into a functional aircraft and increasing scientific research in airborne vehicles.

Wandrocke, Evan W. J.↗

Bridging the Gap Between Requirements and Model Analysis : Evaluation on Ten Cyber-Physical Challenge Problems

Formal verfication and simulation are powerful tools to validate requirements against complex systems. [Problem] Requirements are developed in early stages of the software lifecycle and are typically written in ambiguous natural language. There is a gap between such requirements and formal notations that can be used by verification tools, and lack of support for proper association of requirements with software artifacts for verification. [Principal idea] We propose to write requirements in an intuitive, structured natural language with formal semantics, and to support formalization and model/code verification as a smooth, well-integrated process. [Contribution] We have developed an end-to-end, open source requirements analysis framework that checks Simulink models against requirements written in structured natural language. Our framework is built in the Formal Requirements Elicitation Tool (fret); we use fret's requirements language named fretish, and formalization of fretish requirements in temporal logics. Our proposed framework contributes the following features: 1) automatic extraction of Simulink model information and association of fretish requirements with target model signals and components; 2) translation of temporal logic formulas into synchronous dataflow cocospec specifications as well as Simulink monitors, to be used by verification tools; we establish correctness of our translation through extensive automated testing; 3) interpretation of counterexamples produced by verification tools back at requirements level. These features support a tight integration and feedback loop between high level requirements and their analysis. We demonstrate our approach on a major case study: the Ten Lockheed Martin Cyber-Physical, aerospace-inspired challenge problems.

Mavridou, Anastasia↗

First-Order Runtime Verification using BDDs

Runtime Verification (RV) expedites the analyses of execution traces for detecting system errors and for statistical and quality analysis. Having started modestly, with checking temporal properties that are based on propositional (yes/no) values, the current practice of RV often involves properties that are parametrized by the data observed in the input trace. The specifications are based on various formalisms, such as automata, temporal logics, rule systems, and stream processing. Checking execution traces that are data intensive against a specification that imposes strong dependencies between the data, poses a nontrivial challenges; in particular if runtime verification has to be performed online, while many events that carry data appear within small time proximities. Towards achieving this goal, it was recently suggested to represent relations over the observed data values, based on BDDs, where data elements are enumerated and then converted into bit vectors. This representation provided a very simple and natural extension of an RV algorithm from propositional to first-order LTL, but more importantly, was shown to contribute to the memory compactness and to the speed, as was demonstrated using a corresponding implementation. We extend here the capabilities of BDD-based RV with the ability to express timing constraints, where the monitored events include (integer) clock values. We show how to efficiently operate on BDDs that represent both relations on (enumerations of) values and time dependencies, as required by the addition of the time constraints. We demonstrate our algorithm with an efficient implementation and provide experimental results.

Peled, Doron↗

DRS: Derivational Reasoning System

The high reliability requirements for airborne systems requires fault-tolerant architectures to address failures in the presence of physical faults, and the elimination of design flaws during the specification and validation phase of the design cycle. Although much progress has been made in developing methods to address physical faults, design flaws remain a serious problem. Formal methods provides a mathematical basis for removing design flaws from digital systems. DRS (Derivational Reasoning System) is a formal design tool based on advanced research in mathematical modeling and formal synthesis. The system implements a basic design algebra for synthesizing digital circuit descriptions from high level functional specifications. DRS incorporates an executable specification language, a set of correctness preserving transformations, verification interface, and a logic synthesis interface, making it a powerful tool for realizing hardware from abstract specifications. DRS integrates recent advances in transformational reasoning, automated theorem proving and high-level CAD synthesis systems in order to provide enhanced reliability in designs with reduced time and cost.

Bose, Bhaskar↗

Space shuttle lightning protection criteria document

The lightning environment for design is defined and imposes the requirements that the design must satisfy to insure the protection of the space shuttle vehicle system from the direct and indirect effects of lightning. Specifications, criteria, and guidelines provide a practical and logical approach to the protection problems. Protection against the indirect effects of lightning is intimately involved with the electromagnetic compatibility and electromagnetic interference functions. While this document does not deal specifically with electromagnetic compatibility and electromagnetic interference, it does deal with the interactions between lightning protection measures and measures employed for electromagnetic compatibility and control of electromagnetic interference.

Source record↗

Formal specification and verification of Ada software

The use of formal methods in software development achieves levels of quality assurance unobtainable by other means. The Larch approach to specification is described, and the specification of avionics software designed to implement the logic of a flight control system is given as an example. Penelope is described which is an Ada-verification environment. The Penelope user inputs mathematical definitions, Larch-style specifications and Ada code and performs machine-assisted proofs that the code obeys its specifications. As an example, the verification of a binary search function is considered. Emphasis is given to techniques assisting the reuse of a verification effort on modified code.

Hird, Geoffrey R.↗

Evaluating Flight Crew Operator Manual Documentation

Aviation and cognitive science researchers have identified situations in which the pilot s expectations for the behavior of the avionics are not matched by the actual behavior of the avionics. Researchers have attributed these "automation surprises" to the complexity of the avionics mode logic, the absence of complete training, limitations in cockpit displays, and ad-hoc conceptual models of the avionics. Complete canonical rule-based descriptions of the behavior of the autopilot provide the basis for understanding the perceived complexity of the autopilots, the differences between the pilot s and autopilot s conceptual models, and the limitations in training materials and cockpit displays. This paper compares the behavior of the autopilot Vertical Speed/Flight Path Angle (VS-FPA) mode as described in the Flight Crew Operators Manual (FCOM) and the actual behavior of the VS-FPA mode defined in the autopilot software. This example demonstrates the use of the Operational Procedure Model (OPM) as a method for using the requirements specification for the design of the software logic as information requirements for training.

Sherry, Lance↗

Modification and updating of the Manned Activity Scheduling System (MASS) for shuttle and shuttle payloads analysis. Volume 1: Model specifications

The LRC MASS was modified and updated to include logic for efficient analysis of space shuttle payload operations. All MASS computer models were reviewed for compatibility with, and applicability to, the shuttle sortie mission. The MASS modification efforts were concentrated on two computer programs, the general scheduling model (GSM) and one day model (ODM). A new computer program, the DAYLIB Tape Processor, was developed to update the link between the GSM and ODM. The resulting MASS is an operationally efficient analytical tool that will allow a rapid assessment of shuttle and shuttle payload operations.

Ring, R. C.↗

Reliability validation of systems for life-critical applications

A framework is proposed which addresses traditional reliability validation approaches consisting of life testing techniques which are inapplicable for digital flight control systems. A specific validation methodology is identified based on logical proofs, analytical modeling, and experimental testing. Research activities required to support continued development of validation technology are identified, and the validation procedure is driven by the reliability model obtained from the system description. The analytical reliability model is shown to be a proper abstraction of the system under consideration, and a proof of correctness of system design and system scheduler performance is proposed.

Trivedi, K. S.↗